364 lines
18 KiB
ArmAsm
Executable File
364 lines
18 KiB
ArmAsm
Executable File
/* File: startup_ARMCM4.S
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* Purpose: startup file for Cortex-M4 devices. Should use with
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* GCC for ARM Embedded Processors
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* Version: V1.3
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* Date: 08 Feb 2012
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*
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* Copyright (c) 2012, ARM Limited
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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* Neither the name of the ARM Limited nor the
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names of its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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.syntax unified
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.arch armv7-m
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.section .stack
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.align 3
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#ifdef __STACK_SIZE
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.equ Stack_Size, __STACK_SIZE
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#else
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.equ Stack_Size, 0x400
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#endif
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.globl __StackTop
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.globl __StackLimit
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__StackLimit:
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.space Stack_Size
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.size __StackLimit, . - __StackLimit
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__StackTop:
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.size __StackTop, . - __StackTop
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.section .heap
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.align 3
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#ifdef __HEAP_SIZE
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.equ Heap_Size, __HEAP_SIZE
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#else
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.equ Heap_Size, 0xC00
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#endif
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.globl __HeapBase
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.globl __HeapLimit
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__HeapBase:
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.if Heap_Size
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.space Heap_Size
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.endif
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.size __HeapBase, . - __HeapBase
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__HeapLimit:
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.size __HeapLimit, . - __HeapLimit
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.section .isr_vector
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.align 2
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.globl __isr_vector
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__isr_vector:
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.long __StackTop /* Top of Stack */
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.long Reset_Handler /* Reset Handler */
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.long NMI_Handler /* NMI Handler */
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.long HardFault_Handler /* Hard Fault Handler */
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.long MemManage_Handler /* MPU Fault Handler */
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.long BusFault_Handler /* Bus Fault Handler */
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.long UsageFault_Handler /* Usage Fault Handler */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long SVC_Handler /* SVCall Handler */
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.long DebugMon_Handler /* Debug Monitor Handler */
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.long 0 /* Reserved */
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.long PendSV_Handler /* PendSV Handler */
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.long SysTick_Handler /* SysTick Handler */
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// External Interrupts
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.long WWDG_IRQHandler // Window WatchDog
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.long PVD_IRQHandler // PVD through EXTI Line detection
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.long TAMP_STAMP_IRQHandler // Tamper and TimeStamps through the EXTI line
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.long RTC_WKUP_IRQHandler // RTC Wakeup through the EXTI line
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.long FLASH_IRQHandler // FLASH
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.long RCC_IRQHandler // RCC
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.long EXTI0_IRQHandler // EXTI Line0
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.long EXTI1_IRQHandler // EXTI Line1
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.long EXTI2_IRQHandler // EXTI Line2
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.long EXTI3_IRQHandler // EXTI Line3
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.long EXTI4_IRQHandler // EXTI Line4
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.long DMA1_Stream0_IRQHandler // DMA1 Stream 0
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.long DMA1_Stream1_IRQHandler // DMA1 Stream 1
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.long DMA1_Stream2_IRQHandler // DMA1 Stream 2
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.long DMA1_Stream3_IRQHandler // DMA1 Stream 3
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.long DMA1_Stream4_IRQHandler // DMA1 Stream 4
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.long DMA1_Stream5_IRQHandler // DMA1 Stream 5
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.long DMA1_Stream6_IRQHandler // DMA1 Stream 6
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.long ADC_IRQHandler // ADC1, ADC2 and ADC3s
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.long CAN1_TX_IRQHandler // CAN1 TX
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.long CAN1_RX0_IRQHandler // CAN1 RX0
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.long CAN1_RX1_IRQHandler // CAN1 RX1
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.long CAN1_SCE_IRQHandler // CAN1 SCE
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.long EXTI9_5_IRQHandler // External Line[9:5]s
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.long TIM1_BRK_TIM9_IRQHandler // TIM1 Break and TIM9
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.long TIM1_UP_TIM10_IRQHandler // TIM1 Update and TIM10
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.long TIM1_TRG_COM_TIM11_IRQHandler // TIM1 Trigger and Commutation and TIM11
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.long TIM1_CC_IRQHandler // TIM1 Capture Compare
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.long TIM2_IRQHandler // TIM2
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.long TIM3_IRQHandler // TIM3
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.long TIM4_IRQHandler // TIM4
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.long I2C1_EV_IRQHandler // I2C1 Event
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.long I2C1_ER_IRQHandler // I2C1 Error
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.long I2C2_EV_IRQHandler // I2C2 Event
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.long I2C2_ER_IRQHandler // I2C2 Error
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.long SPI1_IRQHandler // SPI1
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.long SPI2_IRQHandler // SPI2
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.long USART1_IRQHandler // USART1
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.long USART2_IRQHandler // USART2
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.long USART3_IRQHandler // USART3
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.long EXTI15_10_IRQHandler // External Line[15:10]s
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.long RTC_Alarm_IRQHandler // RTC Alarm (A and B) through EXTI Line
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.long OTG_FS_WKUP_IRQHandler // USB OTG FS Wakeup through EXTI line
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.long TIM8_BRK_TIM12_IRQHandler // TIM8 Break and TIM12
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.long TIM8_UP_TIM13_IRQHandler // TIM8 Update and TIM13
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.long TIM8_TRG_COM_TIM14_IRQHandler // TIM8 Trigger and Commutation and TIM14
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.long TIM8_CC_IRQHandler // TIM8 Capture Compare
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.long DMA1_Stream7_IRQHandler // DMA1 Stream7
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.long FSMC_IRQHandler // FSMC
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.long SDIO_IRQHandler // SDIO
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.long TIM5_IRQHandler // TIM5
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.long SPI3_IRQHandler // SPI3
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.long UART4_IRQHandler // UART4
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.long UART5_IRQHandler // UART5
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.long TIM6_DAC_IRQHandler // TIM6 and DAC1&2 underrun errors
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.long TIM7_IRQHandler // TIM7
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.long DMA2_Stream0_IRQHandler // DMA2 Stream 0
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.long DMA2_Stream1_IRQHandler // DMA2 Stream 1
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.long DMA2_Stream2_IRQHandler // DMA2 Stream 2
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.long DMA2_Stream3_IRQHandler // DMA2 Stream 3
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.long DMA2_Stream4_IRQHandler // DMA2 Stream 4
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.long ETH_IRQHandler // Ethernet
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.long ETH_WKUP_IRQHandler // Ethernet Wakeup through EXTI line
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.long CAN2_TX_IRQHandler // CAN2 TX
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.long CAN2_RX0_IRQHandler // CAN2 RX0
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.long CAN2_RX1_IRQHandler // CAN2 RX1
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.long CAN2_SCE_IRQHandler // CAN2 SCE
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.long OTG_FS_IRQHandler // USB OTG FS
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.long DMA2_Stream5_IRQHandler // DMA2 Stream 5
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.long DMA2_Stream6_IRQHandler // DMA2 Stream 6
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.long DMA2_Stream7_IRQHandler // DMA2 Stream 7
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.long USART6_IRQHandler // USART6
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.long I2C3_EV_IRQHandler // I2C3 event
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.long I2C3_ER_IRQHandler // I2C3 error
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.long OTG_HS_EP1_OUT_IRQHandler // USB OTG HS End Point 1 Out
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.long OTG_HS_EP1_IN_IRQHandler // USB OTG HS End Point 1 In
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.long OTG_HS_WKUP_IRQHandler // USB OTG HS Wakeup through EXTI
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.long OTG_HS_IRQHandler // USB OTG HS
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.long DCMI_IRQHandler // DCMI
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.long CRYP_IRQHandler // CRYP crypto
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.long HASH_RNG_IRQHandler // Hash and Rng
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.long FPU_IRQHandler // FPU
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.size __isr_vector, . - __isr_vector
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.text
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.thumb
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.thumb_func
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.align 2
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.globl Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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/* Initialize the stackpointer. this is done automatically after a reset event.
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* the bootloader performs a software reset by calling this reset handler, in
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* which case the stackpointer is not yet initialized. */
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ldr r1, =__StackTop
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mov sp, r1
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/* Loop to copy data from read only memory to RAM. The ranges
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* of copy from/to are specified by following symbols evaluated in
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* linker script.
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* __etext: End of code section, i.e., begin of data sections to copy from.
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* __data_start__/__data_end__: RAM address range that data should be
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* copied to. Both must be aligned to 4 bytes boundary. */
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ldr r1, =__etext
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ldr r2, =__data_start__
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ldr r3, =__data_end__
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#if 1
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/* Here are two copies of loop implemenations. First one favors code size
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* and the second one favors performance. Default uses the first one.
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* Change to "#if 0" to use the second one */
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.flash_to_ram_loop:
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cmp r2, r3
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ittt lt
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ldrlt r0, [r1], #4
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strlt r0, [r2], #4
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blt .flash_to_ram_loop
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#else
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subs r3, r2
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ble .flash_to_ram_loop_end
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.flash_to_ram_loop:
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subs r3, #4
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ldr r0, [r1, r3]
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str r0, [r2, r3]
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bgt .flash_to_ram_loop
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.flash_to_ram_loop_end:
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#endif
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#ifndef __NO_SYSTEM_INIT
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ldr r0, =SystemInit
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blx r0
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#endif
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ldr r0, =_start
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bx r0
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.pool
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.size Reset_Handler, . - Reset_Handler
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/* Our weak _start alternative if we don't use the library _start
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* The zero init section must be cleared, otherwise the librtary is
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* doing that */
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.align 1
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.thumb_func
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.weak _start
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.type _start, %function
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_start:
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/* Zero fill the bss segment. */
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ldr r1, = __bss_start__
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ldr r2, = __bss_end__
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movs r3, #0
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b .fill_zero_bss
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.loop_zero_bss:
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str r3, [r1], #4
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.fill_zero_bss:
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cmp r1, r2
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bcc .loop_zero_bss
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/* Jump to our main */
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bl main
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b .
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.size _start, . - _start
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/* Macro to define default handlers. Default handler
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* will be weak symbol and just dead loops. They can be
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* overwritten by other handlers */
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.macro def_irq_handler handler_name
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.align 1
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.thumb_func
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.weak \handler_name
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.type \handler_name, %function
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\handler_name :
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b .
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.size \handler_name, . - \handler_name
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.endm
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def_irq_handler NMI_Handler
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def_irq_handler HardFault_Handler
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def_irq_handler MemManage_Handler
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def_irq_handler BusFault_Handler
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def_irq_handler UsageFault_Handler
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def_irq_handler SVC_Handler
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def_irq_handler DebugMon_Handler
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def_irq_handler PendSV_Handler
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def_irq_handler SysTick_Handler
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def_irq_handler Default_Handler
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// External Interrupts
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def_irq_handler WWDG_IRQHandler // Window WatchDog
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def_irq_handler PVD_IRQHandler // PVD through EXTI Line detection
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def_irq_handler TAMP_STAMP_IRQHandler // Tamper and TimeStamps through the EXTI line
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def_irq_handler RTC_WKUP_IRQHandler // RTC Wakeup through the EXTI line
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def_irq_handler FLASH_IRQHandler // FLASH
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def_irq_handler RCC_IRQHandler // RCC
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def_irq_handler EXTI0_IRQHandler // EXTI Line0
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def_irq_handler EXTI1_IRQHandler // EXTI Line1
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def_irq_handler EXTI2_IRQHandler // EXTI Line2
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def_irq_handler EXTI3_IRQHandler // EXTI Line3
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def_irq_handler EXTI4_IRQHandler // EXTI Line4
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def_irq_handler DMA1_Stream0_IRQHandler // DMA1 Stream 0
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def_irq_handler DMA1_Stream1_IRQHandler // DMA1 Stream 1
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def_irq_handler DMA1_Stream2_IRQHandler // DMA1 Stream 2
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def_irq_handler DMA1_Stream3_IRQHandler // DMA1 Stream 3
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def_irq_handler DMA1_Stream4_IRQHandler // DMA1 Stream 4
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def_irq_handler DMA1_Stream5_IRQHandler // DMA1 Stream 5
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def_irq_handler DMA1_Stream6_IRQHandler // DMA1 Stream 6
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def_irq_handler ADC_IRQHandler // ADC1, ADC2 and ADC3s
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def_irq_handler CAN1_TX_IRQHandler // CAN1 TX
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def_irq_handler CAN1_RX0_IRQHandler // CAN1 RX0
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def_irq_handler CAN1_RX1_IRQHandler // CAN1 RX1
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def_irq_handler CAN1_SCE_IRQHandler // CAN1 SCE
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def_irq_handler EXTI9_5_IRQHandler // External Line[9:5]s
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def_irq_handler TIM1_BRK_TIM9_IRQHandler // TIM1 Break and TIM9
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def_irq_handler TIM1_UP_TIM10_IRQHandler // TIM1 Update and TIM10
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def_irq_handler TIM1_TRG_COM_TIM11_IRQHandler // TIM1 Trigger and Commutation and TIM11
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def_irq_handler TIM1_CC_IRQHandler // TIM1 Capture Compare
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def_irq_handler TIM2_IRQHandler // TIM2
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def_irq_handler TIM3_IRQHandler // TIM3
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def_irq_handler TIM4_IRQHandler // TIM4
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def_irq_handler I2C1_EV_IRQHandler // I2C1 Event
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def_irq_handler I2C1_ER_IRQHandler // I2C1 Error
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def_irq_handler I2C2_EV_IRQHandler // I2C2 Event
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def_irq_handler I2C2_ER_IRQHandler // I2C2 Error
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def_irq_handler SPI1_IRQHandler // SPI1
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def_irq_handler SPI2_IRQHandler // SPI2
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def_irq_handler USART1_IRQHandler // USART1
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def_irq_handler USART2_IRQHandler // USART2
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def_irq_handler USART3_IRQHandler // USART3
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def_irq_handler EXTI15_10_IRQHandler // External Line[15:10]s
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def_irq_handler RTC_Alarm_IRQHandler // RTC Alarm (A and B) through EXTI Line
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def_irq_handler OTG_FS_WKUP_IRQHandler // USB OTG FS Wakeup through EXTI line
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def_irq_handler TIM8_BRK_TIM12_IRQHandler // TIM8 Break and TIM12
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def_irq_handler TIM8_UP_TIM13_IRQHandler // TIM8 Update and TIM13
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def_irq_handler TIM8_TRG_COM_TIM14_IRQHandler // TIM8 Trigger and Commutation and TIM14
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def_irq_handler TIM8_CC_IRQHandler // TIM8 Capture Compare
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def_irq_handler DMA1_Stream7_IRQHandler // DMA1 Stream7
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def_irq_handler FSMC_IRQHandler // FSMC
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def_irq_handler SDIO_IRQHandler // SDIO
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def_irq_handler TIM5_IRQHandler // TIM5
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def_irq_handler SPI3_IRQHandler // SPI3
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def_irq_handler UART4_IRQHandler // UART4
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def_irq_handler UART5_IRQHandler // UART5
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def_irq_handler TIM6_DAC_IRQHandler // TIM6 and DAC1&2 underrun errors
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def_irq_handler TIM7_IRQHandler // TIM7
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def_irq_handler DMA2_Stream0_IRQHandler // DMA2 Stream 0
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def_irq_handler DMA2_Stream1_IRQHandler // DMA2 Stream 1
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def_irq_handler DMA2_Stream2_IRQHandler // DMA2 Stream 2
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def_irq_handler DMA2_Stream3_IRQHandler // DMA2 Stream 3
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def_irq_handler DMA2_Stream4_IRQHandler // DMA2 Stream 4
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def_irq_handler ETH_IRQHandler // Ethernet
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def_irq_handler ETH_WKUP_IRQHandler // Ethernet Wakeup through EXTI line
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def_irq_handler CAN2_TX_IRQHandler // CAN2 TX
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def_irq_handler CAN2_RX0_IRQHandler // CAN2 RX0
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def_irq_handler CAN2_RX1_IRQHandler // CAN2 RX1
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def_irq_handler CAN2_SCE_IRQHandler // CAN2 SCE
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def_irq_handler OTG_FS_IRQHandler // USB OTG FS
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def_irq_handler DMA2_Stream5_IRQHandler // DMA2 Stream 5
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def_irq_handler DMA2_Stream6_IRQHandler // DMA2 Stream 6
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def_irq_handler DMA2_Stream7_IRQHandler // DMA2 Stream 7
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def_irq_handler USART6_IRQHandler // USART6
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def_irq_handler I2C3_EV_IRQHandler // I2C3 event
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def_irq_handler I2C3_ER_IRQHandler // I2C3 error
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def_irq_handler OTG_HS_EP1_OUT_IRQHandler // USB OTG HS End Point 1 Out
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def_irq_handler OTG_HS_EP1_IN_IRQHandler // USB OTG HS End Point 1 In
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def_irq_handler OTG_HS_WKUP_IRQHandler // USB OTG HS Wakeup through EXTI
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def_irq_handler OTG_HS_IRQHandler // USB OTG HS
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def_irq_handler DCMI_IRQHandler // DCMI
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def_irq_handler CRYP_IRQHandler // CRYP crypto
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def_irq_handler HASH_RNG_IRQHandler // Hash and Rng
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def_irq_handler FPU_IRQHandler // FPU
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.end
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