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openblt/Target/Demo/ARMCM3_STM32_Nucleo_STM32F1.../Boot/obj/stm32f10x_rcc.lst

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1 .syntax unified
2 .cpu cortex-m3
3 .fpu softvfp
4 .eabi_attribute 20, 1
5 .eabi_attribute 21, 1
6 .eabi_attribute 23, 3
7 .eabi_attribute 24, 1
8 .eabi_attribute 25, 1
9 .eabi_attribute 26, 1
10 .eabi_attribute 30, 1
11 .eabi_attribute 34, 1
12 .eabi_attribute 18, 4
13 .thumb
14 .file "stm32f10x_rcc.c"
15 .text
16 .Ltext0:
17 .cfi_sections .debug_frame
18 .section .text.RCC_DeInit,"ax",%progbits
19 .align 2
20 .global RCC_DeInit
21 .thumb
22 .thumb_func
24 RCC_DeInit:
25 .LFB29:
26 .file 1 "./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c"
1:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
2:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** ******************************************************************************
3:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @file stm32f10x_rcc.c
4:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @author MCD Application Team
5:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @version V3.5.0
6:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @date 11-March-2011
7:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief This file provides all the RCC firmware functions.
8:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** ******************************************************************************
9:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @attention
10:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *
11:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *
18:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
19:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** ******************************************************************************
20:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
21:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
22:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Includes ------------------------------------------------------------------*/
23:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #include "stm32f10x_rcc.h"
24:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
25:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /** @addtogroup STM32F10x_StdPeriph_Driver
26:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @{
27:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
28:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
29:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /** @defgroup RCC
30:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief RCC driver modules
31:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @{
32:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
33:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
34:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /** @defgroup RCC_Private_TypesDefinitions
35:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @{
36:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
37:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
38:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
39:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @}
40:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
41:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
42:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /** @defgroup RCC_Private_Defines
43:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @{
44:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
45:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
46:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* ------------ RCC registers bit address in the alias region ----------- */
47:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define RCC_OFFSET (RCC_BASE - PERIPH_BASE)
48:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
49:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* --- CR Register ---*/
50:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
51:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Alias word address of HSION bit */
52:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CR_OFFSET (RCC_OFFSET + 0x00)
53:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define HSION_BitNumber 0x00
54:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CR_HSION_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (HSION_BitNumber * 4))
55:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
56:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Alias word address of PLLON bit */
57:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define PLLON_BitNumber 0x18
58:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CR_PLLON_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PLLON_BitNumber * 4))
59:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
60:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #ifdef STM32F10X_CL
61:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Alias word address of PLL2ON bit */
62:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define PLL2ON_BitNumber 0x1A
63:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CR_PLL2ON_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PLL2ON_BitNumber * 4))
64:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
65:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Alias word address of PLL3ON bit */
66:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define PLL3ON_BitNumber 0x1C
67:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CR_PLL3ON_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PLL3ON_BitNumber * 4))
68:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #endif /* STM32F10X_CL */
69:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
70:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Alias word address of CSSON bit */
71:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CSSON_BitNumber 0x13
72:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CR_CSSON_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (CSSON_BitNumber * 4))
73:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
74:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* --- CFGR Register ---*/
75:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
76:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Alias word address of USBPRE bit */
77:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR_OFFSET (RCC_OFFSET + 0x04)
78:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
79:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #ifndef STM32F10X_CL
80:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define USBPRE_BitNumber 0x16
81:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR_USBPRE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (USBPRE_BitNumber * 4))
82:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #else
83:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define OTGFSPRE_BitNumber 0x16
84:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR_OTGFSPRE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (OTGFSPRE_BitNumber * 4))
85:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #endif /* STM32F10X_CL */
86:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
87:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* --- BDCR Register ---*/
88:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
89:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Alias word address of RTCEN bit */
90:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define BDCR_OFFSET (RCC_OFFSET + 0x20)
91:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define RTCEN_BitNumber 0x0F
92:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define BDCR_RTCEN_BB (PERIPH_BB_BASE + (BDCR_OFFSET * 32) + (RTCEN_BitNumber * 4))
93:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
94:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Alias word address of BDRST bit */
95:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define BDRST_BitNumber 0x10
96:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define BDCR_BDRST_BB (PERIPH_BB_BASE + (BDCR_OFFSET * 32) + (BDRST_BitNumber * 4))
97:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
98:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* --- CSR Register ---*/
99:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
100:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Alias word address of LSION bit */
101:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CSR_OFFSET (RCC_OFFSET + 0x24)
102:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define LSION_BitNumber 0x00
103:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CSR_LSION_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (LSION_BitNumber * 4))
104:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
105:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #ifdef STM32F10X_CL
106:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* --- CFGR2 Register ---*/
107:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
108:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Alias word address of I2S2SRC bit */
109:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR2_OFFSET (RCC_OFFSET + 0x2C)
110:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define I2S2SRC_BitNumber 0x11
111:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR2_I2S2SRC_BB (PERIPH_BB_BASE + (CFGR2_OFFSET * 32) + (I2S2SRC_BitNumber * 4))
112:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
113:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Alias word address of I2S3SRC bit */
114:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define I2S3SRC_BitNumber 0x12
115:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR2_I2S3SRC_BB (PERIPH_BB_BASE + (CFGR2_OFFSET * 32) + (I2S3SRC_BitNumber * 4))
116:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #endif /* STM32F10X_CL */
117:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
118:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* ---------------------- RCC registers bit mask ------------------------ */
119:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
120:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* CR register bit mask */
121:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CR_HSEBYP_Reset ((uint32_t)0xFFFBFFFF)
122:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CR_HSEBYP_Set ((uint32_t)0x00040000)
123:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CR_HSEON_Reset ((uint32_t)0xFFFEFFFF)
124:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CR_HSEON_Set ((uint32_t)0x00010000)
125:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CR_HSITRIM_Mask ((uint32_t)0xFFFFFF07)
126:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
127:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* CFGR register bit mask */
128:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined
129:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR_PLL_Mask ((uint32_t)0xFFC2FFFF)
130:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #else
131:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR_PLL_Mask ((uint32_t)0xFFC0FFFF)
132:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #endif /* STM32F10X_CL */
133:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
134:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR_PLLMull_Mask ((uint32_t)0x003C0000)
135:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR_PLLSRC_Mask ((uint32_t)0x00010000)
136:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR_PLLXTPRE_Mask ((uint32_t)0x00020000)
137:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR_SWS_Mask ((uint32_t)0x0000000C)
138:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR_SW_Mask ((uint32_t)0xFFFFFFFC)
139:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR_HPRE_Reset_Mask ((uint32_t)0xFFFFFF0F)
140:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR_HPRE_Set_Mask ((uint32_t)0x000000F0)
141:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR_PPRE1_Reset_Mask ((uint32_t)0xFFFFF8FF)
142:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR_PPRE1_Set_Mask ((uint32_t)0x00000700)
143:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR_PPRE2_Reset_Mask ((uint32_t)0xFFFFC7FF)
144:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR_PPRE2_Set_Mask ((uint32_t)0x00003800)
145:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR_ADCPRE_Reset_Mask ((uint32_t)0xFFFF3FFF)
146:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR_ADCPRE_Set_Mask ((uint32_t)0x0000C000)
147:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
148:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* CSR register bit mask */
149:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CSR_RMVF_Set ((uint32_t)0x01000000)
150:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
151:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined
152:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* CFGR2 register bit mask */
153:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR2_PREDIV1SRC ((uint32_t)0x00010000)
154:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR2_PREDIV1 ((uint32_t)0x0000000F)
155:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #endif
156:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #ifdef STM32F10X_CL
157:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR2_PREDIV2 ((uint32_t)0x000000F0)
158:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR2_PLL2MUL ((uint32_t)0x00000F00)
159:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR2_PLL3MUL ((uint32_t)0x0000F000)
160:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #endif /* STM32F10X_CL */
161:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
162:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* RCC Flag Mask */
163:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define FLAG_Mask ((uint8_t)0x1F)
164:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
165:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* CIR register byte 2 (Bits[15:8]) base address */
166:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CIR_BYTE2_ADDRESS ((uint32_t)0x40021009)
167:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
168:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* CIR register byte 3 (Bits[23:16]) base address */
169:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CIR_BYTE3_ADDRESS ((uint32_t)0x4002100A)
170:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
171:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* CFGR register byte 4 (Bits[31:24]) base address */
172:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define CFGR_BYTE4_ADDRESS ((uint32_t)0x40021007)
173:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
174:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* BDCR register base address */
175:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #define BDCR_ADDRESS (PERIPH_BASE + BDCR_OFFSET)
176:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
177:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
178:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @}
179:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
180:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
181:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /** @defgroup RCC_Private_Macros
182:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @{
183:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
184:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
185:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
186:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @}
187:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
188:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
189:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /** @defgroup RCC_Private_Variables
190:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @{
191:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
192:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
193:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** static __I uint8_t APBAHBPrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9};
194:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** static __I uint8_t ADCPrescTable[4] = {2, 4, 6, 8};
195:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
196:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
197:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @}
198:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
199:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
200:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /** @defgroup RCC_Private_FunctionPrototypes
201:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @{
202:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
203:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
204:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
205:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @}
206:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
207:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
208:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /** @defgroup RCC_Private_Functions
209:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @{
210:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
211:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
212:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
213:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Resets the RCC clock configuration to the default reset state.
214:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param None
215:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
216:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
217:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_DeInit(void)
218:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
27 .loc 1 218 0
28 .cfi_startproc
29 @ args = 0, pretend = 0, frame = 0
30 @ frame_needed = 0, uses_anonymous_args = 0
31 @ link register save eliminated.
219:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Set HSION bit */
220:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CR |= (uint32_t)0x00000001;
32 .loc 1 220 0
33 0000 0D4B ldr r3, .L2
34 0002 1A68 ldr r2, [r3]
35 0004 42F00102 orr r2, r2, #1
36 0008 1A60 str r2, [r3]
221:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
222:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
223:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #ifndef STM32F10X_CL
224:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CFGR &= (uint32_t)0xF8FF0000;
37 .loc 1 224 0
38 000a 5968 ldr r1, [r3, #4]
39 000c 0B4A ldr r2, .L2+4
40 000e 0A40 ands r2, r2, r1
41 0010 5A60 str r2, [r3, #4]
225:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #else
226:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CFGR &= (uint32_t)0xF0FF0000;
227:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #endif /* STM32F10X_CL */
228:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
229:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Reset HSEON, CSSON and PLLON bits */
230:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CR &= (uint32_t)0xFEF6FFFF;
42 .loc 1 230 0
43 0012 1A68 ldr r2, [r3]
44 0014 22F08472 bic r2, r2, #17301504
45 0018 22F48032 bic r2, r2, #65536
46 001c 1A60 str r2, [r3]
231:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
232:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Reset HSEBYP bit */
233:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CR &= (uint32_t)0xFFFBFFFF;
47 .loc 1 233 0
48 001e 1A68 ldr r2, [r3]
49 0020 22F48022 bic r2, r2, #262144
50 0024 1A60 str r2, [r3]
234:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
235:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
236:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CFGR &= (uint32_t)0xFF80FFFF;
51 .loc 1 236 0
52 0026 5A68 ldr r2, [r3, #4]
53 0028 22F4FE02 bic r2, r2, #8323072
54 002c 5A60 str r2, [r3, #4]
237:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
238:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #ifdef STM32F10X_CL
239:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Reset PLL2ON and PLL3ON bits */
240:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CR &= (uint32_t)0xEBFFFFFF;
241:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
242:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Disable all interrupts and clear pending bits */
243:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CIR = 0x00FF0000;
244:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
245:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Reset CFGR2 register */
246:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CFGR2 = 0x00000000;
247:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL)
248:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Disable all interrupts and clear pending bits */
249:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CIR = 0x009F0000;
250:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
251:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Reset CFGR2 register */
252:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CFGR2 = 0x00000000;
253:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #else
254:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Disable all interrupts and clear pending bits */
255:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CIR = 0x009F0000;
55 .loc 1 255 0
56 002e 4FF41F02 mov r2, #10420224
57 0032 9A60 str r2, [r3, #8]
58 0034 7047 bx lr
59 .L3:
60 0036 00BF .align 2
61 .L2:
62 0038 00100240 .word 1073876992
63 003c 0000FFF8 .word -117506048
64 .cfi_endproc
65 .LFE29:
67 .section .text.RCC_HSEConfig,"ax",%progbits
68 .align 2
69 .global RCC_HSEConfig
70 .thumb
71 .thumb_func
73 RCC_HSEConfig:
74 .LFB30:
256:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #endif /* STM32F10X_CL */
257:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
258:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
259:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
260:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
261:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Configures the External High Speed oscillator (HSE).
262:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @note HSE can not be stopped if it is used directly or through the PLL as system clock.
263:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_HSE: specifies the new state of the HSE.
264:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be one of the following values:
265:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_HSE_OFF: HSE oscillator OFF
266:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_HSE_ON: HSE oscillator ON
267:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_HSE_Bypass: HSE oscillator bypassed with external clock
268:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
269:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
270:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_HSEConfig(uint32_t RCC_HSE)
271:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
75 .loc 1 271 0
76 .cfi_startproc
77 @ args = 0, pretend = 0, frame = 0
78 @ frame_needed = 0, uses_anonymous_args = 0
79 @ link register save eliminated.
80 .LVL0:
272:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
273:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_HSE(RCC_HSE));
274:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Reset HSEON and HSEBYP bits before configuring the HSE ------------------*/
275:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Reset HSEON bit */
276:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CR &= CR_HSEON_Reset;
81 .loc 1 276 0
82 0000 0D4B ldr r3, .L8
83 0002 1A68 ldr r2, [r3]
84 0004 22F48032 bic r2, r2, #65536
85 0008 1A60 str r2, [r3]
277:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Reset HSEBYP bit */
278:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CR &= CR_HSEBYP_Reset;
86 .loc 1 278 0
87 000a 1A68 ldr r2, [r3]
88 000c 22F48022 bic r2, r2, #262144
89 0010 1A60 str r2, [r3]
279:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Configure HSE (RCC_HSE_OFF is already covered by the code section above) */
280:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** switch(RCC_HSE)
90 .loc 1 280 0
91 0012 B0F5803F cmp r0, #65536
92 0016 03D0 beq .L6
93 0018 B0F5802F cmp r0, #262144
94 001c 06D0 beq .L7
95 001e 7047 bx lr
96 .L6:
281:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
282:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** case RCC_HSE_ON:
283:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Set HSEON bit */
284:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CR |= CR_HSEON_Set;
97 .loc 1 284 0
98 0020 054A ldr r2, .L8
99 0022 1368 ldr r3, [r2]
100 0024 43F48033 orr r3, r3, #65536
101 0028 1360 str r3, [r2]
285:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** break;
102 .loc 1 285 0
103 002a 7047 bx lr
104 .L7:
286:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
287:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** case RCC_HSE_Bypass:
288:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Set HSEBYP and HSEON bits */
289:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CR |= CR_HSEBYP_Set | CR_HSEON_Set;
105 .loc 1 289 0
106 002c 024A ldr r2, .L8
107 002e 1368 ldr r3, [r2]
108 0030 43F4A023 orr r3, r3, #327680
109 0034 1360 str r3, [r2]
110 0036 7047 bx lr
111 .L9:
112 .align 2
113 .L8:
114 0038 00100240 .word 1073876992
115 .cfi_endproc
116 .LFE30:
118 .section .text.RCC_AdjustHSICalibrationValue,"ax",%progbits
119 .align 2
120 .global RCC_AdjustHSICalibrationValue
121 .thumb
122 .thumb_func
124 RCC_AdjustHSICalibrationValue:
125 .LFB32:
290:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** break;
291:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
292:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** default:
293:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** break;
294:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
295:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
296:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
297:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
298:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Waits for HSE start-up.
299:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param None
300:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval An ErrorStatus enumuration value:
301:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * - SUCCESS: HSE oscillator is stable and ready to use
302:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * - ERROR: HSE oscillator not yet ready
303:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
304:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** ErrorStatus RCC_WaitForHSEStartUp(void)
305:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
306:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** __IO uint32_t StartUpCounter = 0;
307:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** ErrorStatus status = ERROR;
308:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** FlagStatus HSEStatus = RESET;
309:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
310:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Wait till HSE is ready and if Time out is reached exit */
311:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** do
312:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
313:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** HSEStatus = RCC_GetFlagStatus(RCC_FLAG_HSERDY);
314:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** StartUpCounter++;
315:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** } while((StartUpCounter != HSE_STARTUP_TIMEOUT) && (HSEStatus == RESET));
316:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
317:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** if (RCC_GetFlagStatus(RCC_FLAG_HSERDY) != RESET)
318:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
319:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** status = SUCCESS;
320:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
321:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** else
322:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
323:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** status = ERROR;
324:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
325:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** return (status);
326:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
327:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
328:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
329:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Adjusts the Internal High Speed oscillator (HSI) calibration value.
330:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param HSICalibrationValue: specifies the calibration trimming value.
331:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter must be a number between 0 and 0x1F.
332:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
333:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
334:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue)
335:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
126 .loc 1 335 0
127 .cfi_startproc
128 @ args = 0, pretend = 0, frame = 0
129 @ frame_needed = 0, uses_anonymous_args = 0
130 @ link register save eliminated.
131 .LVL1:
336:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** uint32_t tmpreg = 0;
337:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
338:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_CALIBRATION_VALUE(HSICalibrationValue));
339:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg = RCC->CR;
132 .loc 1 339 0
133 0000 034A ldr r2, .L11
134 0002 1368 ldr r3, [r2]
135 .LVL2:
340:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Clear HSITRIM[4:0] bits */
341:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg &= CR_HSITRIM_Mask;
136 .loc 1 341 0
137 0004 23F0F803 bic r3, r3, #248
138 .LVL3:
342:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Set the HSITRIM[4:0] bits according to HSICalibrationValue value */
343:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg |= (uint32_t)HSICalibrationValue << 3;
139 .loc 1 343 0
140 0008 43EAC000 orr r0, r3, r0, lsl #3
141 .LVL4:
344:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Store the new value */
345:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CR = tmpreg;
142 .loc 1 345 0
143 000c 1060 str r0, [r2]
144 000e 7047 bx lr
145 .L12:
146 .align 2
147 .L11:
148 0010 00100240 .word 1073876992
149 .cfi_endproc
150 .LFE32:
152 .section .text.RCC_HSICmd,"ax",%progbits
153 .align 2
154 .global RCC_HSICmd
155 .thumb
156 .thumb_func
158 RCC_HSICmd:
159 .LFB33:
346:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
347:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
348:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
349:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Enables or disables the Internal High Speed oscillator (HSI).
350:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @note HSI can not be stopped if it is used directly or through the PLL as system clock.
351:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param NewState: new state of the HSI. This parameter can be: ENABLE or DISABLE.
352:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
353:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
354:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_HSICmd(FunctionalState NewState)
355:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
160 .loc 1 355 0
161 .cfi_startproc
162 @ args = 0, pretend = 0, frame = 0
163 @ frame_needed = 0, uses_anonymous_args = 0
164 @ link register save eliminated.
165 .LVL5:
356:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
357:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_FUNCTIONAL_STATE(NewState));
358:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *(__IO uint32_t *) CR_HSION_BB = (uint32_t)NewState;
166 .loc 1 358 0
167 0000 014B ldr r3, .L14
168 0002 1860 str r0, [r3]
169 0004 7047 bx lr
170 .L15:
171 0006 00BF .align 2
172 .L14:
173 0008 00004242 .word 1111621632
174 .cfi_endproc
175 .LFE33:
177 .section .text.RCC_PLLConfig,"ax",%progbits
178 .align 2
179 .global RCC_PLLConfig
180 .thumb
181 .thumb_func
183 RCC_PLLConfig:
184 .LFB34:
359:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
360:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
361:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
362:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Configures the PLL clock source and multiplication factor.
363:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @note This function must be used only when the PLL is disabled.
364:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_PLLSource: specifies the PLL entry clock source.
365:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * For @b STM32_Connectivity_line_devices or @b STM32_Value_line_devices,
366:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * this parameter can be one of the following values:
367:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_PLLSource_HSI_Div2: HSI oscillator clock divided by 2 selected as PLL clock entry
368:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_PLLSource_PREDIV1: PREDIV1 clock selected as PLL clock entry
369:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * For @b other_STM32_devices, this parameter can be one of the following values:
370:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_PLLSource_HSI_Div2: HSI oscillator clock divided by 2 selected as PLL clock entry
371:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_PLLSource_HSE_Div1: HSE oscillator clock selected as PLL clock entry
372:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_PLLSource_HSE_Div2: HSE oscillator clock divided by 2 selected as PLL clock entry
373:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_PLLMul: specifies the PLL multiplication factor.
374:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * For @b STM32_Connectivity_line_devices, this parameter can be RCC_PLLMul_x where x:{[4,9], 6_
375:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * For @b other_STM32_devices, this parameter can be RCC_PLLMul_x where x:[2,16]
376:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
377:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
378:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul)
379:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
185 .loc 1 379 0
186 .cfi_startproc
187 @ args = 0, pretend = 0, frame = 0
188 @ frame_needed = 0, uses_anonymous_args = 0
189 @ link register save eliminated.
190 .LVL6:
380:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** uint32_t tmpreg = 0;
381:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
382:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
383:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_PLL_SOURCE(RCC_PLLSource));
384:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_PLL_MUL(RCC_PLLMul));
385:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
386:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg = RCC->CFGR;
191 .loc 1 386 0
192 0000 034A ldr r2, .L17
193 0002 5368 ldr r3, [r2, #4]
194 .LVL7:
387:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Clear PLLSRC, PLLXTPRE and PLLMUL[3:0] bits */
388:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg &= CFGR_PLL_Mask;
195 .loc 1 388 0
196 0004 23F47C13 bic r3, r3, #4128768
197 .LVL8:
198 0008 1943 orrs r1, r1, r3
199 .LVL9:
389:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Set the PLL configuration bits */
390:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg |= RCC_PLLSource | RCC_PLLMul;
200 .loc 1 390 0
201 000a 0843 orrs r0, r0, r1
202 .LVL10:
391:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Store the new value */
392:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CFGR = tmpreg;
203 .loc 1 392 0
204 000c 5060 str r0, [r2, #4]
205 000e 7047 bx lr
206 .L18:
207 .align 2
208 .L17:
209 0010 00100240 .word 1073876992
210 .cfi_endproc
211 .LFE34:
213 .section .text.RCC_PLLCmd,"ax",%progbits
214 .align 2
215 .global RCC_PLLCmd
216 .thumb
217 .thumb_func
219 RCC_PLLCmd:
220 .LFB35:
393:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
394:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
395:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
396:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Enables or disables the PLL.
397:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @note The PLL can not be disabled if it is used as system clock.
398:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param NewState: new state of the PLL. This parameter can be: ENABLE or DISABLE.
399:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
400:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
401:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_PLLCmd(FunctionalState NewState)
402:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
221 .loc 1 402 0
222 .cfi_startproc
223 @ args = 0, pretend = 0, frame = 0
224 @ frame_needed = 0, uses_anonymous_args = 0
225 @ link register save eliminated.
226 .LVL11:
403:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
404:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_FUNCTIONAL_STATE(NewState));
405:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
406:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *(__IO uint32_t *) CR_PLLON_BB = (uint32_t)NewState;
227 .loc 1 406 0
228 0000 014B ldr r3, .L20
229 0002 1860 str r0, [r3]
230 0004 7047 bx lr
231 .L21:
232 0006 00BF .align 2
233 .L20:
234 0008 60004242 .word 1111621728
235 .cfi_endproc
236 .LFE35:
238 .section .text.RCC_SYSCLKConfig,"ax",%progbits
239 .align 2
240 .global RCC_SYSCLKConfig
241 .thumb
242 .thumb_func
244 RCC_SYSCLKConfig:
245 .LFB36:
407:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
408:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
409:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined
410:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
411:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Configures the PREDIV1 division factor.
412:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @note
413:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * - This function must be used only when the PLL is disabled.
414:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * - This function applies only to STM32 Connectivity line and Value line
415:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * devices.
416:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_PREDIV1_Source: specifies the PREDIV1 clock source.
417:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be one of the following values:
418:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_PREDIV1_Source_HSE: HSE selected as PREDIV1 clock
419:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_PREDIV1_Source_PLL2: PLL2 selected as PREDIV1 clock
420:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @note
421:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * For @b STM32_Value_line_devices this parameter is always RCC_PREDIV1_Source_HSE
422:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_PREDIV1_Div: specifies the PREDIV1 clock division factor.
423:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be RCC_PREDIV1_Divx where x:[1,16]
424:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
425:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
426:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_PREDIV1Config(uint32_t RCC_PREDIV1_Source, uint32_t RCC_PREDIV1_Div)
427:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
428:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** uint32_t tmpreg = 0;
429:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
430:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
431:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_PREDIV1_SOURCE(RCC_PREDIV1_Source));
432:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_PREDIV1(RCC_PREDIV1_Div));
433:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
434:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg = RCC->CFGR2;
435:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Clear PREDIV1[3:0] and PREDIV1SRC bits */
436:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg &= ~(CFGR2_PREDIV1 | CFGR2_PREDIV1SRC);
437:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Set the PREDIV1 clock source and division factor */
438:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg |= RCC_PREDIV1_Source | RCC_PREDIV1_Div ;
439:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Store the new value */
440:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CFGR2 = tmpreg;
441:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
442:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #endif
443:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
444:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #ifdef STM32F10X_CL
445:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
446:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Configures the PREDIV2 division factor.
447:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @note
448:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * - This function must be used only when both PLL2 and PLL3 are disabled.
449:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * - This function applies only to STM32 Connectivity line devices.
450:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_PREDIV2_Div: specifies the PREDIV2 clock division factor.
451:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be RCC_PREDIV2_Divx where x:[1,16]
452:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
453:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
454:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_PREDIV2Config(uint32_t RCC_PREDIV2_Div)
455:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
456:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** uint32_t tmpreg = 0;
457:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
458:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
459:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_PREDIV2(RCC_PREDIV2_Div));
460:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
461:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg = RCC->CFGR2;
462:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Clear PREDIV2[3:0] bits */
463:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg &= ~CFGR2_PREDIV2;
464:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Set the PREDIV2 division factor */
465:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg |= RCC_PREDIV2_Div;
466:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Store the new value */
467:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CFGR2 = tmpreg;
468:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
469:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
470:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
471:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Configures the PLL2 multiplication factor.
472:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @note
473:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * - This function must be used only when the PLL2 is disabled.
474:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * - This function applies only to STM32 Connectivity line devices.
475:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_PLL2Mul: specifies the PLL2 multiplication factor.
476:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be RCC_PLL2Mul_x where x:{[8,14], 16, 20}
477:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
478:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
479:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_PLL2Config(uint32_t RCC_PLL2Mul)
480:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
481:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** uint32_t tmpreg = 0;
482:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
483:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
484:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_PLL2_MUL(RCC_PLL2Mul));
485:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
486:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg = RCC->CFGR2;
487:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Clear PLL2Mul[3:0] bits */
488:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg &= ~CFGR2_PLL2MUL;
489:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Set the PLL2 configuration bits */
490:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg |= RCC_PLL2Mul;
491:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Store the new value */
492:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CFGR2 = tmpreg;
493:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
494:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
495:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
496:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
497:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Enables or disables the PLL2.
498:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @note
499:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * - The PLL2 can not be disabled if it is used indirectly as system clock
500:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * (i.e. it is used as PLL clock entry that is used as System clock).
501:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * - This function applies only to STM32 Connectivity line devices.
502:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param NewState: new state of the PLL2. This parameter can be: ENABLE or DISABLE.
503:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
504:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
505:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_PLL2Cmd(FunctionalState NewState)
506:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
507:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
508:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_FUNCTIONAL_STATE(NewState));
509:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
510:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *(__IO uint32_t *) CR_PLL2ON_BB = (uint32_t)NewState;
511:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
512:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
513:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
514:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
515:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Configures the PLL3 multiplication factor.
516:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @note
517:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * - This function must be used only when the PLL3 is disabled.
518:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * - This function applies only to STM32 Connectivity line devices.
519:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_PLL3Mul: specifies the PLL3 multiplication factor.
520:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be RCC_PLL3Mul_x where x:{[8,14], 16, 20}
521:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
522:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
523:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_PLL3Config(uint32_t RCC_PLL3Mul)
524:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
525:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** uint32_t tmpreg = 0;
526:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
527:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
528:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_PLL3_MUL(RCC_PLL3Mul));
529:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
530:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg = RCC->CFGR2;
531:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Clear PLL3Mul[3:0] bits */
532:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg &= ~CFGR2_PLL3MUL;
533:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Set the PLL3 configuration bits */
534:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg |= RCC_PLL3Mul;
535:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Store the new value */
536:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CFGR2 = tmpreg;
537:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
538:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
539:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
540:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
541:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Enables or disables the PLL3.
542:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @note This function applies only to STM32 Connectivity line devices.
543:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param NewState: new state of the PLL3. This parameter can be: ENABLE or DISABLE.
544:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
545:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
546:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_PLL3Cmd(FunctionalState NewState)
547:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
548:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
549:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
550:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_FUNCTIONAL_STATE(NewState));
551:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *(__IO uint32_t *) CR_PLL3ON_BB = (uint32_t)NewState;
552:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
553:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #endif /* STM32F10X_CL */
554:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
555:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
556:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Configures the system clock (SYSCLK).
557:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_SYSCLKSource: specifies the clock source used as system clock.
558:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be one of the following values:
559:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_SYSCLKSource_HSI: HSI selected as system clock
560:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_SYSCLKSource_HSE: HSE selected as system clock
561:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_SYSCLKSource_PLLCLK: PLL selected as system clock
562:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
563:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
564:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource)
565:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
246 .loc 1 565 0
247 .cfi_startproc
248 @ args = 0, pretend = 0, frame = 0
249 @ frame_needed = 0, uses_anonymous_args = 0
250 @ link register save eliminated.
251 .LVL12:
566:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** uint32_t tmpreg = 0;
567:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
568:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_SYSCLK_SOURCE(RCC_SYSCLKSource));
569:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg = RCC->CFGR;
252 .loc 1 569 0
253 0000 034A ldr r2, .L23
254 0002 5368 ldr r3, [r2, #4]
255 .LVL13:
570:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Clear SW[1:0] bits */
571:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg &= CFGR_SW_Mask;
256 .loc 1 571 0
257 0004 23F00303 bic r3, r3, #3
258 .LVL14:
572:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Set SW[1:0] bits according to RCC_SYSCLKSource value */
573:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg |= RCC_SYSCLKSource;
259 .loc 1 573 0
260 0008 1843 orrs r0, r0, r3
261 .LVL15:
574:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Store the new value */
575:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CFGR = tmpreg;
262 .loc 1 575 0
263 000a 5060 str r0, [r2, #4]
264 000c 7047 bx lr
265 .L24:
266 000e 00BF .align 2
267 .L23:
268 0010 00100240 .word 1073876992
269 .cfi_endproc
270 .LFE36:
272 .section .text.RCC_GetSYSCLKSource,"ax",%progbits
273 .align 2
274 .global RCC_GetSYSCLKSource
275 .thumb
276 .thumb_func
278 RCC_GetSYSCLKSource:
279 .LFB37:
576:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
577:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
578:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
579:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Returns the clock source used as system clock.
580:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param None
581:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval The clock source used as system clock. The returned value can
582:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * be one of the following:
583:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * - 0x00: HSI used as system clock
584:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * - 0x04: HSE used as system clock
585:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * - 0x08: PLL used as system clock
586:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
587:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** uint8_t RCC_GetSYSCLKSource(void)
588:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
280 .loc 1 588 0
281 .cfi_startproc
282 @ args = 0, pretend = 0, frame = 0
283 @ frame_needed = 0, uses_anonymous_args = 0
284 @ link register save eliminated.
589:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** return ((uint8_t)(RCC->CFGR & CFGR_SWS_Mask));
285 .loc 1 589 0
286 0000 024B ldr r3, .L26
287 0002 5868 ldr r0, [r3, #4]
590:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
288 .loc 1 590 0
289 0004 00F00C00 and r0, r0, #12
290 0008 7047 bx lr
291 .L27:
292 000a 00BF .align 2
293 .L26:
294 000c 00100240 .word 1073876992
295 .cfi_endproc
296 .LFE37:
298 .section .text.RCC_HCLKConfig,"ax",%progbits
299 .align 2
300 .global RCC_HCLKConfig
301 .thumb
302 .thumb_func
304 RCC_HCLKConfig:
305 .LFB38:
591:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
592:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
593:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Configures the AHB clock (HCLK).
594:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_SYSCLK: defines the AHB clock divider. This clock is derived from
595:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * the system clock (SYSCLK).
596:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be one of the following values:
597:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_SYSCLK_Div1: AHB clock = SYSCLK
598:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_SYSCLK_Div2: AHB clock = SYSCLK/2
599:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_SYSCLK_Div4: AHB clock = SYSCLK/4
600:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_SYSCLK_Div8: AHB clock = SYSCLK/8
601:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_SYSCLK_Div16: AHB clock = SYSCLK/16
602:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_SYSCLK_Div64: AHB clock = SYSCLK/64
603:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_SYSCLK_Div128: AHB clock = SYSCLK/128
604:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_SYSCLK_Div256: AHB clock = SYSCLK/256
605:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_SYSCLK_Div512: AHB clock = SYSCLK/512
606:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
607:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
608:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_HCLKConfig(uint32_t RCC_SYSCLK)
609:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
306 .loc 1 609 0
307 .cfi_startproc
308 @ args = 0, pretend = 0, frame = 0
309 @ frame_needed = 0, uses_anonymous_args = 0
310 @ link register save eliminated.
311 .LVL16:
610:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** uint32_t tmpreg = 0;
611:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
612:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_HCLK(RCC_SYSCLK));
613:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg = RCC->CFGR;
312 .loc 1 613 0
313 0000 034A ldr r2, .L29
314 0002 5368 ldr r3, [r2, #4]
315 .LVL17:
614:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Clear HPRE[3:0] bits */
615:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg &= CFGR_HPRE_Reset_Mask;
316 .loc 1 615 0
317 0004 23F0F003 bic r3, r3, #240
318 .LVL18:
616:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Set HPRE[3:0] bits according to RCC_SYSCLK value */
617:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg |= RCC_SYSCLK;
319 .loc 1 617 0
320 0008 1843 orrs r0, r0, r3
321 .LVL19:
618:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Store the new value */
619:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CFGR = tmpreg;
322 .loc 1 619 0
323 000a 5060 str r0, [r2, #4]
324 000c 7047 bx lr
325 .L30:
326 000e 00BF .align 2
327 .L29:
328 0010 00100240 .word 1073876992
329 .cfi_endproc
330 .LFE38:
332 .section .text.RCC_PCLK1Config,"ax",%progbits
333 .align 2
334 .global RCC_PCLK1Config
335 .thumb
336 .thumb_func
338 RCC_PCLK1Config:
339 .LFB39:
620:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
621:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
622:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
623:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Configures the Low Speed APB clock (PCLK1).
624:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_HCLK: defines the APB1 clock divider. This clock is derived from
625:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * the AHB clock (HCLK).
626:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be one of the following values:
627:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_HCLK_Div1: APB1 clock = HCLK
628:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_HCLK_Div2: APB1 clock = HCLK/2
629:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_HCLK_Div4: APB1 clock = HCLK/4
630:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_HCLK_Div8: APB1 clock = HCLK/8
631:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_HCLK_Div16: APB1 clock = HCLK/16
632:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
633:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
634:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_PCLK1Config(uint32_t RCC_HCLK)
635:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
340 .loc 1 635 0
341 .cfi_startproc
342 @ args = 0, pretend = 0, frame = 0
343 @ frame_needed = 0, uses_anonymous_args = 0
344 @ link register save eliminated.
345 .LVL20:
636:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** uint32_t tmpreg = 0;
637:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
638:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_PCLK(RCC_HCLK));
639:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg = RCC->CFGR;
346 .loc 1 639 0
347 0000 034A ldr r2, .L32
348 0002 5368 ldr r3, [r2, #4]
349 .LVL21:
640:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Clear PPRE1[2:0] bits */
641:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg &= CFGR_PPRE1_Reset_Mask;
350 .loc 1 641 0
351 0004 23F4E063 bic r3, r3, #1792
352 .LVL22:
642:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Set PPRE1[2:0] bits according to RCC_HCLK value */
643:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg |= RCC_HCLK;
353 .loc 1 643 0
354 0008 1843 orrs r0, r0, r3
355 .LVL23:
644:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Store the new value */
645:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CFGR = tmpreg;
356 .loc 1 645 0
357 000a 5060 str r0, [r2, #4]
358 000c 7047 bx lr
359 .L33:
360 000e 00BF .align 2
361 .L32:
362 0010 00100240 .word 1073876992
363 .cfi_endproc
364 .LFE39:
366 .section .text.RCC_PCLK2Config,"ax",%progbits
367 .align 2
368 .global RCC_PCLK2Config
369 .thumb
370 .thumb_func
372 RCC_PCLK2Config:
373 .LFB40:
646:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
647:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
648:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
649:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Configures the High Speed APB clock (PCLK2).
650:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_HCLK: defines the APB2 clock divider. This clock is derived from
651:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * the AHB clock (HCLK).
652:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be one of the following values:
653:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_HCLK_Div1: APB2 clock = HCLK
654:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_HCLK_Div2: APB2 clock = HCLK/2
655:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_HCLK_Div4: APB2 clock = HCLK/4
656:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_HCLK_Div8: APB2 clock = HCLK/8
657:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_HCLK_Div16: APB2 clock = HCLK/16
658:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
659:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
660:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_PCLK2Config(uint32_t RCC_HCLK)
661:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
374 .loc 1 661 0
375 .cfi_startproc
376 @ args = 0, pretend = 0, frame = 0
377 @ frame_needed = 0, uses_anonymous_args = 0
378 @ link register save eliminated.
379 .LVL24:
662:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** uint32_t tmpreg = 0;
663:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
664:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_PCLK(RCC_HCLK));
665:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg = RCC->CFGR;
380 .loc 1 665 0
381 0000 034A ldr r2, .L35
382 0002 5368 ldr r3, [r2, #4]
383 .LVL25:
666:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Clear PPRE2[2:0] bits */
667:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg &= CFGR_PPRE2_Reset_Mask;
384 .loc 1 667 0
385 0004 23F46053 bic r3, r3, #14336
386 .LVL26:
668:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Set PPRE2[2:0] bits according to RCC_HCLK value */
669:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg |= RCC_HCLK << 3;
387 .loc 1 669 0
388 0008 43EAC000 orr r0, r3, r0, lsl #3
389 .LVL27:
670:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Store the new value */
671:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CFGR = tmpreg;
390 .loc 1 671 0
391 000c 5060 str r0, [r2, #4]
392 000e 7047 bx lr
393 .L36:
394 .align 2
395 .L35:
396 0010 00100240 .word 1073876992
397 .cfi_endproc
398 .LFE40:
400 .section .text.RCC_ITConfig,"ax",%progbits
401 .align 2
402 .global RCC_ITConfig
403 .thumb
404 .thumb_func
406 RCC_ITConfig:
407 .LFB41:
672:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
673:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
674:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
675:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Enables or disables the specified RCC interrupts.
676:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_IT: specifies the RCC interrupt sources to be enabled or disabled.
677:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *
678:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * For @b STM32_Connectivity_line_devices, this parameter can be any combination
679:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * of the following values
680:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_LSIRDY: LSI ready interrupt
681:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_LSERDY: LSE ready interrupt
682:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_HSIRDY: HSI ready interrupt
683:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_HSERDY: HSE ready interrupt
684:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_PLLRDY: PLL ready interrupt
685:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_PLL2RDY: PLL2 ready interrupt
686:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_PLL3RDY: PLL3 ready interrupt
687:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *
688:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * For @b other_STM32_devices, this parameter can be any combination of the
689:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * following values
690:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_LSIRDY: LSI ready interrupt
691:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_LSERDY: LSE ready interrupt
692:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_HSIRDY: HSI ready interrupt
693:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_HSERDY: HSE ready interrupt
694:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_PLLRDY: PLL ready interrupt
695:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *
696:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param NewState: new state of the specified RCC interrupts.
697:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be: ENABLE or DISABLE.
698:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
699:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
700:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState)
701:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
408 .loc 1 701 0
409 .cfi_startproc
410 @ args = 0, pretend = 0, frame = 0
411 @ frame_needed = 0, uses_anonymous_args = 0
412 @ link register save eliminated.
413 .LVL28:
702:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
703:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_IT(RCC_IT));
704:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_FUNCTIONAL_STATE(NewState));
705:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** if (NewState != DISABLE)
414 .loc 1 705 0
415 0000 21B1 cbz r1, .L38
706:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
707:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Perform Byte access to RCC_CIR bits to enable the selected interrupts */
708:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *(__IO uint8_t *) CIR_BYTE2_ADDRESS |= RCC_IT;
416 .loc 1 708 0
417 0002 054B ldr r3, .L40
418 0004 1A78 ldrb r2, [r3] @ zero_extendqisi2
419 0006 1043 orrs r0, r0, r2
420 .LVL29:
421 0008 1870 strb r0, [r3]
422 000a 7047 bx lr
423 .LVL30:
424 .L38:
709:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
710:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** else
711:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
712:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Perform Byte access to RCC_CIR bits to disable the selected interrupts */
713:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *(__IO uint8_t *) CIR_BYTE2_ADDRESS &= (uint8_t)~RCC_IT;
425 .loc 1 713 0
426 000c 024A ldr r2, .L40
427 000e 1378 ldrb r3, [r2] @ zero_extendqisi2
428 0010 23EA0000 bic r0, r3, r0
429 .LVL31:
430 0014 1070 strb r0, [r2]
431 0016 7047 bx lr
432 .L41:
433 .align 2
434 .L40:
435 0018 09100240 .word 1073877001
436 .cfi_endproc
437 .LFE41:
439 .section .text.RCC_USBCLKConfig,"ax",%progbits
440 .align 2
441 .global RCC_USBCLKConfig
442 .thumb
443 .thumb_func
445 RCC_USBCLKConfig:
446 .LFB42:
714:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
715:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
716:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
717:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #ifndef STM32F10X_CL
718:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
719:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Configures the USB clock (USBCLK).
720:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_USBCLKSource: specifies the USB clock source. This clock is
721:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * derived from the PLL output.
722:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be one of the following values:
723:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_USBCLKSource_PLLCLK_1Div5: PLL clock divided by 1,5 selected as USB
724:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * clock source
725:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_USBCLKSource_PLLCLK_Div1: PLL clock selected as USB clock source
726:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
727:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
728:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_USBCLKConfig(uint32_t RCC_USBCLKSource)
729:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
447 .loc 1 729 0
448 .cfi_startproc
449 @ args = 0, pretend = 0, frame = 0
450 @ frame_needed = 0, uses_anonymous_args = 0
451 @ link register save eliminated.
452 .LVL32:
730:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
731:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_USBCLK_SOURCE(RCC_USBCLKSource));
732:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
733:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *(__IO uint32_t *) CFGR_USBPRE_BB = RCC_USBCLKSource;
453 .loc 1 733 0
454 0000 014B ldr r3, .L43
455 0002 1860 str r0, [r3]
456 0004 7047 bx lr
457 .L44:
458 0006 00BF .align 2
459 .L43:
460 0008 D8004242 .word 1111621848
461 .cfi_endproc
462 .LFE42:
464 .section .text.RCC_ADCCLKConfig,"ax",%progbits
465 .align 2
466 .global RCC_ADCCLKConfig
467 .thumb
468 .thumb_func
470 RCC_ADCCLKConfig:
471 .LFB43:
734:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
735:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #else
736:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
737:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Configures the USB OTG FS clock (OTGFSCLK).
738:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This function applies only to STM32 Connectivity line devices.
739:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_OTGFSCLKSource: specifies the USB OTG FS clock source.
740:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This clock is derived from the PLL output.
741:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be one of the following values:
742:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_OTGFSCLKSource_PLLVCO_Div3: PLL VCO clock divided by 2 selected as USB OTG FS clo
743:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_OTGFSCLKSource_PLLVCO_Div2: PLL VCO clock divided by 2 selected as USB OTG FS clo
744:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
745:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
746:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_OTGFSCLKConfig(uint32_t RCC_OTGFSCLKSource)
747:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
748:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
749:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_OTGFSCLK_SOURCE(RCC_OTGFSCLKSource));
750:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
751:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *(__IO uint32_t *) CFGR_OTGFSPRE_BB = RCC_OTGFSCLKSource;
752:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
753:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #endif /* STM32F10X_CL */
754:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
755:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
756:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Configures the ADC clock (ADCCLK).
757:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_PCLK2: defines the ADC clock divider. This clock is derived from
758:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * the APB2 clock (PCLK2).
759:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be one of the following values:
760:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_PCLK2_Div2: ADC clock = PCLK2/2
761:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_PCLK2_Div4: ADC clock = PCLK2/4
762:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_PCLK2_Div6: ADC clock = PCLK2/6
763:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_PCLK2_Div8: ADC clock = PCLK2/8
764:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
765:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
766:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_ADCCLKConfig(uint32_t RCC_PCLK2)
767:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
472 .loc 1 767 0
473 .cfi_startproc
474 @ args = 0, pretend = 0, frame = 0
475 @ frame_needed = 0, uses_anonymous_args = 0
476 @ link register save eliminated.
477 .LVL33:
768:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** uint32_t tmpreg = 0;
769:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
770:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_ADCCLK(RCC_PCLK2));
771:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg = RCC->CFGR;
478 .loc 1 771 0
479 0000 034A ldr r2, .L46
480 0002 5368 ldr r3, [r2, #4]
481 .LVL34:
772:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Clear ADCPRE[1:0] bits */
773:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg &= CFGR_ADCPRE_Reset_Mask;
482 .loc 1 773 0
483 0004 23F44043 bic r3, r3, #49152
484 .LVL35:
774:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Set ADCPRE[1:0] bits according to RCC_PCLK2 value */
775:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmpreg |= RCC_PCLK2;
485 .loc 1 775 0
486 0008 1843 orrs r0, r0, r3
487 .LVL36:
776:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Store the new value */
777:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CFGR = tmpreg;
488 .loc 1 777 0
489 000a 5060 str r0, [r2, #4]
490 000c 7047 bx lr
491 .L47:
492 000e 00BF .align 2
493 .L46:
494 0010 00100240 .word 1073876992
495 .cfi_endproc
496 .LFE43:
498 .section .text.RCC_LSEConfig,"ax",%progbits
499 .align 2
500 .global RCC_LSEConfig
501 .thumb
502 .thumb_func
504 RCC_LSEConfig:
505 .LFB44:
778:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
779:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
780:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #ifdef STM32F10X_CL
781:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
782:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Configures the I2S2 clock source(I2S2CLK).
783:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @note
784:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * - This function must be called before enabling I2S2 APB clock.
785:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * - This function applies only to STM32 Connectivity line devices.
786:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_I2S2CLKSource: specifies the I2S2 clock source.
787:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be one of the following values:
788:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_I2S2CLKSource_SYSCLK: system clock selected as I2S2 clock entry
789:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_I2S2CLKSource_PLL3_VCO: PLL3 VCO clock selected as I2S2 clock entry
790:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
791:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
792:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_I2S2CLKConfig(uint32_t RCC_I2S2CLKSource)
793:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
794:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
795:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_I2S2CLK_SOURCE(RCC_I2S2CLKSource));
796:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
797:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *(__IO uint32_t *) CFGR2_I2S2SRC_BB = RCC_I2S2CLKSource;
798:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
799:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
800:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
801:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Configures the I2S3 clock source(I2S2CLK).
802:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @note
803:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * - This function must be called before enabling I2S3 APB clock.
804:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * - This function applies only to STM32 Connectivity line devices.
805:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_I2S3CLKSource: specifies the I2S3 clock source.
806:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be one of the following values:
807:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_I2S3CLKSource_SYSCLK: system clock selected as I2S3 clock entry
808:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_I2S3CLKSource_PLL3_VCO: PLL3 VCO clock selected as I2S3 clock entry
809:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
810:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
811:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_I2S3CLKConfig(uint32_t RCC_I2S3CLKSource)
812:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
813:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
814:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_I2S3CLK_SOURCE(RCC_I2S3CLKSource));
815:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
816:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *(__IO uint32_t *) CFGR2_I2S3SRC_BB = RCC_I2S3CLKSource;
817:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
818:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #endif /* STM32F10X_CL */
819:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
820:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
821:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Configures the External Low Speed oscillator (LSE).
822:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_LSE: specifies the new state of the LSE.
823:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be one of the following values:
824:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_LSE_OFF: LSE oscillator OFF
825:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_LSE_ON: LSE oscillator ON
826:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_LSE_Bypass: LSE oscillator bypassed with external clock
827:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
828:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
829:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_LSEConfig(uint8_t RCC_LSE)
830:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
506 .loc 1 830 0
507 .cfi_startproc
508 @ args = 0, pretend = 0, frame = 0
509 @ frame_needed = 0, uses_anonymous_args = 0
510 @ link register save eliminated.
511 .LVL37:
831:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
832:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_LSE(RCC_LSE));
833:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Reset LSEON and LSEBYP bits before configuring the LSE ------------------*/
834:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Reset LSEON bit */
835:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *(__IO uint8_t *) BDCR_ADDRESS = RCC_LSE_OFF;
512 .loc 1 835 0
513 0000 084B ldr r3, .L52
514 0002 0022 movs r2, #0
515 0004 1A70 strb r2, [r3]
836:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Reset LSEBYP bit */
837:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *(__IO uint8_t *) BDCR_ADDRESS = RCC_LSE_OFF;
516 .loc 1 837 0
517 0006 1A70 strb r2, [r3]
838:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Configure LSE (RCC_LSE_OFF is already covered by the code section above) */
839:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** switch(RCC_LSE)
518 .loc 1 839 0
519 0008 0128 cmp r0, #1
520 000a 02D0 beq .L50
521 000c 0428 cmp r0, #4
522 000e 04D0 beq .L51
523 0010 7047 bx lr
524 .L50:
840:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
841:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** case RCC_LSE_ON:
842:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Set LSEON bit */
843:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *(__IO uint8_t *) BDCR_ADDRESS = RCC_LSE_ON;
525 .loc 1 843 0
526 0012 0122 movs r2, #1
527 0014 034B ldr r3, .L52
528 0016 1A70 strb r2, [r3]
844:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** break;
529 .loc 1 844 0
530 0018 7047 bx lr
531 .L51:
845:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
846:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** case RCC_LSE_Bypass:
847:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Set LSEBYP and LSEON bits */
848:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *(__IO uint8_t *) BDCR_ADDRESS = RCC_LSE_Bypass | RCC_LSE_ON;
532 .loc 1 848 0
533 001a 0522 movs r2, #5
534 001c 014B ldr r3, .L52
535 001e 1A70 strb r2, [r3]
536 0020 7047 bx lr
537 .L53:
538 0022 00BF .align 2
539 .L52:
540 0024 20100240 .word 1073877024
541 .cfi_endproc
542 .LFE44:
544 .section .text.RCC_LSICmd,"ax",%progbits
545 .align 2
546 .global RCC_LSICmd
547 .thumb
548 .thumb_func
550 RCC_LSICmd:
551 .LFB45:
849:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** break;
850:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
851:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** default:
852:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** break;
853:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
854:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
855:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
856:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
857:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Enables or disables the Internal Low Speed oscillator (LSI).
858:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @note LSI can not be disabled if the IWDG is running.
859:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param NewState: new state of the LSI. This parameter can be: ENABLE or DISABLE.
860:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
861:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
862:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_LSICmd(FunctionalState NewState)
863:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
552 .loc 1 863 0
553 .cfi_startproc
554 @ args = 0, pretend = 0, frame = 0
555 @ frame_needed = 0, uses_anonymous_args = 0
556 @ link register save eliminated.
557 .LVL38:
864:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
865:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_FUNCTIONAL_STATE(NewState));
866:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *(__IO uint32_t *) CSR_LSION_BB = (uint32_t)NewState;
558 .loc 1 866 0
559 0000 014B ldr r3, .L55
560 0002 1860 str r0, [r3]
561 0004 7047 bx lr
562 .L56:
563 0006 00BF .align 2
564 .L55:
565 0008 80044242 .word 1111622784
566 .cfi_endproc
567 .LFE45:
569 .section .text.RCC_RTCCLKConfig,"ax",%progbits
570 .align 2
571 .global RCC_RTCCLKConfig
572 .thumb
573 .thumb_func
575 RCC_RTCCLKConfig:
576 .LFB46:
867:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
868:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
869:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
870:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Configures the RTC clock (RTCCLK).
871:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @note Once the RTC clock is selected it can't be changed unless the Backup domain is reset.
872:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_RTCCLKSource: specifies the RTC clock source.
873:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be one of the following values:
874:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_RTCCLKSource_LSE: LSE selected as RTC clock
875:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_RTCCLKSource_LSI: LSI selected as RTC clock
876:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_RTCCLKSource_HSE_Div128: HSE clock divided by 128 selected as RTC clock
877:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
878:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
879:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource)
880:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
577 .loc 1 880 0
578 .cfi_startproc
579 @ args = 0, pretend = 0, frame = 0
580 @ frame_needed = 0, uses_anonymous_args = 0
581 @ link register save eliminated.
582 .LVL39:
881:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
882:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_RTCCLK_SOURCE(RCC_RTCCLKSource));
883:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Select the RTC clock source */
884:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->BDCR |= RCC_RTCCLKSource;
583 .loc 1 884 0
584 0000 024A ldr r2, .L58
585 0002 136A ldr r3, [r2, #32]
586 0004 1843 orrs r0, r0, r3
587 .LVL40:
588 0006 1062 str r0, [r2, #32]
589 0008 7047 bx lr
590 .L59:
591 000a 00BF .align 2
592 .L58:
593 000c 00100240 .word 1073876992
594 .cfi_endproc
595 .LFE46:
597 .section .text.RCC_RTCCLKCmd,"ax",%progbits
598 .align 2
599 .global RCC_RTCCLKCmd
600 .thumb
601 .thumb_func
603 RCC_RTCCLKCmd:
604 .LFB47:
885:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
886:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
887:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
888:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Enables or disables the RTC clock.
889:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @note This function must be used only after the RTC clock was selected using the RCC_RTCCLKCo
890:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param NewState: new state of the RTC clock. This parameter can be: ENABLE or DISABLE.
891:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
892:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
893:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_RTCCLKCmd(FunctionalState NewState)
894:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
605 .loc 1 894 0
606 .cfi_startproc
607 @ args = 0, pretend = 0, frame = 0
608 @ frame_needed = 0, uses_anonymous_args = 0
609 @ link register save eliminated.
610 .LVL41:
895:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
896:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_FUNCTIONAL_STATE(NewState));
897:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *(__IO uint32_t *) BDCR_RTCEN_BB = (uint32_t)NewState;
611 .loc 1 897 0
612 0000 014B ldr r3, .L61
613 0002 1860 str r0, [r3]
614 0004 7047 bx lr
615 .L62:
616 0006 00BF .align 2
617 .L61:
618 0008 3C044242 .word 1111622716
619 .cfi_endproc
620 .LFE47:
622 .section .text.RCC_GetClocksFreq,"ax",%progbits
623 .align 2
624 .global RCC_GetClocksFreq
625 .thumb
626 .thumb_func
628 RCC_GetClocksFreq:
629 .LFB48:
898:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
899:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
900:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
901:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Returns the frequencies of different on chip clocks.
902:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_Clocks: pointer to a RCC_ClocksTypeDef structure which will hold
903:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * the clocks frequencies.
904:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @note The result of this function could be not correct when using
905:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * fractional value for HSE crystal.
906:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
907:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
908:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks)
909:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
630 .loc 1 909 0
631 .cfi_startproc
632 @ args = 0, pretend = 0, frame = 0
633 @ frame_needed = 0, uses_anonymous_args = 0
634 @ link register save eliminated.
635 .LVL42:
636 0000 10B4 push {r4}
637 .cfi_def_cfa_offset 4
638 .cfi_offset 4, -4
639 .LVL43:
910:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** uint32_t tmp = 0, pllmull = 0, pllsource = 0, presc = 0;
911:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
912:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #ifdef STM32F10X_CL
913:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** uint32_t prediv1source = 0, prediv1factor = 0, prediv2factor = 0, pll2mull = 0;
914:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #endif /* STM32F10X_CL */
915:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
916:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL)
917:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** uint32_t prediv1factor = 0;
918:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #endif
919:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
920:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Get SYSCLK source -------------------------------------------------------*/
921:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmp = RCC->CFGR & CFGR_SWS_Mask;
640 .loc 1 921 0
641 0002 274B ldr r3, .L73
642 0004 5B68 ldr r3, [r3, #4]
643 .LVL44:
644 0006 03F00C03 and r3, r3, #12
645 .LVL45:
922:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
923:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** switch (tmp)
646 .loc 1 923 0
647 000a 042B cmp r3, #4
648 000c 05D0 beq .L65
649 000e 082B cmp r3, #8
650 0010 06D0 beq .L66
651 0012 F3B9 cbnz r3, .L71
924:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
925:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** case 0x00: /* HSI used as system clock */
926:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC_Clocks->SYSCLK_Frequency = HSI_VALUE;
652 .loc 1 926 0
653 0014 234B ldr r3, .L73+4
654 .LVL46:
655 0016 0360 str r3, [r0]
927:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** break;
656 .loc 1 927 0
657 0018 1DE0 b .L68
658 .LVL47:
659 .L65:
928:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** case 0x04: /* HSE used as system clock */
929:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC_Clocks->SYSCLK_Frequency = HSE_VALUE;
660 .loc 1 929 0
661 001a 224B ldr r3, .L73+4
662 .LVL48:
663 001c 0360 str r3, [r0]
930:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** break;
664 .loc 1 930 0
665 001e 1AE0 b .L68
666 .LVL49:
667 .L66:
931:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** case 0x08: /* PLL used as system clock */
932:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
933:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Get PLL clock source and multiplication factor ----------------------*/
934:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** pllmull = RCC->CFGR & CFGR_PLLMull_Mask;
668 .loc 1 934 0
669 0020 1F4A ldr r2, .L73
670 0022 5368 ldr r3, [r2, #4]
671 .LVL50:
935:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** pllsource = RCC->CFGR & CFGR_PLLSRC_Mask;
672 .loc 1 935 0
673 0024 5268 ldr r2, [r2, #4]
674 .LVL51:
936:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
937:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #ifndef STM32F10X_CL
938:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** pllmull = ( pllmull >> 18) + 2;
675 .loc 1 938 0
676 0026 C3F38343 ubfx r3, r3, #18, #4
677 .LVL52:
678 002a 0233 adds r3, r3, #2
679 .LVL53:
939:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
940:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** if (pllsource == 0x00)
680 .loc 1 940 0
681 002c 12F4803F tst r2, #65536
682 0030 04D1 bne .L69
941:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {/* HSI oscillator clock divided by 2 selected as PLL clock entry */
942:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC_Clocks->SYSCLK_Frequency = (HSI_VALUE >> 1) * pllmull;
683 .loc 1 942 0
684 0032 1D4A ldr r2, .L73+8
685 .LVL54:
686 0034 02FB03F3 mul r3, r2, r3
687 .LVL55:
688 0038 0360 str r3, [r0]
689 003a 0CE0 b .L68
690 .LVL56:
691 .L69:
943:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
944:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** else
945:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
946:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL)
947:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** prediv1factor = (RCC->CFGR2 & CFGR2_PREDIV1) + 1;
948:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* HSE oscillator clock selected as PREDIV1 clock entry */
949:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC_Clocks->SYSCLK_Frequency = (HSE_VALUE / prediv1factor) * pllmull;
950:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #else
951:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* HSE selected as PLL clock entry */
952:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** if ((RCC->CFGR & CFGR_PLLXTPRE_Mask) != (uint32_t)RESET)
692 .loc 1 952 0
693 003c 184A ldr r2, .L73
694 .LVL57:
695 003e 5268 ldr r2, [r2, #4]
696 0040 12F4003F tst r2, #131072
953:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {/* HSE oscillator clock divided by 2 */
954:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC_Clocks->SYSCLK_Frequency = (HSE_VALUE >> 1) * pllmull;
697 .loc 1 954 0
698 0044 14BF ite ne
699 0046 184A ldrne r2, .L73+8
955:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
956:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** else
957:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
958:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC_Clocks->SYSCLK_Frequency = HSE_VALUE * pllmull;
700 .loc 1 958 0
701 0048 164A ldreq r2, .L73+4
702 004a 02FB03F3 mul r3, r2, r3
703 .LVL58:
704 004e 0360 str r3, [r0]
705 0050 01E0 b .L68
706 .LVL59:
707 .L71:
959:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
960:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #endif
961:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
962:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #else
963:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** pllmull = pllmull >> 18;
964:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
965:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** if (pllmull != 0x0D)
966:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
967:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** pllmull += 2;
968:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
969:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** else
970:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** { /* PLL multiplication factor = PLL input clock * 6.5 */
971:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** pllmull = 13 / 2;
972:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
973:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
974:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** if (pllsource == 0x00)
975:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {/* HSI oscillator clock divided by 2 selected as PLL clock entry */
976:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC_Clocks->SYSCLK_Frequency = (HSI_VALUE >> 1) * pllmull;
977:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
978:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** else
979:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {/* PREDIV1 selected as PLL clock entry */
980:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
981:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Get PREDIV1 clock source and division factor */
982:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** prediv1source = RCC->CFGR2 & CFGR2_PREDIV1SRC;
983:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** prediv1factor = (RCC->CFGR2 & CFGR2_PREDIV1) + 1;
984:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
985:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** if (prediv1source == 0)
986:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** { /* HSE oscillator clock selected as PREDIV1 clock entry */
987:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC_Clocks->SYSCLK_Frequency = (HSE_VALUE / prediv1factor) * pllmull;
988:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
989:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** else
990:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {/* PLL2 clock selected as PREDIV1 clock entry */
991:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
992:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Get PREDIV2 division factor and PLL2 multiplication factor */
993:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** prediv2factor = ((RCC->CFGR2 & CFGR2_PREDIV2) >> 4) + 1;
994:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** pll2mull = ((RCC->CFGR2 & CFGR2_PLL2MUL) >> 8 ) + 2;
995:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC_Clocks->SYSCLK_Frequency = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor)
996:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
997:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
998:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #endif /* STM32F10X_CL */
999:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** break;
1000:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1001:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** default:
1002:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC_Clocks->SYSCLK_Frequency = HSI_VALUE;
708 .loc 1 1002 0
709 0052 144B ldr r3, .L73+4
710 .LVL60:
711 0054 0360 str r3, [r0]
712 .LVL61:
713 .L68:
1003:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** break;
1004:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1005:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1006:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Compute HCLK, PCLK1, PCLK2 and ADCCLK clocks frequencies ----------------*/
1007:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Get HCLK prescaler */
1008:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmp = RCC->CFGR & CFGR_HPRE_Set_Mask;
714 .loc 1 1008 0
715 0056 124A ldr r2, .L73
716 0058 5368 ldr r3, [r2, #4]
717 .LVL62:
1009:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmp = tmp >> 4;
718 .loc 1 1009 0
719 005a C3F30313 ubfx r3, r3, #4, #4
720 .LVL63:
1010:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** presc = APBAHBPrescTable[tmp];
721 .loc 1 1010 0
722 005e 134C ldr r4, .L73+12
723 0060 E15C ldrb r1, [r4, r3] @ zero_extendqisi2
724 0062 C9B2 uxtb r1, r1
725 .LVL64:
1011:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* HCLK clock frequency */
1012:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC_Clocks->HCLK_Frequency = RCC_Clocks->SYSCLK_Frequency >> presc;
726 .loc 1 1012 0
727 0064 0368 ldr r3, [r0]
728 .LVL65:
729 0066 CB40 lsrs r3, r3, r1
730 0068 4360 str r3, [r0, #4]
1013:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Get PCLK1 prescaler */
1014:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmp = RCC->CFGR & CFGR_PPRE1_Set_Mask;
731 .loc 1 1014 0
732 006a 5168 ldr r1, [r2, #4]
733 .LVL66:
1015:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmp = tmp >> 8;
734 .loc 1 1015 0
735 006c C1F30221 ubfx r1, r1, #8, #3
736 .LVL67:
1016:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** presc = APBAHBPrescTable[tmp];
737 .loc 1 1016 0
738 0070 615C ldrb r1, [r4, r1] @ zero_extendqisi2
739 .LVL68:
740 0072 C9B2 uxtb r1, r1
741 .LVL69:
1017:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* PCLK1 clock frequency */
1018:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC_Clocks->PCLK1_Frequency = RCC_Clocks->HCLK_Frequency >> presc;
742 .loc 1 1018 0
743 0074 23FA01F1 lsr r1, r3, r1
744 .LVL70:
745 0078 8160 str r1, [r0, #8]
1019:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Get PCLK2 prescaler */
1020:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmp = RCC->CFGR & CFGR_PPRE2_Set_Mask;
746 .loc 1 1020 0
747 007a 5168 ldr r1, [r2, #4]
748 .LVL71:
1021:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmp = tmp >> 11;
749 .loc 1 1021 0
750 007c C1F3C221 ubfx r1, r1, #11, #3
751 .LVL72:
1022:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** presc = APBAHBPrescTable[tmp];
752 .loc 1 1022 0
753 0080 615C ldrb r1, [r4, r1] @ zero_extendqisi2
754 .LVL73:
755 0082 C9B2 uxtb r1, r1
756 .LVL74:
1023:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* PCLK2 clock frequency */
1024:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC_Clocks->PCLK2_Frequency = RCC_Clocks->HCLK_Frequency >> presc;
757 .loc 1 1024 0
758 0084 CB40 lsrs r3, r3, r1
759 0086 C360 str r3, [r0, #12]
1025:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Get ADCCLK prescaler */
1026:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmp = RCC->CFGR & CFGR_ADCPRE_Set_Mask;
760 .loc 1 1026 0
761 0088 5268 ldr r2, [r2, #4]
762 .LVL75:
1027:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmp = tmp >> 14;
763 .loc 1 1027 0
764 008a C2F38132 ubfx r2, r2, #14, #2
765 .LVL76:
1028:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** presc = ADCPrescTable[tmp];
766 .loc 1 1028 0
767 008e 0849 ldr r1, .L73+16
768 .LVL77:
769 0090 8A5C ldrb r2, [r1, r2] @ zero_extendqisi2
770 .LVL78:
771 0092 D2B2 uxtb r2, r2
772 .LVL79:
1029:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* ADCCLK clock frequency */
1030:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC_Clocks->ADCCLK_Frequency = RCC_Clocks->PCLK2_Frequency / presc;
773 .loc 1 1030 0
774 0094 B3FBF2F3 udiv r3, r3, r2
775 0098 0361 str r3, [r0, #16]
1031:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
776 .loc 1 1031 0
777 009a 5DF8044B ldr r4, [sp], #4
778 .cfi_restore 4
779 .cfi_def_cfa_offset 0
780 009e 7047 bx lr
781 .L74:
782 .align 2
783 .L73:
784 00a0 00100240 .word 1073876992
785 00a4 00127A00 .word 8000000
786 00a8 00093D00 .word 4000000
787 00ac 00000000 .word .LANCHOR0
788 00b0 00000000 .word .LANCHOR1
789 .cfi_endproc
790 .LFE48:
792 .section .text.RCC_AHBPeriphClockCmd,"ax",%progbits
793 .align 2
794 .global RCC_AHBPeriphClockCmd
795 .thumb
796 .thumb_func
798 RCC_AHBPeriphClockCmd:
799 .LFB49:
1032:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1033:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
1034:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Enables or disables the AHB peripheral clock.
1035:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_AHBPeriph: specifies the AHB peripheral to gates its clock.
1036:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *
1037:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * For @b STM32_Connectivity_line_devices, this parameter can be any combination
1038:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * of the following values:
1039:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_AHBPeriph_DMA1
1040:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_AHBPeriph_DMA2
1041:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_AHBPeriph_SRAM
1042:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_AHBPeriph_FLITF
1043:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_AHBPeriph_CRC
1044:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_AHBPeriph_OTG_FS
1045:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_AHBPeriph_ETH_MAC
1046:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_AHBPeriph_ETH_MAC_Tx
1047:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_AHBPeriph_ETH_MAC_Rx
1048:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *
1049:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * For @b other_STM32_devices, this parameter can be any combination of the
1050:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * following values:
1051:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_AHBPeriph_DMA1
1052:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_AHBPeriph_DMA2
1053:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_AHBPeriph_SRAM
1054:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_AHBPeriph_FLITF
1055:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_AHBPeriph_CRC
1056:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_AHBPeriph_FSMC
1057:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_AHBPeriph_SDIO
1058:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *
1059:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @note SRAM and FLITF clock can be disabled only during sleep mode.
1060:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param NewState: new state of the specified peripheral clock.
1061:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be: ENABLE or DISABLE.
1062:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
1063:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
1064:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState)
1065:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
800 .loc 1 1065 0
801 .cfi_startproc
802 @ args = 0, pretend = 0, frame = 0
803 @ frame_needed = 0, uses_anonymous_args = 0
804 @ link register save eliminated.
805 .LVL80:
1066:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
1067:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_AHB_PERIPH(RCC_AHBPeriph));
1068:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_FUNCTIONAL_STATE(NewState));
1069:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1070:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** if (NewState != DISABLE)
806 .loc 1 1070 0
807 0000 21B1 cbz r1, .L76
1071:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1072:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->AHBENR |= RCC_AHBPeriph;
808 .loc 1 1072 0
809 0002 054A ldr r2, .L78
810 0004 5369 ldr r3, [r2, #20]
811 0006 1843 orrs r0, r0, r3
812 .LVL81:
813 0008 5061 str r0, [r2, #20]
814 000a 7047 bx lr
815 .LVL82:
816 .L76:
1073:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1074:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** else
1075:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1076:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->AHBENR &= ~RCC_AHBPeriph;
817 .loc 1 1076 0
818 000c 024A ldr r2, .L78
819 000e 5369 ldr r3, [r2, #20]
820 0010 23EA0000 bic r0, r3, r0
821 .LVL83:
822 0014 5061 str r0, [r2, #20]
823 0016 7047 bx lr
824 .L79:
825 .align 2
826 .L78:
827 0018 00100240 .word 1073876992
828 .cfi_endproc
829 .LFE49:
831 .section .text.RCC_APB2PeriphClockCmd,"ax",%progbits
832 .align 2
833 .global RCC_APB2PeriphClockCmd
834 .thumb
835 .thumb_func
837 RCC_APB2PeriphClockCmd:
838 .LFB50:
1077:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1078:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1079:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1080:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
1081:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Enables or disables the High Speed APB (APB2) peripheral clock.
1082:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_APB2Periph: specifies the APB2 peripheral to gates its clock.
1083:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be any combination of the following values:
1084:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_APB2Periph_AFIO, RCC_APB2Periph_GPIOA, RCC_APB2Periph_GPIOB,
1085:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_APB2Periph_GPIOC, RCC_APB2Periph_GPIOD, RCC_APB2Periph_GPIOE,
1086:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_APB2Periph_GPIOF, RCC_APB2Periph_GPIOG, RCC_APB2Periph_ADC1,
1087:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_APB2Periph_ADC2, RCC_APB2Periph_TIM1, RCC_APB2Periph_SPI1,
1088:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_APB2Periph_TIM8, RCC_APB2Periph_USART1, RCC_APB2Periph_ADC3,
1089:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_APB2Periph_TIM15, RCC_APB2Periph_TIM16, RCC_APB2Periph_TIM17,
1090:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_APB2Periph_TIM9, RCC_APB2Periph_TIM10, RCC_APB2Periph_TIM11
1091:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param NewState: new state of the specified peripheral clock.
1092:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be: ENABLE or DISABLE.
1093:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
1094:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
1095:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState)
1096:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
839 .loc 1 1096 0
840 .cfi_startproc
841 @ args = 0, pretend = 0, frame = 0
842 @ frame_needed = 0, uses_anonymous_args = 0
843 @ link register save eliminated.
844 .LVL84:
1097:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
1098:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_APB2_PERIPH(RCC_APB2Periph));
1099:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_FUNCTIONAL_STATE(NewState));
1100:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** if (NewState != DISABLE)
845 .loc 1 1100 0
846 0000 21B1 cbz r1, .L81
1101:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1102:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->APB2ENR |= RCC_APB2Periph;
847 .loc 1 1102 0
848 0002 054A ldr r2, .L83
849 0004 9369 ldr r3, [r2, #24]
850 0006 1843 orrs r0, r0, r3
851 .LVL85:
852 0008 9061 str r0, [r2, #24]
853 000a 7047 bx lr
854 .LVL86:
855 .L81:
1103:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1104:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** else
1105:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1106:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->APB2ENR &= ~RCC_APB2Periph;
856 .loc 1 1106 0
857 000c 024A ldr r2, .L83
858 000e 9369 ldr r3, [r2, #24]
859 0010 23EA0000 bic r0, r3, r0
860 .LVL87:
861 0014 9061 str r0, [r2, #24]
862 0016 7047 bx lr
863 .L84:
864 .align 2
865 .L83:
866 0018 00100240 .word 1073876992
867 .cfi_endproc
868 .LFE50:
870 .section .text.RCC_APB1PeriphClockCmd,"ax",%progbits
871 .align 2
872 .global RCC_APB1PeriphClockCmd
873 .thumb
874 .thumb_func
876 RCC_APB1PeriphClockCmd:
877 .LFB51:
1107:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1108:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1109:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1110:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
1111:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Enables or disables the Low Speed APB (APB1) peripheral clock.
1112:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_APB1Periph: specifies the APB1 peripheral to gates its clock.
1113:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be any combination of the following values:
1114:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_APB1Periph_TIM2, RCC_APB1Periph_TIM3, RCC_APB1Periph_TIM4,
1115:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_APB1Periph_TIM5, RCC_APB1Periph_TIM6, RCC_APB1Periph_TIM7,
1116:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_APB1Periph_WWDG, RCC_APB1Periph_SPI2, RCC_APB1Periph_SPI3,
1117:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_APB1Periph_USART2, RCC_APB1Periph_USART3, RCC_APB1Periph_USART4,
1118:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_APB1Periph_USART5, RCC_APB1Periph_I2C1, RCC_APB1Periph_I2C2,
1119:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_APB1Periph_USB, RCC_APB1Periph_CAN1, RCC_APB1Periph_BKP,
1120:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_APB1Periph_PWR, RCC_APB1Periph_DAC, RCC_APB1Periph_CEC,
1121:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_APB1Periph_TIM12, RCC_APB1Periph_TIM13, RCC_APB1Periph_TIM14
1122:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param NewState: new state of the specified peripheral clock.
1123:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be: ENABLE or DISABLE.
1124:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
1125:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
1126:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState)
1127:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
878 .loc 1 1127 0
879 .cfi_startproc
880 @ args = 0, pretend = 0, frame = 0
881 @ frame_needed = 0, uses_anonymous_args = 0
882 @ link register save eliminated.
883 .LVL88:
1128:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
1129:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_APB1_PERIPH(RCC_APB1Periph));
1130:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_FUNCTIONAL_STATE(NewState));
1131:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** if (NewState != DISABLE)
884 .loc 1 1131 0
885 0000 21B1 cbz r1, .L86
1132:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1133:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->APB1ENR |= RCC_APB1Periph;
886 .loc 1 1133 0
887 0002 054A ldr r2, .L88
888 0004 D369 ldr r3, [r2, #28]
889 0006 1843 orrs r0, r0, r3
890 .LVL89:
891 0008 D061 str r0, [r2, #28]
892 000a 7047 bx lr
893 .LVL90:
894 .L86:
1134:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1135:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** else
1136:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1137:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->APB1ENR &= ~RCC_APB1Periph;
895 .loc 1 1137 0
896 000c 024A ldr r2, .L88
897 000e D369 ldr r3, [r2, #28]
898 0010 23EA0000 bic r0, r3, r0
899 .LVL91:
900 0014 D061 str r0, [r2, #28]
901 0016 7047 bx lr
902 .L89:
903 .align 2
904 .L88:
905 0018 00100240 .word 1073876992
906 .cfi_endproc
907 .LFE51:
909 .section .text.RCC_APB2PeriphResetCmd,"ax",%progbits
910 .align 2
911 .global RCC_APB2PeriphResetCmd
912 .thumb
913 .thumb_func
915 RCC_APB2PeriphResetCmd:
916 .LFB52:
1138:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1139:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1140:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1141:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #ifdef STM32F10X_CL
1142:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
1143:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Forces or releases AHB peripheral reset.
1144:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @note This function applies only to STM32 Connectivity line devices.
1145:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_AHBPeriph: specifies the AHB peripheral to reset.
1146:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be any combination of the following values:
1147:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_AHBPeriph_OTG_FS
1148:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_AHBPeriph_ETH_MAC
1149:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param NewState: new state of the specified peripheral reset.
1150:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be: ENABLE or DISABLE.
1151:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
1152:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
1153:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_AHBPeriphResetCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState)
1154:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1155:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
1156:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_AHB_PERIPH_RESET(RCC_AHBPeriph));
1157:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_FUNCTIONAL_STATE(NewState));
1158:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1159:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** if (NewState != DISABLE)
1160:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1161:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->AHBRSTR |= RCC_AHBPeriph;
1162:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1163:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** else
1164:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1165:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->AHBRSTR &= ~RCC_AHBPeriph;
1166:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1167:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1168:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** #endif /* STM32F10X_CL */
1169:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1170:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
1171:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Forces or releases High Speed APB (APB2) peripheral reset.
1172:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_APB2Periph: specifies the APB2 peripheral to reset.
1173:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be any combination of the following values:
1174:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_APB2Periph_AFIO, RCC_APB2Periph_GPIOA, RCC_APB2Periph_GPIOB,
1175:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_APB2Periph_GPIOC, RCC_APB2Periph_GPIOD, RCC_APB2Periph_GPIOE,
1176:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_APB2Periph_GPIOF, RCC_APB2Periph_GPIOG, RCC_APB2Periph_ADC1,
1177:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_APB2Periph_ADC2, RCC_APB2Periph_TIM1, RCC_APB2Periph_SPI1,
1178:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_APB2Periph_TIM8, RCC_APB2Periph_USART1, RCC_APB2Periph_ADC3,
1179:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_APB2Periph_TIM15, RCC_APB2Periph_TIM16, RCC_APB2Periph_TIM17,
1180:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_APB2Periph_TIM9, RCC_APB2Periph_TIM10, RCC_APB2Periph_TIM11
1181:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param NewState: new state of the specified peripheral reset.
1182:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be: ENABLE or DISABLE.
1183:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
1184:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
1185:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState)
1186:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
917 .loc 1 1186 0
918 .cfi_startproc
919 @ args = 0, pretend = 0, frame = 0
920 @ frame_needed = 0, uses_anonymous_args = 0
921 @ link register save eliminated.
922 .LVL92:
1187:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
1188:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_APB2_PERIPH(RCC_APB2Periph));
1189:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_FUNCTIONAL_STATE(NewState));
1190:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** if (NewState != DISABLE)
923 .loc 1 1190 0
924 0000 21B1 cbz r1, .L91
1191:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1192:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->APB2RSTR |= RCC_APB2Periph;
925 .loc 1 1192 0
926 0002 054A ldr r2, .L93
927 0004 D368 ldr r3, [r2, #12]
928 0006 1843 orrs r0, r0, r3
929 .LVL93:
930 0008 D060 str r0, [r2, #12]
931 000a 7047 bx lr
932 .LVL94:
933 .L91:
1193:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1194:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** else
1195:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1196:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->APB2RSTR &= ~RCC_APB2Periph;
934 .loc 1 1196 0
935 000c 024A ldr r2, .L93
936 000e D368 ldr r3, [r2, #12]
937 0010 23EA0000 bic r0, r3, r0
938 .LVL95:
939 0014 D060 str r0, [r2, #12]
940 0016 7047 bx lr
941 .L94:
942 .align 2
943 .L93:
944 0018 00100240 .word 1073876992
945 .cfi_endproc
946 .LFE52:
948 .section .text.RCC_APB1PeriphResetCmd,"ax",%progbits
949 .align 2
950 .global RCC_APB1PeriphResetCmd
951 .thumb
952 .thumb_func
954 RCC_APB1PeriphResetCmd:
955 .LFB53:
1197:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1198:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1199:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1200:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
1201:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Forces or releases Low Speed APB (APB1) peripheral reset.
1202:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_APB1Periph: specifies the APB1 peripheral to reset.
1203:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be any combination of the following values:
1204:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_APB1Periph_TIM2, RCC_APB1Periph_TIM3, RCC_APB1Periph_TIM4,
1205:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_APB1Periph_TIM5, RCC_APB1Periph_TIM6, RCC_APB1Periph_TIM7,
1206:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_APB1Periph_WWDG, RCC_APB1Periph_SPI2, RCC_APB1Periph_SPI3,
1207:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_APB1Periph_USART2, RCC_APB1Periph_USART3, RCC_APB1Periph_USART4,
1208:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_APB1Periph_USART5, RCC_APB1Periph_I2C1, RCC_APB1Periph_I2C2,
1209:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_APB1Periph_USB, RCC_APB1Periph_CAN1, RCC_APB1Periph_BKP,
1210:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_APB1Periph_PWR, RCC_APB1Periph_DAC, RCC_APB1Periph_CEC,
1211:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_APB1Periph_TIM12, RCC_APB1Periph_TIM13, RCC_APB1Periph_TIM14
1212:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param NewState: new state of the specified peripheral clock.
1213:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be: ENABLE or DISABLE.
1214:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
1215:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
1216:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState)
1217:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
956 .loc 1 1217 0
957 .cfi_startproc
958 @ args = 0, pretend = 0, frame = 0
959 @ frame_needed = 0, uses_anonymous_args = 0
960 @ link register save eliminated.
961 .LVL96:
1218:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
1219:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_APB1_PERIPH(RCC_APB1Periph));
1220:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_FUNCTIONAL_STATE(NewState));
1221:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** if (NewState != DISABLE)
962 .loc 1 1221 0
963 0000 21B1 cbz r1, .L96
1222:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1223:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->APB1RSTR |= RCC_APB1Periph;
964 .loc 1 1223 0
965 0002 054A ldr r2, .L98
966 0004 1369 ldr r3, [r2, #16]
967 0006 1843 orrs r0, r0, r3
968 .LVL97:
969 0008 1061 str r0, [r2, #16]
970 000a 7047 bx lr
971 .LVL98:
972 .L96:
1224:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1225:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** else
1226:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1227:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->APB1RSTR &= ~RCC_APB1Periph;
973 .loc 1 1227 0
974 000c 024A ldr r2, .L98
975 000e 1369 ldr r3, [r2, #16]
976 0010 23EA0000 bic r0, r3, r0
977 .LVL99:
978 0014 1061 str r0, [r2, #16]
979 0016 7047 bx lr
980 .L99:
981 .align 2
982 .L98:
983 0018 00100240 .word 1073876992
984 .cfi_endproc
985 .LFE53:
987 .section .text.RCC_BackupResetCmd,"ax",%progbits
988 .align 2
989 .global RCC_BackupResetCmd
990 .thumb
991 .thumb_func
993 RCC_BackupResetCmd:
994 .LFB54:
1228:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1229:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1230:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1231:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
1232:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Forces or releases the Backup domain reset.
1233:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param NewState: new state of the Backup domain reset.
1234:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be: ENABLE or DISABLE.
1235:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
1236:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
1237:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_BackupResetCmd(FunctionalState NewState)
1238:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
995 .loc 1 1238 0
996 .cfi_startproc
997 @ args = 0, pretend = 0, frame = 0
998 @ frame_needed = 0, uses_anonymous_args = 0
999 @ link register save eliminated.
1000 .LVL100:
1239:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
1240:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_FUNCTIONAL_STATE(NewState));
1241:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *(__IO uint32_t *) BDCR_BDRST_BB = (uint32_t)NewState;
1001 .loc 1 1241 0
1002 0000 014B ldr r3, .L101
1003 0002 1860 str r0, [r3]
1004 0004 7047 bx lr
1005 .L102:
1006 0006 00BF .align 2
1007 .L101:
1008 0008 40044242 .word 1111622720
1009 .cfi_endproc
1010 .LFE54:
1012 .section .text.RCC_ClockSecuritySystemCmd,"ax",%progbits
1013 .align 2
1014 .global RCC_ClockSecuritySystemCmd
1015 .thumb
1016 .thumb_func
1018 RCC_ClockSecuritySystemCmd:
1019 .LFB55:
1242:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1243:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1244:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
1245:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Enables or disables the Clock Security System.
1246:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param NewState: new state of the Clock Security System..
1247:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * This parameter can be: ENABLE or DISABLE.
1248:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
1249:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
1250:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_ClockSecuritySystemCmd(FunctionalState NewState)
1251:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1020 .loc 1 1251 0
1021 .cfi_startproc
1022 @ args = 0, pretend = 0, frame = 0
1023 @ frame_needed = 0, uses_anonymous_args = 0
1024 @ link register save eliminated.
1025 .LVL101:
1252:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
1253:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_FUNCTIONAL_STATE(NewState));
1254:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *(__IO uint32_t *) CR_CSSON_BB = (uint32_t)NewState;
1026 .loc 1 1254 0
1027 0000 014B ldr r3, .L104
1028 0002 1860 str r0, [r3]
1029 0004 7047 bx lr
1030 .L105:
1031 0006 00BF .align 2
1032 .L104:
1033 0008 4C004242 .word 1111621708
1034 .cfi_endproc
1035 .LFE55:
1037 .section .text.RCC_MCOConfig,"ax",%progbits
1038 .align 2
1039 .global RCC_MCOConfig
1040 .thumb
1041 .thumb_func
1043 RCC_MCOConfig:
1044 .LFB56:
1255:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1256:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1257:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
1258:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Selects the clock source to output on MCO pin.
1259:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_MCO: specifies the clock source to output.
1260:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *
1261:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * For @b STM32_Connectivity_line_devices, this parameter can be one of the
1262:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * following values:
1263:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_MCO_NoClock: No clock selected
1264:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_MCO_SYSCLK: System clock selected
1265:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_MCO_HSI: HSI oscillator clock selected
1266:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_MCO_HSE: HSE oscillator clock selected
1267:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_MCO_PLLCLK_Div2: PLL clock divided by 2 selected
1268:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_MCO_PLL2CLK: PLL2 clock selected
1269:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_MCO_PLL3CLK_Div2: PLL3 clock divided by 2 selected
1270:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_MCO_XT1: External 3-25 MHz oscillator clock selected
1271:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_MCO_PLL3CLK: PLL3 clock selected
1272:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *
1273:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * For @b other_STM32_devices, this parameter can be one of the following values:
1274:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_MCO_NoClock: No clock selected
1275:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_MCO_SYSCLK: System clock selected
1276:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_MCO_HSI: HSI oscillator clock selected
1277:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_MCO_HSE: HSE oscillator clock selected
1278:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_MCO_PLLCLK_Div2: PLL clock divided by 2 selected
1279:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *
1280:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
1281:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
1282:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_MCOConfig(uint8_t RCC_MCO)
1283:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1045 .loc 1 1283 0
1046 .cfi_startproc
1047 @ args = 0, pretend = 0, frame = 0
1048 @ frame_needed = 0, uses_anonymous_args = 0
1049 @ link register save eliminated.
1050 .LVL102:
1284:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
1285:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_MCO(RCC_MCO));
1286:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1287:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Perform Byte access to MCO bits to select the MCO source */
1288:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *(__IO uint8_t *) CFGR_BYTE4_ADDRESS = RCC_MCO;
1051 .loc 1 1288 0
1052 0000 014B ldr r3, .L107
1053 0002 1870 strb r0, [r3]
1054 0004 7047 bx lr
1055 .L108:
1056 0006 00BF .align 2
1057 .L107:
1058 0008 07100240 .word 1073876999
1059 .cfi_endproc
1060 .LFE56:
1062 .section .text.RCC_GetFlagStatus,"ax",%progbits
1063 .align 2
1064 .global RCC_GetFlagStatus
1065 .thumb
1066 .thumb_func
1068 RCC_GetFlagStatus:
1069 .LFB57:
1289:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1290:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1291:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
1292:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Checks whether the specified RCC flag is set or not.
1293:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_FLAG: specifies the flag to check.
1294:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *
1295:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * For @b STM32_Connectivity_line_devices, this parameter can be one of the
1296:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * following values:
1297:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_FLAG_HSIRDY: HSI oscillator clock ready
1298:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_FLAG_HSERDY: HSE oscillator clock ready
1299:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_FLAG_PLLRDY: PLL clock ready
1300:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_FLAG_PLL2RDY: PLL2 clock ready
1301:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_FLAG_PLL3RDY: PLL3 clock ready
1302:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_FLAG_LSERDY: LSE oscillator clock ready
1303:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_FLAG_LSIRDY: LSI oscillator clock ready
1304:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_FLAG_PINRST: Pin reset
1305:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_FLAG_PORRST: POR/PDR reset
1306:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_FLAG_SFTRST: Software reset
1307:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_FLAG_IWDGRST: Independent Watchdog reset
1308:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_FLAG_WWDGRST: Window Watchdog reset
1309:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_FLAG_LPWRRST: Low Power reset
1310:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *
1311:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * For @b other_STM32_devices, this parameter can be one of the following values:
1312:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_FLAG_HSIRDY: HSI oscillator clock ready
1313:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_FLAG_HSERDY: HSE oscillator clock ready
1314:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_FLAG_PLLRDY: PLL clock ready
1315:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_FLAG_LSERDY: LSE oscillator clock ready
1316:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_FLAG_LSIRDY: LSI oscillator clock ready
1317:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_FLAG_PINRST: Pin reset
1318:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_FLAG_PORRST: POR/PDR reset
1319:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_FLAG_SFTRST: Software reset
1320:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_FLAG_IWDGRST: Independent Watchdog reset
1321:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_FLAG_WWDGRST: Window Watchdog reset
1322:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_FLAG_LPWRRST: Low Power reset
1323:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *
1324:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval The new state of RCC_FLAG (SET or RESET).
1325:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
1326:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG)
1327:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1070 .loc 1 1327 0
1071 .cfi_startproc
1072 @ args = 0, pretend = 0, frame = 0
1073 @ frame_needed = 0, uses_anonymous_args = 0
1074 @ link register save eliminated.
1075 .LVL103:
1328:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** uint32_t tmp = 0;
1329:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** uint32_t statusreg = 0;
1330:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** FlagStatus bitstatus = RESET;
1331:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
1332:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_FLAG(RCC_FLAG));
1333:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1334:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Get the RCC register index */
1335:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmp = RCC_FLAG >> 5;
1076 .loc 1 1335 0
1077 0000 4309 lsrs r3, r0, #5
1078 .LVL104:
1336:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** if (tmp == 1) /* The flag to check is in CR register */
1079 .loc 1 1336 0
1080 0002 012B cmp r3, #1
1081 0004 02D1 bne .L110
1337:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1338:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** statusreg = RCC->CR;
1082 .loc 1 1338 0
1083 0006 074B ldr r3, .L113
1084 .LVL105:
1085 0008 1A68 ldr r2, [r3]
1086 .LVL106:
1087 000a 04E0 b .L111
1088 .LVL107:
1089 .L110:
1339:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1340:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** else if (tmp == 2) /* The flag to check is in BDCR register */
1090 .loc 1 1340 0
1091 000c 022B cmp r3, #2
1341:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1342:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** statusreg = RCC->BDCR;
1092 .loc 1 1342 0
1093 000e 054B ldr r3, .L113
1094 .LVL108:
1095 0010 0CBF ite eq
1096 0012 1A6A ldreq r2, [r3, #32]
1097 .LVL109:
1343:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1344:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** else /* The flag to check is in CSR register */
1345:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1346:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** statusreg = RCC->CSR;
1098 .loc 1 1346 0
1099 0014 5A6A ldrne r2, [r3, #36]
1100 .LVL110:
1101 .L111:
1347:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1348:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1349:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Get the flag position */
1350:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** tmp = RCC_FLAG & FLAG_Mask;
1351:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** if ((statusreg & ((uint32_t)1 << tmp)) != (uint32_t)RESET)
1102 .loc 1 1351 0
1103 0016 00F01F03 and r3, r0, #31
1104 001a 22FA03F0 lsr r0, r2, r3
1105 .LVL111:
1352:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1353:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** bitstatus = SET;
1354:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1355:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** else
1356:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1357:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** bitstatus = RESET;
1358:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1359:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1360:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Return the flag status */
1361:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** return bitstatus;
1362:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1106 .loc 1 1362 0
1107 001e 00F00100 and r0, r0, #1
1108 0022 7047 bx lr
1109 .L114:
1110 .align 2
1111 .L113:
1112 0024 00100240 .word 1073876992
1113 .cfi_endproc
1114 .LFE57:
1116 .section .text.RCC_WaitForHSEStartUp,"ax",%progbits
1117 .align 2
1118 .global RCC_WaitForHSEStartUp
1119 .thumb
1120 .thumb_func
1122 RCC_WaitForHSEStartUp:
1123 .LFB31:
305:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** __IO uint32_t StartUpCounter = 0;
1124 .loc 1 305 0
1125 .cfi_startproc
1126 @ args = 0, pretend = 0, frame = 8
1127 @ frame_needed = 0, uses_anonymous_args = 0
1128 0000 10B5 push {r4, lr}
1129 .cfi_def_cfa_offset 8
1130 .cfi_offset 4, -8
1131 .cfi_offset 14, -4
1132 0002 82B0 sub sp, sp, #8
1133 .cfi_def_cfa_offset 16
306:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** ErrorStatus status = ERROR;
1134 .loc 1 306 0
1135 0004 0023 movs r3, #0
1136 0006 0193 str r3, [sp, #4]
1137 .LVL112:
313:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** StartUpCounter++;
1138 .loc 1 313 0
1139 0008 3124 movs r4, #49
1140 .LVL113:
1141 .L117:
313:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** StartUpCounter++;
1142 .loc 1 313 0 is_stmt 0 discriminator 2
1143 000a 2046 mov r0, r4
1144 000c FFF7FEFF bl RCC_GetFlagStatus
1145 .LVL114:
314:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** } while((StartUpCounter != HSE_STARTUP_TIMEOUT) && (HSEStatus == RESET));
1146 .loc 1 314 0 is_stmt 1 discriminator 2
1147 0010 019B ldr r3, [sp, #4]
1148 0012 0133 adds r3, r3, #1
1149 0014 0193 str r3, [sp, #4]
315:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1150 .loc 1 315 0 discriminator 2
1151 0016 019B ldr r3, [sp, #4]
1152 0018 B3F5A06F cmp r3, #1280
1153 001c 01D0 beq .L116
315:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1154 .loc 1 315 0 is_stmt 0 discriminator 1
1155 001e 0028 cmp r0, #0
1156 0020 F3D0 beq .L117
1157 .L116:
317:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1158 .loc 1 317 0 is_stmt 1
1159 0022 3120 movs r0, #49
1160 .LVL115:
1161 0024 FFF7FEFF bl RCC_GetFlagStatus
1162 .LVL116:
326:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1163 .loc 1 326 0
1164 0028 0030 adds r0, r0, #0
1165 .LVL117:
1166 002a 18BF it ne
1167 002c 0120 movne r0, #1
1168 002e 02B0 add sp, sp, #8
1169 .cfi_def_cfa_offset 8
1170 @ sp needed
1171 0030 10BD pop {r4, pc}
1172 .cfi_endproc
1173 .LFE31:
1175 0032 00BF .section .text.RCC_ClearFlag,"ax",%progbits
1176 .align 2
1177 .global RCC_ClearFlag
1178 .thumb
1179 .thumb_func
1181 RCC_ClearFlag:
1182 .LFB58:
1363:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1364:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
1365:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Clears the RCC reset flags.
1366:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @note The reset flags are: RCC_FLAG_PINRST, RCC_FLAG_PORRST, RCC_FLAG_SFTRST,
1367:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * RCC_FLAG_IWDGRST, RCC_FLAG_WWDGRST, RCC_FLAG_LPWRRST
1368:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param None
1369:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
1370:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
1371:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_ClearFlag(void)
1372:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1183 .loc 1 1372 0
1184 .cfi_startproc
1185 @ args = 0, pretend = 0, frame = 0
1186 @ frame_needed = 0, uses_anonymous_args = 0
1187 @ link register save eliminated.
1373:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Set RMVF bit to clear the reset flags */
1374:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** RCC->CSR |= CSR_RMVF_Set;
1188 .loc 1 1374 0
1189 0000 024A ldr r2, .L121
1190 0002 536A ldr r3, [r2, #36]
1191 0004 43F08073 orr r3, r3, #16777216
1192 0008 5362 str r3, [r2, #36]
1193 000a 7047 bx lr
1194 .L122:
1195 .align 2
1196 .L121:
1197 000c 00100240 .word 1073876992
1198 .cfi_endproc
1199 .LFE58:
1201 .section .text.RCC_GetITStatus,"ax",%progbits
1202 .align 2
1203 .global RCC_GetITStatus
1204 .thumb
1205 .thumb_func
1207 RCC_GetITStatus:
1208 .LFB59:
1375:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1376:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1377:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
1378:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Checks whether the specified RCC interrupt has occurred or not.
1379:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_IT: specifies the RCC interrupt source to check.
1380:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *
1381:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * For @b STM32_Connectivity_line_devices, this parameter can be one of the
1382:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * following values:
1383:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_LSIRDY: LSI ready interrupt
1384:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_LSERDY: LSE ready interrupt
1385:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_HSIRDY: HSI ready interrupt
1386:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_HSERDY: HSE ready interrupt
1387:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_PLLRDY: PLL ready interrupt
1388:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_PLL2RDY: PLL2 ready interrupt
1389:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_PLL3RDY: PLL3 ready interrupt
1390:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_CSS: Clock Security System interrupt
1391:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *
1392:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * For @b other_STM32_devices, this parameter can be one of the following values:
1393:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_LSIRDY: LSI ready interrupt
1394:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_LSERDY: LSE ready interrupt
1395:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_HSIRDY: HSI ready interrupt
1396:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_HSERDY: HSE ready interrupt
1397:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_PLLRDY: PLL ready interrupt
1398:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_CSS: Clock Security System interrupt
1399:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *
1400:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval The new state of RCC_IT (SET or RESET).
1401:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
1402:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** ITStatus RCC_GetITStatus(uint8_t RCC_IT)
1403:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1209 .loc 1 1403 0
1210 .cfi_startproc
1211 @ args = 0, pretend = 0, frame = 0
1212 @ frame_needed = 0, uses_anonymous_args = 0
1213 @ link register save eliminated.
1214 .LVL118:
1404:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** ITStatus bitstatus = RESET;
1405:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
1406:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_GET_IT(RCC_IT));
1407:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1408:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the status of the specified RCC interrupt */
1409:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** if ((RCC->CIR & RCC_IT) != (uint32_t)RESET)
1215 .loc 1 1409 0
1216 0000 034B ldr r3, .L124
1217 0002 9B68 ldr r3, [r3, #8]
1218 .LVL119:
1219 0004 1842 tst r0, r3
1410:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1411:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** bitstatus = SET;
1412:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1413:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** else
1414:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1415:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** bitstatus = RESET;
1416:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1417:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1418:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Return the RCC_IT status */
1419:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** return bitstatus;
1420:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** }
1220 .loc 1 1420 0
1221 0006 14BF ite ne
1222 0008 0120 movne r0, #1
1223 .LVL120:
1224 000a 0020 moveq r0, #0
1225 000c 7047 bx lr
1226 .L125:
1227 000e 00BF .align 2
1228 .L124:
1229 0010 00100240 .word 1073876992
1230 .cfi_endproc
1231 .LFE59:
1233 .section .text.RCC_ClearITPendingBit,"ax",%progbits
1234 .align 2
1235 .global RCC_ClearITPendingBit
1236 .thumb
1237 .thumb_func
1239 RCC_ClearITPendingBit:
1240 .LFB60:
1421:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1422:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /**
1423:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @brief Clears the RCC's interrupt pending bits.
1424:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @param RCC_IT: specifies the interrupt pending bit to clear.
1425:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *
1426:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * For @b STM32_Connectivity_line_devices, this parameter can be any combination
1427:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * of the following values:
1428:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_LSIRDY: LSI ready interrupt
1429:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_LSERDY: LSE ready interrupt
1430:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_HSIRDY: HSI ready interrupt
1431:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_HSERDY: HSE ready interrupt
1432:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_PLLRDY: PLL ready interrupt
1433:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_PLL2RDY: PLL2 ready interrupt
1434:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_PLL3RDY: PLL3 ready interrupt
1435:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_CSS: Clock Security System interrupt
1436:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *
1437:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * For @b other_STM32_devices, this parameter can be any combination of the
1438:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * following values:
1439:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_LSIRDY: LSI ready interrupt
1440:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_LSERDY: LSE ready interrupt
1441:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_HSIRDY: HSI ready interrupt
1442:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_HSERDY: HSE ready interrupt
1443:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_PLLRDY: PLL ready interrupt
1444:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *
1445:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @arg RCC_IT_CSS: Clock Security System interrupt
1446:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** * @retval None
1447:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** */
1448:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** void RCC_ClearITPendingBit(uint8_t RCC_IT)
1449:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** {
1241 .loc 1 1449 0
1242 .cfi_startproc
1243 @ args = 0, pretend = 0, frame = 0
1244 @ frame_needed = 0, uses_anonymous_args = 0
1245 @ link register save eliminated.
1246 .LVL121:
1450:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Check the parameters */
1451:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** assert_param(IS_RCC_CLEAR_IT(RCC_IT));
1452:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c ****
1453:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** /* Perform Byte access to RCC_CIR[23:16] bits to clear the selected interrupt
1454:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** pending bits */
1455:./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c **** *(__IO uint8_t *) CIR_BYTE3_ADDRESS = RCC_IT;
1247 .loc 1 1455 0
1248 0000 014B ldr r3, .L127
1249 0002 1870 strb r0, [r3]
1250 0004 7047 bx lr
1251 .L128:
1252 0006 00BF .align 2
1253 .L127:
1254 0008 0A100240 .word 1073877002
1255 .cfi_endproc
1256 .LFE60:
1258 .section .data.ADCPrescTable,"aw",%progbits
1259 .align 2
1260 .set .LANCHOR1,. + 0
1263 ADCPrescTable:
1264 0000 02 .byte 2
1265 0001 04 .byte 4
1266 0002 06 .byte 6
1267 0003 08 .byte 8
1268 .section .data.APBAHBPrescTable,"aw",%progbits
1269 .align 2
1270 .set .LANCHOR0,. + 0
1273 APBAHBPrescTable:
1274 0000 00 .byte 0
1275 0001 00 .byte 0
1276 0002 00 .byte 0
1277 0003 00 .byte 0
1278 0004 01 .byte 1
1279 0005 02 .byte 2
1280 0006 03 .byte 3
1281 0007 04 .byte 4
1282 0008 01 .byte 1
1283 0009 02 .byte 2
1284 000a 03 .byte 3
1285 000b 04 .byte 4
1286 000c 06 .byte 6
1287 000d 07 .byte 7
1288 000e 08 .byte 8
1289 000f 09 .byte 9
1290 .text
1291 .Letext0:
1292 .file 2 "c:\\program files (x86)\\gnu tools arm embedded\\4.9 2015q1\\arm-none-eabi\\include\\mach
1293 .file 3 "c:\\program files (x86)\\gnu tools arm embedded\\4.9 2015q1\\arm-none-eabi\\include\\stdi
1294 .file 4 "./lib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/stm32f10x.h"
1295 .file 5 "./lib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_rcc.h"
1296 .file 6 "./lib/CMSIS/CM3/CoreSupport/core_cm3.h"
DEFINED SYMBOLS
*ABS*:00000000 stm32f10x_rcc.c
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:19 .text.RCC_DeInit:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:24 .text.RCC_DeInit:00000000 RCC_DeInit
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:62 .text.RCC_DeInit:00000038 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:68 .text.RCC_HSEConfig:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:73 .text.RCC_HSEConfig:00000000 RCC_HSEConfig
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:114 .text.RCC_HSEConfig:00000038 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:119 .text.RCC_AdjustHSICalibrationValue:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:124 .text.RCC_AdjustHSICalibrationValue:00000000 RCC_AdjustHSICalibrationValue
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:148 .text.RCC_AdjustHSICalibrationValue:00000010 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:153 .text.RCC_HSICmd:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:158 .text.RCC_HSICmd:00000000 RCC_HSICmd
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:173 .text.RCC_HSICmd:00000008 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:178 .text.RCC_PLLConfig:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:183 .text.RCC_PLLConfig:00000000 RCC_PLLConfig
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:209 .text.RCC_PLLConfig:00000010 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:214 .text.RCC_PLLCmd:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:219 .text.RCC_PLLCmd:00000000 RCC_PLLCmd
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:234 .text.RCC_PLLCmd:00000008 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:239 .text.RCC_SYSCLKConfig:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:244 .text.RCC_SYSCLKConfig:00000000 RCC_SYSCLKConfig
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:268 .text.RCC_SYSCLKConfig:00000010 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:273 .text.RCC_GetSYSCLKSource:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:278 .text.RCC_GetSYSCLKSource:00000000 RCC_GetSYSCLKSource
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:294 .text.RCC_GetSYSCLKSource:0000000c $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:299 .text.RCC_HCLKConfig:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:304 .text.RCC_HCLKConfig:00000000 RCC_HCLKConfig
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:328 .text.RCC_HCLKConfig:00000010 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:333 .text.RCC_PCLK1Config:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:338 .text.RCC_PCLK1Config:00000000 RCC_PCLK1Config
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:362 .text.RCC_PCLK1Config:00000010 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:367 .text.RCC_PCLK2Config:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:372 .text.RCC_PCLK2Config:00000000 RCC_PCLK2Config
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:396 .text.RCC_PCLK2Config:00000010 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:401 .text.RCC_ITConfig:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:406 .text.RCC_ITConfig:00000000 RCC_ITConfig
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:435 .text.RCC_ITConfig:00000018 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:440 .text.RCC_USBCLKConfig:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:445 .text.RCC_USBCLKConfig:00000000 RCC_USBCLKConfig
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:460 .text.RCC_USBCLKConfig:00000008 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:465 .text.RCC_ADCCLKConfig:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:470 .text.RCC_ADCCLKConfig:00000000 RCC_ADCCLKConfig
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:494 .text.RCC_ADCCLKConfig:00000010 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:499 .text.RCC_LSEConfig:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:504 .text.RCC_LSEConfig:00000000 RCC_LSEConfig
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:540 .text.RCC_LSEConfig:00000024 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:545 .text.RCC_LSICmd:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:550 .text.RCC_LSICmd:00000000 RCC_LSICmd
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:565 .text.RCC_LSICmd:00000008 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:570 .text.RCC_RTCCLKConfig:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:575 .text.RCC_RTCCLKConfig:00000000 RCC_RTCCLKConfig
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:593 .text.RCC_RTCCLKConfig:0000000c $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:598 .text.RCC_RTCCLKCmd:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:603 .text.RCC_RTCCLKCmd:00000000 RCC_RTCCLKCmd
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:618 .text.RCC_RTCCLKCmd:00000008 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:623 .text.RCC_GetClocksFreq:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:628 .text.RCC_GetClocksFreq:00000000 RCC_GetClocksFreq
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:784 .text.RCC_GetClocksFreq:000000a0 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:793 .text.RCC_AHBPeriphClockCmd:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:798 .text.RCC_AHBPeriphClockCmd:00000000 RCC_AHBPeriphClockCmd
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:827 .text.RCC_AHBPeriphClockCmd:00000018 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:832 .text.RCC_APB2PeriphClockCmd:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:837 .text.RCC_APB2PeriphClockCmd:00000000 RCC_APB2PeriphClockCmd
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:866 .text.RCC_APB2PeriphClockCmd:00000018 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:871 .text.RCC_APB1PeriphClockCmd:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:876 .text.RCC_APB1PeriphClockCmd:00000000 RCC_APB1PeriphClockCmd
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:905 .text.RCC_APB1PeriphClockCmd:00000018 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:910 .text.RCC_APB2PeriphResetCmd:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:915 .text.RCC_APB2PeriphResetCmd:00000000 RCC_APB2PeriphResetCmd
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:944 .text.RCC_APB2PeriphResetCmd:00000018 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:949 .text.RCC_APB1PeriphResetCmd:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:954 .text.RCC_APB1PeriphResetCmd:00000000 RCC_APB1PeriphResetCmd
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:983 .text.RCC_APB1PeriphResetCmd:00000018 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:988 .text.RCC_BackupResetCmd:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:993 .text.RCC_BackupResetCmd:00000000 RCC_BackupResetCmd
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:1008 .text.RCC_BackupResetCmd:00000008 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:1013 .text.RCC_ClockSecuritySystemCmd:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:1018 .text.RCC_ClockSecuritySystemCmd:00000000 RCC_ClockSecuritySystemCmd
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:1033 .text.RCC_ClockSecuritySystemCmd:00000008 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:1038 .text.RCC_MCOConfig:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:1043 .text.RCC_MCOConfig:00000000 RCC_MCOConfig
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:1058 .text.RCC_MCOConfig:00000008 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:1063 .text.RCC_GetFlagStatus:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:1068 .text.RCC_GetFlagStatus:00000000 RCC_GetFlagStatus
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:1112 .text.RCC_GetFlagStatus:00000024 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:1117 .text.RCC_WaitForHSEStartUp:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:1122 .text.RCC_WaitForHSEStartUp:00000000 RCC_WaitForHSEStartUp
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:1176 .text.RCC_ClearFlag:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:1181 .text.RCC_ClearFlag:00000000 RCC_ClearFlag
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:1197 .text.RCC_ClearFlag:0000000c $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:1202 .text.RCC_GetITStatus:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:1207 .text.RCC_GetITStatus:00000000 RCC_GetITStatus
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:1229 .text.RCC_GetITStatus:00000010 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:1234 .text.RCC_ClearITPendingBit:00000000 $t
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:1239 .text.RCC_ClearITPendingBit:00000000 RCC_ClearITPendingBit
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:1254 .text.RCC_ClearITPendingBit:00000008 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:1259 .data.ADCPrescTable:00000000 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:1263 .data.ADCPrescTable:00000000 ADCPrescTable
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:1269 .data.APBAHBPrescTable:00000000 $d
C:\Users\lwngim1\AppData\Local\Temp\cckU7y8M.s:1273 .data.APBAHBPrescTable:00000000 APBAHBPrescTable
.debug_frame:00000010 $d
NO UNDEFINED SYMBOLS
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