199 lines
6.9 KiB
C
199 lines
6.9 KiB
C
/*
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* Copyright (c) 2015-2016 Freescale Semiconductor, Inc.
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* Copyright 2016-2017 NXP
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* All rights reserved.
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*
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* THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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/*!
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* @file s32_core_cm0.h
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*
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* @page misra_violations MISRA-C:2012 violations
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*
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* @section [global]
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* Violates MISRA 2012 Advisory Directive 4.9, Function-like macro
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* Function-like macros are used instead of inline functions in order to ensure
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* that the performance will not be decreased if the functions will not be
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* inlined by the compiler.
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*
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* @section [global]
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* Violates MISRA 2012 Advisory Rule 2.5, Global macro not referenced.
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* The macros defined are used only on some of the drivers, so this might be reported
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* when the analysis is made only on one driver.
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*/
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/*
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* Tool Chains:
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* GNUC flag is defined also by ARM compiler - it shows the current major version of the compatible GCC version
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* __GNUC__ : GNU Compiler Collection
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* __ghs__ : Green Hills ARM Compiler
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* __ICCARM__ : IAR ARM Compiler
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* __DCC__ : Wind River Diab Compiler
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* __ARMCC_VERSION : ARM Compiler
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*/
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#if !defined (CORE_CM0_H)
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#define CORE_CM0_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** \brief BKPT_ASM
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*
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* Macro to be used to trigger an debug interrupt
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*/
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#if defined ( __DCC__ )
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#define BKPT_ASM __asm ("BKPT 0\n\t")
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#else
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#define BKPT_ASM __asm ("BKPT #0\n\t")
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#endif
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/** \brief Enable interrupts
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*/
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#if defined (__GNUC__)
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#define ENABLE_INTERRUPTS() __asm volatile ("cpsie i" : : : "memory");
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#elif defined ( __DCC__ )
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#define ENABLE_INTERRUPTS() __asm (".short 0xb662");
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#else
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#define ENABLE_INTERRUPTS() __asm("cpsie i")
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#endif
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/** \brief Disable interrupts
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*/
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#if defined (__GNUC__)
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#define DISABLE_INTERRUPTS() __asm volatile ("cpsid i" : : : "memory");
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#elif defined ( __DCC__ )
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#define DISABLE_INTERRUPTS() __asm (".short 0xb672");
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#else
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#define DISABLE_INTERRUPTS() __asm("cpsid i")
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#endif
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/** \brief Enter low-power standby state
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* WFI (Wait For Interrupt) makes the processor suspend execution (Clock is stopped) until an IRQ interrupts.
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*/
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#if defined (__GNUC__)
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#define STANDBY() __asm volatile ("wfi")
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#elif defined ( __DCC__ )
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#define STANDBY() __asm (".short 0xbf30");
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#else
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#define STANDBY() __asm ("wfi")
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#endif
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/** \brief No-op
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*/
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#define NOP() __asm volatile ("nop")
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/** \brief Reverse byte order in a word.
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* ARM Documentation Cortex-M0 Devices Generic User Guide
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* Accordingly to 3.5.7. REV, REV16, and REVSH
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* Restriction "This function requires low registers R0-R7 register"
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*/
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#if defined (__GNUC__) || defined (__ICCARM__) || defined (__ARMCC_VERSION)
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#define REV_BYTES_32(a, b) __asm volatile ("rev %0, %1" : "=l" (b) : "l" (a))
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#elif defined (__ghs__)
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#define REV_BYTES_32(a, b) __asm volatile ("rev %0, %1" : "=r" (b) : "r" (a))
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#else
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#define REV_BYTES_32(a, b) (b = ((a & 0xFF000000U) >> 24U) | ((a & 0xFF0000U) >> 8U) \
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| ((a & 0xFF00U) << 8U) | ((a & 0xFFU) << 24U))
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#endif
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/** \brief Reverse byte order in each halfword independently.
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* ARM Documentation Cortex-M0 Devices Generic User Guide
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* Accordingly to 3.5.7. REV, REV16, and REVSH
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* Restriction "This function requires low registers R0-R7 register"
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*/
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#if defined (__GNUC__) || defined (__ICCARM__) || defined (__ARMCC_VERSION)
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#define REV_BYTES_16(a, b) __asm volatile ("rev16 %0, %1" : "=l" (b) : "l" (a))
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#elif defined (__ghs__)
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#define REV_BYTES_16(a, b) __asm volatile ("rev16 %0, %1" : "=r" (b) : "r" (a))
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#else
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#define REV_BYTES_16(a, b) (b = ((a & 0xFF000000U) >> 8U) | ((a & 0xFF0000U) << 8U) \
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| ((a & 0xFF00U) >> 8U) | ((a & 0xFFU) << 8U))
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#endif
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/** \brief Places a function in RAM.
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*/
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#if defined ( __GNUC__ ) || defined (__ARMCC_VERSION)
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#define START_FUNCTION_DECLARATION_RAMSECTION
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#define END_FUNCTION_DECLARATION_RAMSECTION __attribute__((section (".code_ram")));
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#elif defined ( __ghs__ )
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#define START_FUNCTION_DECLARATION_RAMSECTION _Pragma("ghs callmode=far")
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#define END_FUNCTION_DECLARATION_RAMSECTION __attribute__((section (".code_ram")));\
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_Pragma("ghs callmode=default")
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#elif defined ( __ICCARM__ )
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#define START_FUNCTION_DECLARATION_RAMSECTION __ramfunc
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#define END_FUNCTION_DECLARATION_RAMSECTION ;
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#elif defined ( __DCC__ )
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#define START_FUNCTION_DECLARATION_RAMSECTION _Pragma("section CODE \".code_ram\" \"\" far-absolute") \
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_Pragma("use_section CODE")
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#define END_FUNCTION_DECLARATION_RAMSECTION ; \
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_Pragma("section CODE \".text\"")
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#else
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/* Keep compatibility with software analysis tools */
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#define START_FUNCTION_DECLARATION_RAMSECTION
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#define END_FUNCTION_DECLARATION_RAMSECTION ;
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#endif
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/* For GCC, IAR, GHS, Diab and ARMC there is no need to specify the section when
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defining a function, it is enough to specify it at the declaration. This
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also enables compatibility with software analysis tools. */
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#define START_FUNCTION_DEFINITION_RAMSECTION
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#define END_FUNCTION_DEFINITION_RAMSECTION
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#if defined (__ICCARM__)
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#define DISABLE_CHECK_RAMSECTION_FUNCTION_CALL _Pragma("diag_suppress=Ta022")
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#define ENABLE_CHECK_RAMSECTION_FUNCTION_CALL _Pragma("diag_default=Ta022")
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#else
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#define DISABLE_CHECK_RAMSECTION_FUNCTION_CALL
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#define ENABLE_CHECK_RAMSECTION_FUNCTION_CALL
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#endif
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/** \brief Get Core ID
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*
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* GET_CORE_ID returns the processor identification number for cm0
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*/
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#define GET_CORE_ID() 0U
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/** \brief Data alignment.
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*/
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#if defined ( __GNUC__ ) || defined ( __ghs__ ) || defined ( __DCC__ ) || defined (__ARMCC_VERSION)
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#define ALIGNED(x) __attribute__((aligned(x)))
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#elif defined ( __ICCARM__ )
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#define stringify(s) tostring(s)
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#define tostring(s) #s
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#define ALIGNED(x) _Pragma(stringify(data_alignment=x))
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#else
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/* Keep compatibility with software analysis tools */
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#define ALIGNED(x)
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#endif
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/** \brief Endianness.
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*/
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#define CORE_LITTLE_ENDIAN
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#ifdef __cplusplus
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}
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#endif
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#endif /* CORE_CM0_H */
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/*******************************************************************************
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* EOF
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******************************************************************************/
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