880 lines
28 KiB
C
880 lines
28 KiB
C
//*****************************************************************************
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//
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// ssi.c - Driver for Synchronous Serial Interface.
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//
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// Copyright (c) 2005-2013 Texas Instruments Incorporated. All rights reserved.
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// Software License Agreement
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// This is part of revision 1.1 of the Tiva Peripheral Driver Library.
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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//! \addtogroup ssi_api
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//! @{
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//
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//*****************************************************************************
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#include <stdbool.h>
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#include <stdint.h>
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#include "inc/hw_ints.h"
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#include "inc/hw_memmap.h"
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#include "inc/hw_ssi.h"
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#include "inc/hw_sysctl.h"
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#include "inc/hw_types.h"
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#include "driverlib/debug.h"
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#include "driverlib/interrupt.h"
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#include "driverlib/ssi.h"
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//*****************************************************************************
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//
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// A mapping of timer base address to interrupt number.
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//
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//*****************************************************************************
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static const uint32_t g_ppui32SSIIntMap[][2] =
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{
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{ SSI0_BASE, INT_SSI0_BLIZZARD },
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{ SSI1_BASE, INT_SSI1_BLIZZARD },
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{ SSI2_BASE, INT_SSI2_BLIZZARD },
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{ SSI3_BASE, INT_SSI3_BLIZZARD },
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};
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static const uint_fast8_t g_ui8SSIIntMapRows =
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sizeof(g_ppui32SSIIntMap) / sizeof(g_ppui32SSIIntMap[0]);
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//*****************************************************************************
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//
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//! \internal
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//! Checks an SSI base address.
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//!
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//! \param ui32Base specifies the SSI module base address.
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//!
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//! This function determines if a SSI module base address is valid.
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//!
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//! \return Returns \b true if the base address is valid and \b false
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//! otherwise.
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//
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//*****************************************************************************
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#ifdef DEBUG
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static bool
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_SSIBaseValid(uint32_t ui32Base)
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{
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return((ui32Base == SSI0_BASE) || (ui32Base == SSI1_BASE) ||
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(ui32Base == SSI2_BASE) || (ui32Base == SSI3_BASE));
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}
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#endif
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//*****************************************************************************
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//
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//! Returns the interrupt number of SSI module .
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//!
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//! \param ui32Base is the base address of the SSI module.
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//!
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//! This function returns the interrupt number for the SSI module with the base
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//! address passed in the \e ui32Base parameter.
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//!
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//! \return Returns an SSI interrupt number, or 0 if the interrupt does not
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//! exist.
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//
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//*****************************************************************************
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static uint32_t
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_SSIIntNumberGet(uint32_t ui32Base)
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{
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uint_fast8_t ui8Idx, ui8Rows;
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const uint32_t (*ppui32SSIIntMap)[2];
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//
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// Check the arguments.
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//
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ASSERT(_SSIBaseValid(ui32Base));
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ppui32SSIIntMap = g_ppui32SSIIntMap;
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ui8Rows = g_ui8SSIIntMapRows;
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//
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// Loop through the table that maps SSI base addresses to interrupt
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// numbers.
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//
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for(ui8Idx = 0; ui8Idx < ui8Rows; ui8Idx++)
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{
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//
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// See if this base address matches.
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//
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if(ppui32SSIIntMap[ui8Idx][0] == ui32Base)
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{
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//
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// Return the corresponding interrupt number.
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//
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return(ppui32SSIIntMap[ui8Idx][1]);
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}
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}
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//
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// The base address could not be found, so return an error.
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//
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return(0);
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}
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//*****************************************************************************
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//
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//! Configures the synchronous serial interface.
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//!
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//! \param ui32Base specifies the SSI module base address.
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//! \param ui32SSIClk is the rate of the clock supplied to the SSI module.
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//! \param ui32Protocol specifies the data transfer protocol.
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//! \param ui32Mode specifies the mode of operation.
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//! \param ui32BitRate specifies the clock rate.
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//! \param ui32DataWidth specifies number of bits transferred per frame.
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//!
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//! This function configures the synchronous serial interface. It sets
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//! the SSI protocol, mode of operation, bit rate, and data width.
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//!
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//! The \e ui32Protocol parameter defines the data frame format. The
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//! \e ui32Protocol parameter can be one of the following values:
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//! \b SSI_FRF_MOTO_MODE_0, \b SSI_FRF_MOTO_MODE_1, \b SSI_FRF_MOTO_MODE_2,
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//! \b SSI_FRF_MOTO_MODE_3, \b SSI_FRF_TI, or \b SSI_FRF_NMW. The Motorola
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//! frame formats encode the following polarity and phase configurations:
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//!
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//! <pre>
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//! Polarity Phase Mode
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//! 0 0 SSI_FRF_MOTO_MODE_0
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//! 0 1 SSI_FRF_MOTO_MODE_1
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//! 1 0 SSI_FRF_MOTO_MODE_2
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//! 1 1 SSI_FRF_MOTO_MODE_3
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//! </pre>
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//!
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//! The \e ui32Mode parameter defines the operating mode of the SSI module.
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//! The SSI module can operate as a master or slave; if it is a slave, the SSI
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//! can be configured to disable output on its serial output line. The
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//! \e ui32Mode parameter can be one of the following values:
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//! \b SSI_MODE_MASTER, \b SSI_MODE_SLAVE, or \b SSI_MODE_SLAVE_OD.
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//!
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//! The \e ui32BitRate parameter defines the bit rate for the SSI. This bit
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//! rate must satisfy the following clock ratio criteria:
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//!
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//! - FSSI >= 2 * bit rate (master mode); this speed cannot exceed 25 MHz.
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//! - FSSI >= 12 * bit rate or 6 * bit rate (slave modes), depending on the
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//! capability of the specific microcontroller
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//!
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//! where FSSI is the frequency of the clock supplied to the SSI module.
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//!
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//! The \e ui32DataWidth parameter defines the width of the data transfers and
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//! can be a value between 4 and 16, inclusive.
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//!
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//! The peripheral clock is the same as the processor clock. This value is
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//! returned by SysCtlClockGet(), or it can be explicitly hard coded if it is
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//! constant and known (to save the code/execution overhead of a call to
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//! SysCtlClockGet()).
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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SSIConfigSetExpClk(uint32_t ui32Base, uint32_t ui32SSIClk,
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uint32_t ui32Protocol, uint32_t ui32Mode,
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uint32_t ui32BitRate, uint32_t ui32DataWidth)
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{
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uint32_t ui32MaxBitRate;
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uint32_t ui32RegVal;
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uint32_t ui32PreDiv;
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uint32_t ui32SCR;
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uint32_t ui32SPH_SPO;
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//
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// Check the arguments.
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//
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ASSERT(_SSIBaseValid(ui32Base));
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ASSERT((ui32Protocol == SSI_FRF_MOTO_MODE_0) ||
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(ui32Protocol == SSI_FRF_MOTO_MODE_1) ||
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(ui32Protocol == SSI_FRF_MOTO_MODE_2) ||
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(ui32Protocol == SSI_FRF_MOTO_MODE_3) ||
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(ui32Protocol == SSI_FRF_TI) ||
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(ui32Protocol == SSI_FRF_NMW));
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ASSERT((ui32Mode == SSI_MODE_MASTER) ||
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(ui32Mode == SSI_MODE_SLAVE) ||
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(ui32Mode == SSI_MODE_SLAVE_OD));
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ASSERT(((ui32Mode == SSI_MODE_MASTER) &&
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(ui32BitRate <= (ui32SSIClk / 2))) ||
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((ui32Mode != SSI_MODE_MASTER) &&
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(ui32BitRate <= (ui32SSIClk / 12))));
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ASSERT((ui32SSIClk / ui32BitRate) <= (254 * 256));
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ASSERT((ui32DataWidth >= 4) && (ui32DataWidth <= 16));
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//
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// Set the mode.
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//
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ui32RegVal = (ui32Mode == SSI_MODE_SLAVE_OD) ? SSI_CR1_SOD : 0;
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ui32RegVal |= (ui32Mode == SSI_MODE_MASTER) ? 0 : SSI_CR1_MS;
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HWREG(ui32Base + SSI_O_CR1) = ui32RegVal;
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//
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// Set the clock predivider.
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//
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ui32MaxBitRate = ui32SSIClk / ui32BitRate;
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ui32PreDiv = 0;
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do
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{
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ui32PreDiv += 2;
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ui32SCR = (ui32MaxBitRate / ui32PreDiv) - 1;
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}
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while(ui32SCR > 255);
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HWREG(ui32Base + SSI_O_CPSR) = ui32PreDiv;
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//
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// Set protocol and clock rate.
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//
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ui32SPH_SPO = (ui32Protocol & 3) << 6;
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ui32Protocol &= SSI_CR0_FRF_M;
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ui32RegVal = (ui32SCR << 8) | ui32SPH_SPO | ui32Protocol |
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(ui32DataWidth - 1);
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HWREG(ui32Base + SSI_O_CR0) = ui32RegVal;
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}
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//*****************************************************************************
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//
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//! Enables the synchronous serial interface.
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//!
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//! \param ui32Base specifies the SSI module base address.
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//!
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//! This function enables operation of the synchronous serial interface. The
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//! synchronous serial interface must be configured before it is enabled.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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SSIEnable(uint32_t ui32Base)
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{
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//
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// Check the arguments.
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//
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ASSERT(_SSIBaseValid(ui32Base));
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//
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// Read-modify-write the enable bit.
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//
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HWREG(ui32Base + SSI_O_CR1) |= SSI_CR1_SSE;
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}
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//*****************************************************************************
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//
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//! Disables the synchronous serial interface.
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//!
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//! \param ui32Base specifies the SSI module base address.
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//!
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//! This function disables operation of the synchronous serial interface.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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SSIDisable(uint32_t ui32Base)
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{
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//
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// Check the arguments.
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//
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ASSERT(_SSIBaseValid(ui32Base));
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//
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// Read-modify-write the enable bit.
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//
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HWREG(ui32Base + SSI_O_CR1) &= ~(SSI_CR1_SSE);
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}
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//*****************************************************************************
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//
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//! Registers an interrupt handler for the synchronous serial interface.
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//!
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//! \param ui32Base specifies the SSI module base address.
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//! \param pfnHandler is a pointer to the function to be called when the
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//! synchronous serial interface interrupt occurs.
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//!
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//! This function registers the handler to be called when an SSI interrupt
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//! occurs. This function enables the global interrupt in the interrupt
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//! controller; specific SSI interrupts must be enabled via SSIIntEnable(). If
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//! necessary, it is the interrupt handler's responsibility to clear the
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//! interrupt source via SSIIntClear().
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//!
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//! \sa IntRegister() for important information about registering interrupt
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//! handlers.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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SSIIntRegister(uint32_t ui32Base, void (*pfnHandler)(void))
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{
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uint32_t ui32Int;
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//
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// Check the arguments.
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//
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ASSERT(_SSIBaseValid(ui32Base));
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//
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// Determine the interrupt number based on the SSI port.
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//
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ui32Int = _SSIIntNumberGet(ui32Base);
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ASSERT(ui32Int != 0);
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//
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// Register the interrupt handler, returning an error if an error occurs.
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//
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IntRegister(ui32Int, pfnHandler);
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//
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// Enable the synchronous serial interface interrupt.
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//
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IntEnable(ui32Int);
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}
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//*****************************************************************************
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//
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//! Unregisters an interrupt handler for the synchronous serial interface.
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//!
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//! \param ui32Base specifies the SSI module base address.
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//!
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//! This function clears the handler to be called when an SSI interrupt
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//! occurs. This function also masks off the interrupt in the interrupt
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//! controller so that the interrupt handler no longer is called.
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//!
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//! \sa IntRegister() for important information about registering interrupt
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//! handlers.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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SSIIntUnregister(uint32_t ui32Base)
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{
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uint32_t ui32Int;
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//
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// Check the arguments.
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//
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ASSERT(_SSIBaseValid(ui32Base));
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//
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// Determine the interrupt number based on the SSI port.
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//
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ui32Int = _SSIIntNumberGet(ui32Base);
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ASSERT(ui32Int != 0);
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//
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// Disable the interrupt.
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//
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IntDisable(ui32Int);
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//
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// Unregister the interrupt handler.
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//
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IntUnregister(ui32Int);
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}
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//*****************************************************************************
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//
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//! Enables individual SSI interrupt sources.
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//!
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//! \param ui32Base specifies the SSI module base address.
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//! \param ui32IntFlags is a bit mask of the interrupt sources to be enabled.
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//!
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//! This function enables the indicated SSI interrupt sources. Only the
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//! sources that are enabled can be reflected to the processor interrupt;
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//! disabled sources have no effect on the processor. The \e ui32IntFlags
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//! parameter can be any of the \b SSI_TXFF, \b SSI_RXFF, \b SSI_RXTO, or
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//! \b SSI_RXOR values.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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SSIIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags)
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{
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//
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// Check the arguments.
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//
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ASSERT(_SSIBaseValid(ui32Base));
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//
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// Enable the specified interrupts.
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//
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HWREG(ui32Base + SSI_O_IM) |= ui32IntFlags;
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}
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//*****************************************************************************
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//
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//! Disables individual SSI interrupt sources.
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//!
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//! \param ui32Base specifies the SSI module base address.
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//! \param ui32IntFlags is a bit mask of the interrupt sources to be disabled.
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//!
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//! This function disables the indicated SSI interrupt sources. The
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//! \e ui32IntFlags parameter can be any of the \b SSI_TXFF, \b SSI_RXFF,
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//! \b SSI_RXTO, or \b SSI_RXOR values.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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SSIIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags)
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{
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//
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// Check the arguments.
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//
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ASSERT(_SSIBaseValid(ui32Base));
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//
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// Disable the specified interrupts.
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//
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HWREG(ui32Base + SSI_O_IM) &= ~(ui32IntFlags);
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}
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//*****************************************************************************
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//
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//! Gets the current interrupt status.
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//!
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//! \param ui32Base specifies the SSI module base address.
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//! \param bMasked is \b false if the raw interrupt status is required or
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//! \b true if the masked interrupt status is required.
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//!
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//! This function returns the interrupt status for the SSI module. Either the
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//! raw interrupt status or the status of interrupts that are allowed to
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//! reflect to the processor can be returned.
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//!
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//! \return The current interrupt status, enumerated as a bit field of
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//! \b SSI_TXFF, \b SSI_RXFF, \b SSI_RXTO, and \b SSI_RXOR.
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//
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//*****************************************************************************
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uint32_t
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SSIIntStatus(uint32_t ui32Base, bool bMasked)
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{
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//
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// Check the arguments.
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//
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ASSERT(_SSIBaseValid(ui32Base));
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//
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// Return either the interrupt status or the raw interrupt status as
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// requested.
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//
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if(bMasked)
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{
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return(HWREG(ui32Base + SSI_O_MIS));
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}
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else
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{
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return(HWREG(ui32Base + SSI_O_RIS));
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}
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}
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//*****************************************************************************
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//
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//! Clears SSI interrupt sources.
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//!
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//! \param ui32Base specifies the SSI module base address.
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//! \param ui32IntFlags is a bit mask of the interrupt sources to be cleared.
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//!
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//! This function clears the specified SSI interrupt sources so that they no
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//! longer assert. This function must be called in the interrupt handler to
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//! keep the interrupts from being triggered again immediately upon exit. The
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//! \e ui32IntFlags parameter can consist of either or both the \b SSI_RXTO and
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//! \b SSI_RXOR values.
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//!
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//! \note Because there is a write buffer in the Cortex-M processor, it may
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//! take several clock cycles before the interrupt source is actually cleared.
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//! Therefore, it is recommended that the interrupt source be cleared early in
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//! the interrupt handler (as opposed to the very last action) to avoid
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//! returning from the interrupt handler before the interrupt source is
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//! actually cleared. Failure to do so may result in the interrupt handler
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//! being immediately reentered (because the interrupt controller still sees
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//! the interrupt source asserted).
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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SSIIntClear(uint32_t ui32Base, uint32_t ui32IntFlags)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_SSIBaseValid(ui32Base));
|
|
|
|
//
|
|
// Clear the requested interrupt sources.
|
|
//
|
|
HWREG(ui32Base + SSI_O_ICR) = ui32IntFlags;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Puts a data element into the SSI transmit FIFO.
|
|
//!
|
|
//! \param ui32Base specifies the SSI module base address.
|
|
//! \param ui32Data is the data to be transmitted over the SSI interface.
|
|
//!
|
|
//! This function places the supplied data into the transmit FIFO of the
|
|
//! specified SSI module. If there is no space available in the transmit FIFO,
|
|
//! this function waits until there is space available before returning.
|
|
//!
|
|
//! \note The upper 32 - N bits of \e ui32Data are discarded by the hardware,
|
|
//! where N is the data width as configured by SSIConfigSetExpClk(). For
|
|
//! example, if the interface is configured for 8-bit data width, the upper 24
|
|
//! bits of \e ui32Data are discarded.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
SSIDataPut(uint32_t ui32Base, uint32_t ui32Data)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_SSIBaseValid(ui32Base));
|
|
ASSERT((ui32Data & (0xfffffffe << (HWREG(ui32Base + SSI_O_CR0) &
|
|
SSI_CR0_DSS_M))) == 0);
|
|
|
|
//
|
|
// Wait until there is space.
|
|
//
|
|
while(!(HWREG(ui32Base + SSI_O_SR) & SSI_SR_TNF))
|
|
{
|
|
}
|
|
|
|
//
|
|
// Write the data to the SSI.
|
|
//
|
|
HWREG(ui32Base + SSI_O_DR) = ui32Data;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Puts a data element into the SSI transmit FIFO.
|
|
//!
|
|
//! \param ui32Base specifies the SSI module base address.
|
|
//! \param ui32Data is the data to be transmitted over the SSI interface.
|
|
//!
|
|
//! This function places the supplied data into the transmit FIFO of the
|
|
//! specified SSI module. If there is no space in the FIFO, then this function
|
|
//! returns a zero.
|
|
//!
|
|
//! \note The upper 32 - N bits of \e ui32Data are discarded by the hardware,
|
|
//! where N is the data width as configured by SSIConfigSetExpClk(). For
|
|
//! example, if the interface is configured for 8-bit data width, the upper 24
|
|
//! bits of \e ui32Data are discarded.
|
|
//!
|
|
//! \return Returns the number of elements written to the SSI transmit FIFO.
|
|
//
|
|
//*****************************************************************************
|
|
int32_t
|
|
SSIDataPutNonBlocking(uint32_t ui32Base, uint32_t ui32Data)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_SSIBaseValid(ui32Base));
|
|
ASSERT((ui32Data & (0xfffffffe << (HWREG(ui32Base + SSI_O_CR0) &
|
|
SSI_CR0_DSS_M))) == 0);
|
|
|
|
//
|
|
// Check for space to write.
|
|
//
|
|
if(HWREG(ui32Base + SSI_O_SR) & SSI_SR_TNF)
|
|
{
|
|
HWREG(ui32Base + SSI_O_DR) = ui32Data;
|
|
return(1);
|
|
}
|
|
else
|
|
{
|
|
return(0);
|
|
}
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Gets a data element from the SSI receive FIFO.
|
|
//!
|
|
//! \param ui32Base specifies the SSI module base address.
|
|
//! \param pui32Data is a pointer to a storage location for data that was
|
|
//! received over the SSI interface.
|
|
//!
|
|
//! This function gets received data from the receive FIFO of the specified
|
|
//! SSI module and places that data into the location specified by the
|
|
//! \e pui32Data parameter. If there is no data available, this function waits
|
|
//! until data is received before returning.
|
|
//!
|
|
//! \note Only the lower N bits of the value written to \e pui32Data contain
|
|
//! valid data, where N is the data width as configured by
|
|
//! SSIConfigSetExpClk(). For example, if the interface is configured for
|
|
//! 8-bit data width, only the lower 8 bits of the value written to
|
|
//! \e pui32Data contain valid data.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
SSIDataGet(uint32_t ui32Base, uint32_t *pui32Data)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_SSIBaseValid(ui32Base));
|
|
|
|
//
|
|
// Wait until there is data to be read.
|
|
//
|
|
while(!(HWREG(ui32Base + SSI_O_SR) & SSI_SR_RNE))
|
|
{
|
|
}
|
|
|
|
//
|
|
// Read data from SSI.
|
|
//
|
|
*pui32Data = HWREG(ui32Base + SSI_O_DR);
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Gets a data element from the SSI receive FIFO.
|
|
//!
|
|
//! \param ui32Base specifies the SSI module base address.
|
|
//! \param pui32Data is a pointer to a storage location for data that was
|
|
//! received over the SSI interface.
|
|
//!
|
|
//! This function gets received data from the receive FIFO of the specified SSI
|
|
//! module and places that data into the location specified by the \e ui32Data
|
|
//! parameter. If there is no data in the FIFO, then this function returns a
|
|
//! zero.
|
|
//!
|
|
//! \note Only the lower N bits of the value written to \e pui32Data contain
|
|
//! valid data, where N is the data width as configured by
|
|
//! SSIConfigSetExpClk(). For example, if the interface is configured for
|
|
//! 8-bit data width, only the lower 8 bits of the value written to
|
|
//! \e pui32Data contain valid data.
|
|
//!
|
|
//! \return Returns the number of elements read from the SSI receive FIFO.
|
|
//
|
|
//*****************************************************************************
|
|
int32_t
|
|
SSIDataGetNonBlocking(uint32_t ui32Base, uint32_t *pui32Data)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_SSIBaseValid(ui32Base));
|
|
|
|
//
|
|
// Check for data to read.
|
|
//
|
|
if(HWREG(ui32Base + SSI_O_SR) & SSI_SR_RNE)
|
|
{
|
|
*pui32Data = HWREG(ui32Base + SSI_O_DR);
|
|
return(1);
|
|
}
|
|
else
|
|
{
|
|
return(0);
|
|
}
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Enables SSI DMA operation.
|
|
//!
|
|
//! \param ui32Base is the base address of the SSI port.
|
|
//! \param ui32DMAFlags is a bit mask of the DMA features to enable.
|
|
//!
|
|
//! This function enables the specified SSI DMA features. The SSI can be
|
|
//! configured to use DMA for transmit and/or receive data transfers.
|
|
//! The \e ui32DMAFlags parameter is the logical OR of any of the following
|
|
//! values:
|
|
//!
|
|
//! - SSI_DMA_RX - enable DMA for receive
|
|
//! - SSI_DMA_TX - enable DMA for transmit
|
|
//!
|
|
//! \note The uDMA controller must also be set up before DMA can be used
|
|
//! with the SSI.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
SSIDMAEnable(uint32_t ui32Base, uint32_t ui32DMAFlags)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_SSIBaseValid(ui32Base));
|
|
|
|
//
|
|
// Set the requested bits in the SSI DMA control register.
|
|
//
|
|
HWREG(ui32Base + SSI_O_DMACTL) |= ui32DMAFlags;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Disables SSI DMA operation.
|
|
//!
|
|
//! \param ui32Base is the base address of the SSI port.
|
|
//! \param ui32DMAFlags is a bit mask of the DMA features to disable.
|
|
//!
|
|
//! This function is used to disable SSI DMA features that were enabled
|
|
//! by SSIDMAEnable(). The specified SSI DMA features are disabled. The
|
|
//! \e ui32DMAFlags parameter is the logical OR of any of the following values:
|
|
//!
|
|
//! - SSI_DMA_RX - disable DMA for receive
|
|
//! - SSI_DMA_TX - disable DMA for transmit
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
SSIDMADisable(uint32_t ui32Base, uint32_t ui32DMAFlags)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_SSIBaseValid(ui32Base));
|
|
|
|
//
|
|
// Clear the requested bits in the SSI DMA control register.
|
|
//
|
|
HWREG(ui32Base + SSI_O_DMACTL) &= ~ui32DMAFlags;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Determines whether the SSI transmitter is busy or not.
|
|
//!
|
|
//! \param ui32Base is the base address of the SSI port.
|
|
//!
|
|
//! This function allows the caller to determine whether all transmitted bytes
|
|
//! have cleared the transmitter hardware. If \b false is returned, then the
|
|
//! transmit FIFO is empty and all bits of the last transmitted word have left
|
|
//! the hardware shift register.
|
|
//!
|
|
//! \return Returns \b true if the SSI is transmitting or \b false if all
|
|
//! transmissions are complete.
|
|
//
|
|
//*****************************************************************************
|
|
bool
|
|
SSIBusy(uint32_t ui32Base)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_SSIBaseValid(ui32Base));
|
|
|
|
//
|
|
// Determine if the SSI is busy.
|
|
//
|
|
return((HWREG(ui32Base + SSI_O_SR) & SSI_SR_BSY) ? true : false);
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Sets the data clock source for the specified SSI peripheral.
|
|
//!
|
|
//! \param ui32Base is the base address of the SSI port.
|
|
//! \param ui32Source is the baud clock source for the SSI.
|
|
//!
|
|
//! This function allows the baud clock source for the SSI to be selected.
|
|
//! The possible clock source are the system clock (\b SSI_CLOCK_SYSTEM) or
|
|
//! the precision internal oscillator (\b SSI_CLOCK_PIOSC).
|
|
//!
|
|
//! Changing the baud clock source changes the data rate generated by the
|
|
//! SSI. Therefore, the data rate should be reconfigured after any change to
|
|
//! the SSI clock source.
|
|
//!
|
|
//! \note The ability to specify the SSI baud clock source varies with the
|
|
//! Tiva part and SSI in use. Please consult the data sheet for the part
|
|
//! in use to determine whether this support is available.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
SSIClockSourceSet(uint32_t ui32Base, uint32_t ui32Source)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_SSIBaseValid(ui32Base));
|
|
ASSERT((ui32Source == SSI_CLOCK_SYSTEM) ||
|
|
(ui32Source == SSI_CLOCK_PIOSC));
|
|
|
|
//
|
|
// Set the SSI clock source.
|
|
//
|
|
HWREG(ui32Base + SSI_O_CC) = ui32Source;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Gets the data clock source for the specified SSI peripheral.
|
|
//!
|
|
//! \param ui32Base is the base address of the SSI port.
|
|
//!
|
|
//! This function returns the data clock source for the specified SSI.
|
|
//!
|
|
//! \note The ability to specify the SSI data clock source varies with the
|
|
//! Tiva part and SSI in use. Please consult the data sheet for the part
|
|
//! in use to determine whether this support is available.
|
|
//!
|
|
//! \return Returns the current clock source, which will be either
|
|
//! \b SSI_CLOCK_SYSTEM or \b SSI_CLOCK_PIOSC.
|
|
//
|
|
//*****************************************************************************
|
|
uint32_t
|
|
SSIClockSourceGet(uint32_t ui32Base)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_SSIBaseValid(ui32Base));
|
|
|
|
//
|
|
// Return the SSI clock source.
|
|
//
|
|
return(HWREG(ui32Base + SSI_O_CC));
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// Close the Doxygen group.
|
|
//! @}
|
|
//
|
|
//*****************************************************************************
|