221 lines
11 KiB
C
221 lines
11 KiB
C
//*****************************************************************************
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//
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// hw_eeprom.h - Macros used when accessing the EEPROM controller.
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//
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// Copyright (c) 2011-2013 Texas Instruments Incorporated. All rights reserved.
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// Software License Agreement
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// This is part of revision 1.1 of the Tiva Firmware Development Package.
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//
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//*****************************************************************************
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#ifndef __HW_EEPROM_H__
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#define __HW_EEPROM_H__
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//*****************************************************************************
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//
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// The following are defines for the EEPROM register offsets.
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//
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//*****************************************************************************
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#define EEPROM_EESIZE 0x400AF000 // EEPROM Size Information
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#define EEPROM_EEBLOCK 0x400AF004 // EEPROM Current Block
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#define EEPROM_EEOFFSET 0x400AF008 // EEPROM Current Offset
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#define EEPROM_EERDWR 0x400AF010 // EEPROM Read-Write
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#define EEPROM_EERDWRINC 0x400AF014 // EEPROM Read-Write with Increment
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#define EEPROM_EEDONE 0x400AF018 // EEPROM Done Status
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#define EEPROM_EESUPP 0x400AF01C // EEPROM Support Control and
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// Status
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#define EEPROM_EEUNLOCK 0x400AF020 // EEPROM Unlock
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#define EEPROM_EEPROT 0x400AF030 // EEPROM Protection
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#define EEPROM_EEPASS0 0x400AF034 // EEPROM Password
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#define EEPROM_EEPASS1 0x400AF038 // EEPROM Password
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#define EEPROM_EEPASS2 0x400AF03C // EEPROM Password
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#define EEPROM_EEINT 0x400AF040 // EEPROM Interrupt
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#define EEPROM_EEHIDE 0x400AF050 // EEPROM Block Hide
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#define EEPROM_EEDBGME 0x400AF080 // EEPROM Debug Mass Erase
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#define EEPROM_PP 0x400AFFC0 // EEPROM Peripheral Properties
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the EEPROM_EESIZE register.
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//
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//*****************************************************************************
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#define EEPROM_EESIZE_WORDCNT_M 0x0000FFFF // Number of 32-Bit Words
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#define EEPROM_EESIZE_BLKCNT_M 0x07FF0000 // Number of 16-Word Blocks
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#define EEPROM_EESIZE_WORDCNT_S 0
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#define EEPROM_EESIZE_BLKCNT_S 16
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the EEPROM_EEBLOCK register.
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//
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//*****************************************************************************
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#define EEPROM_EEBLOCK_BLOCK_M 0x0000FFFF // Current Block
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#define EEPROM_EEBLOCK_BLOCK_S 0
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the EEPROM_EEOFFSET
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// register.
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//
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//*****************************************************************************
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#define EEPROM_EEOFFSET_OFFSET_M \
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0x0000000F // Current Address Offset
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#define EEPROM_EEOFFSET_OFFSET_S \
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0
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the EEPROM_EERDWR register.
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//
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//*****************************************************************************
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#define EEPROM_EERDWR_VALUE_M 0xFFFFFFFF // EEPROM Read or Write Data
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#define EEPROM_EERDWR_VALUE_S 0
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the EEPROM_EERDWRINC
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// register.
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//
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//*****************************************************************************
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#define EEPROM_EERDWRINC_VALUE_M \
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0xFFFFFFFF // EEPROM Read or Write Data with
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// Increment
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#define EEPROM_EERDWRINC_VALUE_S \
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0
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the EEPROM_EEDONE register.
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//
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//*****************************************************************************
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#define EEPROM_EEDONE_WORKING 0x00000001 // EEPROM Working
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#define EEPROM_EEDONE_WKERASE 0x00000004 // Working on an Erase
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#define EEPROM_EEDONE_WKCOPY 0x00000008 // Working on a Copy
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#define EEPROM_EEDONE_NOPERM 0x00000010 // Write Without Permission
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#define EEPROM_EEDONE_WRBUSY 0x00000020 // Write Busy
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#define EEPROM_EEDONE_INVPL 0x00000100 // Invalid Program Voltage Level
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the EEPROM_EESUPP register.
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//
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//*****************************************************************************
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#define EEPROM_EESUPP_START 0x00000001 // Start Erase
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#define EEPROM_EESUPP_EREQ 0x00000002 // Erase Required
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#define EEPROM_EESUPP_ERETRY 0x00000004 // Erase Must Be Retried
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#define EEPROM_EESUPP_PRETRY 0x00000008 // Programming Must Be Retried
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the EEPROM_EEUNLOCK
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// register.
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//
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//*****************************************************************************
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#define EEPROM_EEUNLOCK_UNLOCK_M \
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0xFFFFFFFF // EEPROM Unlock
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the EEPROM_EEPROT register.
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//
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//*****************************************************************************
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#define EEPROM_EEPROT_PROT_M 0x00000007 // Protection Control
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#define EEPROM_EEPROT_PROT_RWNPW \
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0x00000000 // This setting is the default. If
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// there is no password, the block
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// is not protected and is readable
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// and writable
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#define EEPROM_EEPROT_PROT_RWPW 0x00000001 // If there is a password, the
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// block is readable or writable
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// only when unlocked
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#define EEPROM_EEPROT_PROT_RONPW \
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0x00000002 // If there is no password, the
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// block is readable, not writable
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#define EEPROM_EEPROT_ACC 0x00000008 // Access Control
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the EEPROM_EEPASS0 register.
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//
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//*****************************************************************************
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#define EEPROM_EEPASS0_PASS_M 0xFFFFFFFF // Password
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#define EEPROM_EEPASS0_PASS_S 0
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the EEPROM_EEPASS1 register.
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//
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//*****************************************************************************
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#define EEPROM_EEPASS1_PASS_M 0xFFFFFFFF // Password
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#define EEPROM_EEPASS1_PASS_S 0
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the EEPROM_EEPASS2 register.
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//
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//*****************************************************************************
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#define EEPROM_EEPASS2_PASS_M 0xFFFFFFFF // Password
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#define EEPROM_EEPASS2_PASS_S 0
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the EEPROM_EEINT register.
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//
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//*****************************************************************************
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#define EEPROM_EEINT_INT 0x00000001 // Interrupt Enable
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the EEPROM_EEHIDE register.
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//
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//*****************************************************************************
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#define EEPROM_EEHIDE_HN_M 0xFFFFFFFE // Hide Block
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the EEPROM_EEDBGME register.
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//
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//*****************************************************************************
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#define EEPROM_EEDBGME_ME 0x00000001 // Mass Erase
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#define EEPROM_EEDBGME_KEY_M 0xFFFF0000 // Erase Key
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#define EEPROM_EEDBGME_KEY_S 16
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the EEPROM_PP register.
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//
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//*****************************************************************************
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#define EEPROM_PP_SIZE_M 0x0000001F // EEPROM Size
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#define EEPROM_PP_SIZE_S 0
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#endif // __HW_EEPROM_H__
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