216 lines
7.0 KiB
C
216 lines
7.0 KiB
C
/***************************************************************************//**
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* @file
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* @brief CMSIS Cortex-M3 Peripheral Access Layer for EFM32 devices.
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* @author Energy Micro AS
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* @version 2.3.2
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*******************************************************************************
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* @section License
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* <b>(C) Copyright 2011 Energy Micro AS, http://www.energymicro.com</b>
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*******************************************************************************
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*
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* This source code is the property of Energy Micro AS. The source and compiled
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* code may only be used on Energy Micro "EFM32" microcontrollers.
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*
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* This copyright notice may not be removed from the source code nor changed.
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*
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* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
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* obligation to support this Software. Energy Micro AS is providing the
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* Software "AS IS", with no express or implied warranties of any kind,
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* including, but not limited to, any implied warranties of merchantability
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* or fitness for any particular purpose or warranties against infringement
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* of any proprietary rights of a third party.
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*
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* Energy Micro AS will not be liable for any consequential, incidental, or
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* special damages, or any other relief, or for any claim by any third party,
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* arising from your use of this Software.
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*
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******************************************************************************/
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#ifndef __SYSTEM_EFM32_H
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#define __SYSTEM_EFM32_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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/*******************************************************************************
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************************** GLOBAL VARIABLES *******************************
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******************************************************************************/
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extern uint32_t SystemCoreClock; /**< System Clock Frequency (Core Clock) */
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/*******************************************************************************
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***************************** PROTOTYPES **********************************
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******************************************************************************/
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/* Interrupt routines - prototypes */
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#if defined(_EFM32_GECKO_FAMILY)
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void Reset_Handler(void);
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void NMI_Handler(void);
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void HardFault_Handler(void);
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void MemManage_Handler(void);
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void BusFault_Handler(void);
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void UsageFault_Handler(void);
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void SVC_Handler(void);
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void DebugMon_Handler(void);
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void PendSV_Handler(void);
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void SysTick_Handler(void);
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void DMA_IRQHandler(void);
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void GPIO_EVEN_IRQHandler(void);
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void TIMER0_IRQHandler(void);
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void USART0_RX_IRQHandler(void);
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void USART0_TX_IRQHandler(void);
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void ACMP0_IRQHandler(void);
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void ADC0_IRQHandler(void);
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void DAC0_IRQHandler(void);
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void I2C0_IRQHandler(void);
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void GPIO_ODD_IRQHandler(void);
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void TIMER1_IRQHandler(void);
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void TIMER2_IRQHandler(void);
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void USART1_RX_IRQHandler(void);
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void USART1_TX_IRQHandler(void);
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void USART2_RX_IRQHandler(void);
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void USART2_TX_IRQHandler(void);
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void UART0_RX_IRQHandler(void);
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void UART0_TX_IRQHandler(void);
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void LEUART0_IRQHandler(void);
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void LEUART1_IRQHandler(void);
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void LETIMER0_IRQHandler(void);
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void PCNT0_IRQHandler(void);
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void PCNT1_IRQHandler(void);
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void PCNT2_IRQHandler(void);
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void RTC_IRQHandler(void);
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void CMU_IRQHandler(void);
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void VCMP_IRQHandler(void);
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void LCD_IRQHandler(void);
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void MSC_IRQHandler(void);
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void AES_IRQHandler(void);
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#endif
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#if defined(_EFM32_TINY_FAMILY)
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void Reset_Handler(void);
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void NMI_Handler(void);
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void HardFault_Handler(void);
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void MemManage_Handler(void);
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void BusFault_Handler(void);
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void UsageFault_Handler(void);
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void SVC_Handler(void);
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void DebugMon_Handler(void);
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void PendSV_Handler(void);
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void SysTick_Handler(void);
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void DMA_IRQHandler(void);
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void GPIO_EVEN_IRQHandler(void);
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void TIMER0_IRQHandler(void);
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void USART0_RX_IRQHandler(void);
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void USART0_TX_IRQHandler(void);
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void ACMP0_IRQHandler(void);
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void ADC0_IRQHandler(void);
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void DAC0_IRQHandler(void);
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void I2C0_IRQHandler(void);
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void GPIO_ODD_IRQHandler(void);
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void TIMER1_IRQHandler(void);
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void USART1_RX_IRQHandler(void);
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void USART1_TX_IRQHandler(void);
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void LESENSE_IRQHandler(void);
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void LEUART0_IRQHandler(void);
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void LETIMER0_IRQHandler(void);
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void PCNT0_IRQHandler(void);
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void RTC_IRQHandler(void);
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void CMU_IRQHandler(void);
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void VCMP_IRQHandler(void);
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void LCD_IRQHandler(void);
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void MSC_IRQHandler(void);
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void AES_IRQHandler(void);
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#endif
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#if defined(_EFM32_GIANT_FAMILY)
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void Reset_Handler(void);
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void NMI_Handler(void);
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void HardFault_Handler(void);
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void MemManage_Handler(void);
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void BusFault_Handler(void);
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void UsageFault_Handler(void);
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void SVC_Handler(void);
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void DebugMon_Handler(void);
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void PendSV_Handler(void);
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void SysTick_Handler(void);
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void DMA_IRQHandler(void);
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void GPIO_EVEN_IRQHandler(void);
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void TIMER0_IRQHandler(void);
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void USART0_RX_IRQHandler(void);
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void USART0_TX_IRQHandler(void);
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void USB_IRQHandler(void);
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void ACMP0_IRQHandler(void);
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void ADC0_IRQHandler(void);
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void DAC0_IRQHandler(void);
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void I2C0_IRQHandler(void);
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void I2C1_IRQHandler(void);
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void GPIO_ODD_IRQHandler(void);
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void TIMER1_IRQHandler(void);
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void TIMER2_IRQHandler(void);
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void TIMER3_IRQHandler(void);
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void USART1_RX_IRQHandler(void);
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void USART1_TX_IRQHandler(void);
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void LESENSE_IRQHandler(void);
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void USART2_RX_IRQHandler(void);
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void USART2_TX_IRQHandler(void);
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void UART0_RX_IRQHandler(void);
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void UART0_TX_IRQHandler(void);
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void UART1_RX_IRQHandler(void);
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void UART1_TX_IRQHandler(void);
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void LEUART0_IRQHandler(void);
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void LEUART1_IRQHandler(void);
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void LETIMER0_IRQHandler(void);
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void PCNT0_IRQHandler(void);
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void PCNT1_IRQHandler(void);
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void PCNT2_IRQHandler(void);
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void RTC_IRQHandler(void);
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void BURTC_IRQHandler(void);
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void CMU_IRQHandler(void);
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void VCMP_IRQHandler(void);
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void LCD_IRQHandler(void);
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void MSC_IRQHandler(void);
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void AES_IRQHandler(void);
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void EBI_IRQHandler(void);
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void EMU_IRQHandler(void);
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#endif
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uint32_t SystemCoreClockGet(void);
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/**************************************************************************//**
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* @brief
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* Update CMSIS SystemCoreClock variable.
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*
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* @details
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* CMSIS defines a global variable SystemCoreClock that shall hold the
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* core frequency in Hz. If the core frequency is dynamically changed, the
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* variable must be kept updated in order to be CMSIS compliant.
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*
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* Notice that if only changing core clock frequency through the EFM32 CMU
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* API, this variable will be kept updated. This function is only provided
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* for CMSIS compliance and if a user modifies the the core clock outside
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* the CMU API.
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*****************************************************************************/
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static __INLINE void SystemCoreClockUpdate(void)
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{
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SystemCoreClockGet();
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}
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void SystemInit(void);
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uint32_t SystemHFClockGet(void);
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uint32_t SystemHFXOClockGet(void);
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void SystemHFXOClockSet(uint32_t freq);
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uint32_t SystemLFRCOClockGet(void);
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uint32_t SystemULFRCOClockGet(void);
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uint32_t SystemLFXOClockGet(void);
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void SystemLFXOClockSet(uint32_t freq);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __SYSTEM_EFM32_H */
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