790 lines
31 KiB
C
790 lines
31 KiB
C
/***************************************************************************//**
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* @file
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* @brief External Bus Iterface (EBI) peripheral API for EFM32
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* @author Energy Micro AS
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* @version 2.3.2
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*******************************************************************************
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* @section License
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* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
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*******************************************************************************
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*
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* This source code is the property of Energy Micro AS. The source and compiled
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* code may only be used on Energy Micro "EFM32" microcontrollers.
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*
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* This copyright notice may not be removed from the source code nor changed.
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*
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* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
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* obligation to support this Software. Energy Micro AS is providing the
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* Software "AS IS", with no express or implied warranties of any kind,
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* including, but not limited to, any implied warranties of merchantability
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* or fitness for any particular purpose or warranties against infringement
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* of any proprietary rights of a third party.
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*
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* Energy Micro AS will not be liable for any consequential, incidental, or
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* special damages, or any other relief, or for any claim by any third party,
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* arising from your use of this Software.
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*
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******************************************************************************/
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#ifndef __EFM32_EBI_H
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#define __EFM32_EBI_H
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#include "efm32.h"
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#if defined(EBI_COUNT) && (EBI_COUNT > 0)
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#include "efm32_assert.h"
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#include <stdint.h>
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#include <stdbool.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************************************************************//**
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* @addtogroup EFM32_Library
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* @{
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******************************************************************************/
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/***************************************************************************//**
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* @addtogroup EBI
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* @{
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******************************************************************************/
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/***************************************************************************//**
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* @verbatim
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*
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* --------- ---------
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* | EBI | /| |\ | Ext. |
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* | | / --------- \ | Async |
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* |(EFM32)| \ --------- / | Device|
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* | | \| |/ | |
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* --------- ---------
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* Parallel interface
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*
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* @endverbatim
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******************************************************************************/
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/*******************************************************************************
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******************************* DEFINES ***********************************
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******************************************************************************/
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#define EBI_BANK0 (uint32_t)(1 << 1) /**< EBI address bank 0 */
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#define EBI_BANK1 (uint32_t)(1 << 2) /**< EBI address bank 1 */
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#define EBI_BANK2 (uint32_t)(1 << 3) /**< EBI address bank 2 */
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#define EBI_BANK3 (uint32_t)(1 << 4) /**< EBI address bank 3 */
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#define EBI_CS0 (uint32_t)(1 << 1) /**< EBI chip select line 0 */
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#define EBI_CS1 (uint32_t)(1 << 2) /**< EBI chip select line 1 */
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#define EBI_CS2 (uint32_t)(1 << 3) /**< EBI chip select line 2 */
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#define EBI_CS3 (uint32_t)(1 << 4) /**< EBI chip select line 3 */
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/*******************************************************************************
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******************************** ENUMS ************************************
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******************************************************************************/
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/** EBI Mode of operation */
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typedef enum
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{
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/** 8 data bits, 8 address bits */
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ebiModeD8A8 = EBI_CTRL_MODE_D8A8,
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/** 16 data bits, 16 address bits, using address latch enable */
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ebiModeD16A16ALE = EBI_CTRL_MODE_D16A16ALE,
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/** 8 data bits, 24 address bits, using address latch enable */
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ebiModeD8A24ALE = EBI_CTRL_MODE_D8A24ALE,
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/** Mode D16 */
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#if defined(_EFM32_GIANT_FAMILY)
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ebiModeD16 = EBI_CTRL_MODE_D16,
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#endif
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} EBI_Mode_TypeDef;
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/** EBI Polarity configuration */
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typedef enum
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{
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/** Active Low */
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ebiActiveLow = 0,
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/** Active High */
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ebiActiveHigh = 1
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} EBI_Polarity_TypeDef;
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/** EBI Pin Line types */
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typedef enum
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{
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/** Address Ready line */
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ebiLineARDY,
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/** Address Latch Enable line */
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ebiLineALE,
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/** Write Enable line */
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ebiLineWE,
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/** Read Enable line */
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ebiLineRE,
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/** Chip Select line */
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ebiLineCS,
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#if defined(_EFM32_GIANT_FAMILY)
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/** BL line */
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ebiLineBL,
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#endif
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#if defined(_EFM32_GIANT_FAMILY)
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/** TFT VSYNC line */
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ebiLineTFTVSync,
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/** TFT HSYNC line */
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ebiLineTFTHSync,
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/** TFT Data enable line */
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ebiLineTFTDataEn,
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/** TFT DCLK line */
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ebiLineTFTDClk,
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/** TFT Chip select line */
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ebiLineTFTCS,
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#endif
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} EBI_Line_TypeDef;
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#if defined(_EFM32_GIANT_FAMILY)
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/** Address Pin Enable, lower limit - lower range of pins to enable */
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typedef enum
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{
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/** Adress lines EBI_A[0] and upwards are enabled by APEN */
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ebiALowA0 = EBI_ROUTE_ALB_A0,
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/** Adress lines EBI_A[8] and upwards are enabled by APEN */
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ebiALowA8 = EBI_ROUTE_ALB_A8,
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/** Adress lines EBI_A[16] and upwards are enabled by APEN */
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ebiALowA16 = EBI_ROUTE_ALB_A16,
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/** Adress lines EBI_A[24] and upwards are enabled by APEN */
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ebiALowA24 = EBI_ROUTE_ALB_A24,
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} EBI_ALow_TypeDef;
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/** Adress Pin Enable, high limit - higher limit of pins to enable */
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typedef enum
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{
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/** All EBI_A pins are disabled */
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ebiAHighA0 = EBI_ROUTE_APEN_A0,
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/** All EBI_A[4:ALow] are enabled */
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ebiAHighA5 = EBI_ROUTE_APEN_A5,
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/** All EBI_A[5:ALow] are enabled */
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ebiAHighA6 = EBI_ROUTE_APEN_A6,
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/** All EBI_A[6:ALow] are enabled */
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ebiAHighA7 = EBI_ROUTE_APEN_A7,
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/** All EBI_A[7:ALow] are enabled */
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ebiAHighA8 = EBI_ROUTE_APEN_A8,
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/** All EBI_A[8:ALow] are enabled */
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ebiAHighA9 = EBI_ROUTE_APEN_A9,
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/** All EBI_A[9:ALow] are enabled */
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ebiAHighA10 = EBI_ROUTE_APEN_A10,
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/** All EBI_A[10:ALow] are enabled */
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ebiAHighA11 = EBI_ROUTE_APEN_A11,
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/** All EBI_A[11:ALow] are enabled */
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ebiAHighA12 = EBI_ROUTE_APEN_A12,
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/** All EBI_A[12:ALow] are enabled */
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ebiAHighA13 = EBI_ROUTE_APEN_A13,
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/** All EBI_A[13:ALow] are enabled */
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ebiAHighA14 = EBI_ROUTE_APEN_A14,
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/** All EBI_A[14:ALow] are enabled */
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ebiAHighA15 = EBI_ROUTE_APEN_A15,
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/** All EBI_A[15:ALow] are enabled */
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ebiAHighA16 = EBI_ROUTE_APEN_A16,
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/** All EBI_A[16:ALow] are enabled */
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ebiAHighA17 = EBI_ROUTE_APEN_A17,
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/** All EBI_A[17:ALow] are enabled */
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ebiAHighA18 = EBI_ROUTE_APEN_A18,
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/** All EBI_A[18:ALow] are enabled */
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ebiAHighA19 = EBI_ROUTE_APEN_A19,
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/** All EBI_A[19:ALow] are enabled */
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ebiAHighA20 = EBI_ROUTE_APEN_A20,
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/** All EBI_A[20:ALow] are enabled */
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ebiAHighA21 = EBI_ROUTE_APEN_A21,
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/** All EBI_A[21:ALow] are enabled */
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ebiAHighA22 = EBI_ROUTE_APEN_A22,
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/** All EBI_A[22:ALow] are enabled */
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ebiAHighA23 = EBI_ROUTE_APEN_A23,
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/** All EBI_A[23:ALow] are enabled */
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ebiAHighA24 = EBI_ROUTE_APEN_A24,
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/** All EBI_A[24:ALow] are enabled */
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ebiAHighA25 = EBI_ROUTE_APEN_A25,
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/** All EBI_A[25:ALow] are enabled */
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ebiAHighA26 = EBI_ROUTE_APEN_A26,
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/** All EBI_A[26:ALow] are enabled */
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ebiAHighA27 = EBI_ROUTE_APEN_A27,
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/** All EBI_A[27:ALow] are enabled */
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ebiAHighA28 = EBI_ROUTE_APEN_A28,
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} EBI_AHigh_TypeDef;
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/** EBI I/O Alternate Pin Location */
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typedef enum {
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/** EBI PIN I/O Location 0 */
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ebiLocation0 = EBI_ROUTE_LOCATION_LOC0,
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/** EBI PIN I/O Location 1 */
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ebiLocation1 = EBI_ROUTE_LOCATION_LOC1,
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/** EBI PIN I/O Location 2 */
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ebiLocation2 = EBI_ROUTE_LOCATION_LOC2,
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/** EBI PIN I/O Location 3 */
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// ebiLocation3 = EBI_ROUTE_LOCATION_LOC3,
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} EBI_Location_TypeDef;
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#endif
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/* TFT support */
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#if defined(_EFM32_GIANT_FAMILY)
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/** EBI TFT Graphics Bank Select */
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typedef enum
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{
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/** Memory BANK0 contains frame buffer */
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ebiTFTBank0 = EBI_TFTCTRL_BANKSEL_BANK0,
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/** Memory BANK1 contains frame buffer */
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ebiTFTBank1 = EBI_TFTCTRL_BANKSEL_BANK1,
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/** Memory BANK2 contains frame buffer */
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ebiTFTBank2 = EBI_TFTCTRL_BANKSEL_BANK2,
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/** Memory BANK3 contains frame buffer */
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ebiTFTBank3 = EBI_TFTCTRL_BANKSEL_BANK3
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} EBI_TFTBank_TypeDef;
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/** Masking and Alpha blending source color*/
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typedef enum
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{
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/** Use memory as source color for masking/alpha blending */
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ebiTFTColorSrcMem = EBI_TFTCTRL_COLOR1SRC_MEM,
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/** Use PIXEL1 register as source color for masking/alpha blending */
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ebiTFTColorSrcPixel1 = EBI_TFTCTRL_COLOR1SRC_PIXEL1,
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} EBI_TFTColorSrc_TypeDef;
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/** Bus Data Interleave Mode */
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typedef enum
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{
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/** Unlimited interleaved accesses per EBI_DCLK period. Can cause jitter */
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ebiTFTInterleaveUnlimited = EBI_TFTCTRL_INTERLEAVE_UNLIMITED,
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/** Allow 1 interleaved access per EBI_DCLK period */
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ebiTFTInterleaveOnePerDClk = EBI_TFTCTRL_INTERLEAVE_ONEPERDCLK,
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/** Only allow accesses during porch periods */
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ebiTFTInterleavePorch = EBI_TFTCTRL_INTERLEAVE_PORCH,
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} EBI_TFTInterleave_TypeDef;
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/** Control frame base pointer copy */
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typedef enum
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{
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/** Trigger update of frame buffer pointer on vertical sync */
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ebiTFTFrameBufTriggerVSync = EBI_TFTCTRL_FBCTRIG_VSYNC,
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/** Trigger update of frame buffer pointer on horizontal sync */
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ebiTFTFrameBufTriggerHSync = EBI_TFTCTRL_FBCTRIG_HSYNC,
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} EBI_TFTFrameBufTrigger_TypeDef;
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/** Control of mask and alpha blending mode */
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typedef enum
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{
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/** Masking and blending are disabled */
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ebiTFTMBDisabled = EBI_TFTCTRL_MASKBLEND_DISABLED,
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/** Internal masking */
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ebiTFTMBIMask = EBI_TFTCTRL_MASKBLEND_IMASK,
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/** Internal alpha blending */
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ebiTFTMBIAlpha = EBI_TFTCTRL_MASKBLEND_IALPHA,
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/** Internal masking and alpha blending are enabled */
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ebiTFTMBIMaskAlpha = EBI_TFTCTRL_MASKBLEND_IMASKIALPHA,
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/** External masking */
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ebiTFTMBEMask = EBI_TFTCTRL_MASKBLEND_EMASK,
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/** External alpha blending */
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ebiTFTMBEAlpha = EBI_TFTCTRL_MASKBLEND_EALPHA,
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/** External masking and alpha blending */
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ebiTFTMBEMaskAlpha = EBI_TFTCTRL_MASKBLEND_EMASKEALPHA,
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} EBI_TFTMaskBlend_TypeDef;
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/** TFT Direct Drive mode */
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typedef enum
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{
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/** Disabled */
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ebiTFTDDModeDisabled = EBI_TFTCTRL_DD_DISABLED,
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/** Direct Drive from internal memory */
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ebiTFTDDModeInternal = EBI_TFTCTRL_DD_INTERNAL,
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/** Direct Drive from external memory */
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ebiTFTDDModeExternal = EBI_TFTCTRL_DD_EXTERNAL,
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} EBI_TFTDDMode_TypeDef;
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/** TFT Data Increment Width */
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typedef enum
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{
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/** Pixel increments are 1 byte at a time */
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ebiTFTWidthByte = EBI_TFTCTRL_WIDTH_BYTE,
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/** Pixel increments are 2 bytes (half word) */
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ebiTFTWidthHalfWord = EBI_TFTCTRL_WIDTH_HALFWORD,
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} EBI_TFTWidth_TypeDef;
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#endif
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/*******************************************************************************
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******************************* STRUCTS ***********************************
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******************************************************************************/
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/** EBI Initialization structure */
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typedef struct
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{
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/** EBI operation mode, data and address limits */
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EBI_Mode_TypeDef mode;
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/** Address Ready pin polarity, active high or low */
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EBI_Polarity_TypeDef ardyPolarity;
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/** Address Latch Enable pin polarity, active high or low */
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EBI_Polarity_TypeDef alePolarity;
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/** Write Enable pin polarity, active high or low */
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EBI_Polarity_TypeDef wePolarity;
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/** Read Enable pin polarity, active high or low */
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EBI_Polarity_TypeDef rePolarity;
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/** Chip Select pin polarity, active high or low */
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EBI_Polarity_TypeDef csPolarity;
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#if defined(_EFM32_GIANT_FAMILY)
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/** Byte Lane pin polaritym, active high or low */
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EBI_Polarity_TypeDef blPolarity;
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/** Flag to enable or disable Byte Lane support */
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bool blEnable;
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/** Flag to enable or disable idle state insertion between transfers */
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bool noIdle;
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#endif
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/** Flag to enable or disable Address Ready support */
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bool ardyEnable;
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/** Set to turn off 32 cycle timeout ability */
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bool ardyDisableTimeout;
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/** Mask of flags which selects address banks to configure EBI_BANK<0-3> */
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uint32_t banks;
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/** Mask of flags which selects chip select lines to configure EBI_CS<0-3> */
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uint32_t csLines;
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/** Number of cycles address is held after Adress Latch Enable is asserted */
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int addrSetupCycles;
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/** Number of cycles address is driven onto the ADDRDAT bus before ALE is asserted */
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int addrHoldCycles;
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#if defined(_EFM32_GIANT_FAMILY)
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/** Enable or disables half cycle duration of the ALE strobe in the last address setup cycle */
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bool addrHalfALE;
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#endif
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/** Number of cycles for address setup before REn is asserted */
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int readSetupCycles;
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/** Number of cycles REn is held active */
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int readStrobeCycles;
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/** Number of cycles CSn is held active after REn is deasserted */
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int readHoldCycles;
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#if defined(_EFM32_GIANT_FAMILY)
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/** Enable or disable page mode reads */
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bool readPageMode;
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/** Enables or disable prefetching from sequential addresses */
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bool readPrefetch;
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/** Enabled or disables half cycle duration of the REn signal in the last strobe cycle */
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bool readHalfRE;
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#endif
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/** Number of cycles for address setup before WEn is asserted */
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int writeSetupCycles;
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/** Number of cycles WEn is held active */
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int writeStrobeCycles;
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/** Number of cycles CSn is held active after WEn is deasserted */
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int writeHoldCycles;
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#if defined(_EFM32_GIANT_FAMILY)
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/** Enable or disable the write buffer */
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bool writeBufferDisable;
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/** Enables or disables half cycle duration of the WEn signal in the last strobe cycle */
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bool writeHalfWE;
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/** Lower address pin limit to enable */
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EBI_ALow_TypeDef aLow;
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/** High address pin limit to enable */
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EBI_AHigh_TypeDef aHigh;
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/** Pin Location */
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EBI_Location_TypeDef location;
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#endif
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/** Flag, if EBI should be enabled after configuration */
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bool enable;
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} EBI_Init_TypeDef;
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/** Default config for EBI init structures */
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#if defined(_EFM32_GIANT_FAMILY)
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#define EBI_INIT_DEFAULT \
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{ ebiModeD8A8, /* 8 bit address, 8 bit data */ \
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ebiActiveLow, /* ARDY polarity */ \
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ebiActiveLow, /* ALE polarity */ \
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ebiActiveLow, /* WE polarity */ \
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ebiActiveLow, /* RE polarity */ \
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ebiActiveLow, /* CS polarity */ \
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ebiActiveLow, /* BL polarity */ \
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false, /* enable BL */ \
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false, /* enable NOIDLE */ \
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false, /* enable ARDY */ \
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false, /* don't disable ARDY timeout */ \
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EBI_BANK0, /* enable bank 0 */ \
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EBI_CS0, /* enable chip select 0 */ \
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0, /* addr setup cycles */ \
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1, /* addr hold cycles */ \
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false, /* do not enable half cycle ALE strobe */ \
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0, /* read setup cycles */ \
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0, /* read strobe cycles */ \
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0, /* read hold cycles */ \
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false, /* disable page mode */ \
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false, /* disable prefetch */ \
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false, /* do not enable half cycle REn strobe */ \
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0, /* write setup cycles */ \
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0, /* write strobe cycles */ \
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1, /* write hold cycles */ \
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false, /* do not disable the write buffer */ \
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false, /* do not enable halc cycle WEn strobe */ \
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ebiALowA0, /* ALB - Low bound, address lines */ \
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ebiAHighA0, /* APEN - High bound, address lines */ \
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ebiLocation0, /* Use Location 0 */ \
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true, /* enable EBI */ \
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}
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#else
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#define EBI_INIT_DEFAULT \
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{ ebiModeD8A8, /* 8 bit address, 8 bit data */ \
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ebiActiveLow, /* ARDY polarity */ \
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ebiActiveLow, /* ALE polarity */ \
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ebiActiveLow, /* WE polarity */ \
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ebiActiveLow, /* RE polarity */ \
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ebiActiveLow, /* CS polarity */ \
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false, /* enable ARDY */ \
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false, /* don't disable ARDY timeout */ \
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EBI_BANK0, /* enable bank 0 */ \
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EBI_CS0, /* enable chip select 0 */ \
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0, /* addr setup cycles */ \
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1, /* addr hold cycles */ \
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0, /* read setup cycles */ \
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0, /* read strobe cycles */ \
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0, /* read hold cycles */ \
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0, /* write setup cycles */ \
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0, /* write strobe cycles */ \
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1, /* write hold cycles */ \
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true, /* enable EBI */ \
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}
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#endif
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#if defined(_EFM32_GIANT_FAMILY)
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/** TFT Initialization structure */
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typedef struct
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{
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/** External memory bank for driving display */
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EBI_TFTBank_TypeDef bank;
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/** Width */
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EBI_TFTWidth_TypeDef width;
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/** Color source for masking and alpha blending */
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EBI_TFTColorSrc_TypeDef colSrc;
|
|
/** Bus Interleave mode */
|
|
EBI_TFTInterleave_TypeDef interleave;
|
|
/** Trigger for updating frame buffer pointer */
|
|
EBI_TFTFrameBufTrigger_TypeDef fbTrigger;
|
|
/** Drive DCLK from negative clock edge of internal clock */
|
|
bool shiftDClk;
|
|
/** Masking and alpha blending mode */
|
|
EBI_TFTMaskBlend_TypeDef maskBlend;
|
|
/** TFT Direct Drive mode */
|
|
EBI_TFTDDMode_TypeDef driveMode;
|
|
/** TFT Polarity for Chip Select (CS) Line */
|
|
EBI_Polarity_TypeDef csPolarity;
|
|
/** TFT Polarity for Data Clock (DCLK) Line */
|
|
EBI_Polarity_TypeDef dclkPolarity;
|
|
/** TFT Polarity for Data Enable (DATAEN) Line */
|
|
EBI_Polarity_TypeDef dataenPolarity;
|
|
/** TFT Polarity for Horizontal Sync (HSYNC) Line */
|
|
EBI_Polarity_TypeDef hsyncPolarity;
|
|
/** TFT Polarity for Vertical Sync (VSYNC) Line */
|
|
EBI_Polarity_TypeDef vsyncPolarity;
|
|
/** Horizontal size in pixels */
|
|
int hsize;
|
|
/** Horizontal Front Porch Size */
|
|
int hPorchFront;
|
|
/** Horizontal Back Porch Size */
|
|
int hPorchBack;
|
|
/** Horizontal Synchronization Pulse Width */
|
|
int hPulseWidth;
|
|
/** Vertical size in pixels */
|
|
int vsize;
|
|
/** Vertical Front Porch Size */
|
|
int vPorchFront;
|
|
/** Vertical Back Porch Size */
|
|
int vPorchBack;
|
|
/** Vertical Synchronization Pulse Width */
|
|
int vPulseWidth;
|
|
/** TFT Frame Buffer address, offset to EBI bank base address */
|
|
uint32_t addressOffset;
|
|
/** TFT DCLK period in internal cycles */
|
|
int dclkPeriod;
|
|
/** Starting position of External Direct Drive relative to DCLK inactive edge */
|
|
int startPosition;
|
|
/** Number of cycles RGB data is driven before active edge of DCLK */
|
|
int setupCycles;
|
|
/** Number of cycles RGB data is held after active edge of DCLK */
|
|
int holdCycles;
|
|
} EBI_TFTInit_TypeDef;
|
|
|
|
#define EBI_TFTINIT_DEFAULT \
|
|
{ ebiTFTBank0, /* Select EBI Bank 0 */ \
|
|
ebiTFTWidthHalfWord, /* Select 2-byte increments */ \
|
|
ebiTFTColorSrcMem, /* Use memory as source for mask/blending */ \
|
|
ebiTFTInterleaveUnlimited, /* Unlimited interleaved accesses */ \
|
|
ebiTFTFrameBufTriggerVSync, /* VSYNC as frame buffer update trigger */ \
|
|
false, /* Drive DCLK from negative edge of internal clock */ \
|
|
ebiTFTMBDisabled, /* No masking and alpha blending enabled */ \
|
|
ebiTFTDDModeExternal, /* Drive from external memory */ \
|
|
ebiActiveLow, /* CS Active Low polarity */ \
|
|
ebiActiveLow, /* DCLK Active Low polarity */ \
|
|
ebiActiveLow, /* DATAEN Active Low polarity */ \
|
|
ebiActiveLow, /* HSYNC Active Low polarity */ \
|
|
ebiActiveLow, /* VSYNC Active Low polarity */ \
|
|
320, /* Horizontal size in pixels */ \
|
|
1, /* Horizontal Front Porch */ \
|
|
29, /* Horizontal Back Porch */ \
|
|
2, /* Horizontal Synchronization Pulse Width */ \
|
|
240, /* Vertical size in pixels */ \
|
|
1, /* Vertical Front Porch */ \
|
|
4, /* Vertical Back Porch */ \
|
|
2, /* Vertical Synchronization Pulse Width */ \
|
|
0x0000, /* Address offset to EBI memory base */ \
|
|
5, /* DCLK Period */ \
|
|
2, /* DCLK Start */ \
|
|
1, /* DCLK Setup cycles */ \
|
|
1, /* DCLK Hold cycles */ \
|
|
}
|
|
|
|
#endif
|
|
/*******************************************************************************
|
|
***************************** PROTOTYPES **********************************
|
|
******************************************************************************/
|
|
|
|
void EBI_Init(const EBI_Init_TypeDef *ebiInit);
|
|
void EBI_Disable(void);
|
|
uint32_t EBI_BankAddress(uint32_t bank);
|
|
void EBI_BankEnable(uint32_t banks, bool enable);
|
|
|
|
#if defined(_EFM32_GIANT_FAMILY)
|
|
void EBI_TFTInit(const EBI_TFTInit_TypeDef *ebiTFTInit);
|
|
void EBI_TFTSizeSet(uint32_t horizontal, uint32_t vertical);
|
|
void EBI_TFTHPorchSet(int front, int back, int pulseWidth);
|
|
void EBI_TFTVPorchSet(int front, int back, int pulseWidth);
|
|
void EBI_TFTTimingSet(int dclkPeriod, int start, int setup, int hold);
|
|
#endif
|
|
|
|
#if defined(_EFM32_GIANT_FAMILY)
|
|
/* This functionality is only available on devices with independent timing support */
|
|
void EBI_BankReadTimingSet(uint32_t bank, int setupCycles, int strobeCycles, int holdCycles);
|
|
void EBI_BankReadTimingConfig(uint32_t bank, bool pageMode, bool prefetch, bool halfRE);
|
|
|
|
void EBI_BankWriteTimingSet(uint32_t bank, int setupCycles, int strobeCycles, int holdCycles);
|
|
void EBI_BankWriteTimingConfig(uint32_t bank, bool writeBufDisable, bool halfWE);
|
|
|
|
void EBI_BankAddressTimingSet(uint32_t bank, int setupCycles, int holdCycles);
|
|
void EBI_BankAddressTimingConfig(uint32_t bank, bool halfALE);
|
|
|
|
void EBI_BankPolaritySet(uint32_t bank, EBI_Line_TypeDef line, EBI_Polarity_TypeDef polarity);
|
|
void EBI_BankByteLaneEnable(uint32_t bank, bool enable);
|
|
void EBI_BankPage(uint32_t bank, bool enable);
|
|
void EBI_AltMapEnable(bool enable);
|
|
|
|
/* TBD: NAND support */
|
|
/* TBD: ECC support */
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Enable or disable TFT Direct Drive
|
|
*
|
|
* @param[in] mode
|
|
* Drive from Internal or External memory, or Disable Direct Drive
|
|
******************************************************************************/
|
|
static __INLINE void EBI_TFTEnable(EBI_TFTDDMode_TypeDef mode)
|
|
{
|
|
EBI->TFTCTRL = (EBI->TFTCTRL & ~(_EBI_TFTCTRL_DD_MASK)) | (uint32_t) mode;
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Configure frame buffer pointer
|
|
*
|
|
* @param[in] address
|
|
* Frame pointer address, as offset by EBI base address
|
|
******************************************************************************/
|
|
static __INLINE void EBI_TFTFrameBaseSet(uint32_t address)
|
|
{
|
|
EBI->TFTFRAMEBASE = (uint32_t) address;
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief Set TFT Pixel Color 0 or 1
|
|
*
|
|
* @param[in] pixel
|
|
* Which pixel instance to set
|
|
* @param[in] color
|
|
* Color of pixel, 16-bit value
|
|
******************************************************************************/
|
|
static __INLINE void EBI_TFTPixelSet(int pixel, uint32_t color)
|
|
{
|
|
EFM_ASSERT(pixel == 0 || pixel == 1);
|
|
|
|
if (pixel == 0)
|
|
{
|
|
EBI->TFTPIXEL0 = color;
|
|
}
|
|
if (pixel == 1)
|
|
{
|
|
EBI->TFTPIXEL1 = color;
|
|
}
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief Masking and Blending Mode Set
|
|
*
|
|
* @param[in] alpha
|
|
* 8-bit value indicating blending factor
|
|
******************************************************************************/
|
|
static __INLINE void EBI_TFTMaskBlendMode(EBI_TFTMaskBlend_TypeDef maskBlend)
|
|
{
|
|
EBI->TFTCTRL = (EBI->TFTCTRL & (~_EBI_TFTCTRL_MASKBLEND_MASK))|maskBlend;
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief Set TFT Alpha Blending Factor
|
|
*
|
|
* @param[in] alpha
|
|
* 8-bit value indicating blending factor
|
|
******************************************************************************/
|
|
static __INLINE void EBI_TFTAlphaBlendSet(uint8_t alpha)
|
|
{
|
|
EBI->TFTALPHA = alpha;
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief Set TFT mask value
|
|
* Data accesses that matches this value are suppressed
|
|
* @param[in] mask
|
|
******************************************************************************/
|
|
static __INLINE void EBI_TFTMaskSet(uint32_t mask)
|
|
{
|
|
EBI->TFTMASK = mask;
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief Get current vertical position counter
|
|
* @return
|
|
* Returns the current line position for the visible part of a frame
|
|
******************************************************************************/
|
|
static __INLINE uint32_t EBI_TFTVCount(void)
|
|
{
|
|
return((EBI->TFTSTATUS & _EBI_TFTSTATUS_VCNT_MASK) >> _EBI_TFTSTATUS_VCNT_SHIFT);
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief Get current horizontal position counter
|
|
* @return
|
|
* Returns the current horizontal pixel position within a visible line
|
|
******************************************************************************/
|
|
static __INLINE uint32_t EBI_TFTHCount(void)
|
|
{
|
|
return((EBI->TFTSTATUS & _EBI_TFTSTATUS_HCNT_MASK) >> _EBI_TFTSTATUS_HCNT_SHIFT);
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief Set Frame Buffer Trigger
|
|
* Frame buffer pointer will be updated either on each horizontal line (hsync)
|
|
* or vertical update (vsync)(
|
|
******************************************************************************/
|
|
static __INLINE void EBI_TFTFBTriggerSet(EBI_TFTFrameBufTrigger_TypeDef sync)
|
|
{
|
|
EBI->TFTCTRL = ((EBI->TFTCTRL & ~_EBI_TFTCTRL_FBCTRIG_MASK)|sync);
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief Set horizontal TFT stride value in number of bytes
|
|
*
|
|
* @param[in] nbytes
|
|
* Number of bytes to add to frame buffer pointer after each horizontal line
|
|
* update
|
|
******************************************************************************/
|
|
static __INLINE void EBI_TFTHStrideSet(uint32_t nbytes)
|
|
{
|
|
EFM_ASSERT(nbytes < 0x1000);
|
|
|
|
EBI->TFTSTRIDE = (EBI->TFTSTRIDE & ~(_EBI_TFTSTRIDE_HSTRIDE_MASK))|
|
|
(nbytes<<_EBI_TFTSTRIDE_HSTRIDE_SHIFT);
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Clear one or more pending EBI interrupts.
|
|
* @param[in] flags
|
|
* Pending EBI interrupt source to clear. Use a logical OR combination
|
|
* of valid interrupt flags for the EBI module (EBI_IF_nnn).
|
|
******************************************************************************/
|
|
static __INLINE void EBI_IntClear(uint32_t flags)
|
|
{
|
|
EBI->IFC = flags;
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Set one or more pending EBI interrupts from SW.
|
|
*
|
|
* @param[in] flags
|
|
* EBI interrupt sources to set to pending. Use a logical OR combination of
|
|
* valid interrupt flags for the EBI module (EBI_IF_nnn).
|
|
******************************************************************************/
|
|
static __INLINE void EBI_IntSet(uint32_t flags)
|
|
{
|
|
EBI->IFS = flags;
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Disable one or more EBI interrupts
|
|
*
|
|
* @param[in] flags
|
|
* EBI interrupt sources to disable. Use logical OR combination of valid
|
|
* interrupt flags for the EBI module (EBI_IF_nnn)
|
|
******************************************************************************/
|
|
static __INLINE void EBI_IntDisable(uint32_t flags)
|
|
{
|
|
EBI->IEN &= ~(flags);
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Enable one or more EBI interrupts
|
|
*
|
|
* @param[in] flags
|
|
* EBI interrupt sources to enable. Use logical OR combination of valid
|
|
* interrupt flags for the EBI module (EBI_IF_nnn)
|
|
******************************************************************************/
|
|
static __INLINE void EBI_IntEnable(uint32_t flags)
|
|
{
|
|
EBI->IEN |= flags;
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Get pending EBI interrupt flags
|
|
*
|
|
* @note
|
|
* The event bits are not cleared by the use of this function
|
|
*
|
|
* @return
|
|
* EBI interrupt sources pending, a logical combination of valid EBI
|
|
* interrupt flags, EBI_IF_nnn
|
|
******************************************************************************/
|
|
static __INLINE uint32_t EBI_IntGet(void)
|
|
{
|
|
return(EBI->IF);
|
|
}
|
|
#endif
|
|
|
|
void EBI_ChipSelectEnable(uint32_t banks, bool enable);
|
|
void EBI_ReadTimingSet(int setupCycles, int strobeCycles, int holdCycles);
|
|
void EBI_WriteTimingSet(int setupCycles, int strobeCycles, int holdCycles);
|
|
void EBI_AddressTimingSet(int setupCycles, int holdCycles);
|
|
void EBI_PolaritySet(EBI_Line_TypeDef line, EBI_Polarity_TypeDef polarity);
|
|
|
|
/** @} (end addtogroup EBI) */
|
|
/** @} (end addtogroup EFM32_Library) */
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* defined(EBI_COUNT) && (EBI_COUNT > 0) */
|
|
|
|
#endif /* __EFM32_EBI_H */
|