646 lines
28 KiB
C
646 lines
28 KiB
C
/***************************************************************************//**
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* @file
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* @brief Universal synchronous/asynchronous receiver/transmitter (USART/UART)
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* peripheral API for EFM32.
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* @author Energy Micro AS
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* @version 2.3.2
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*******************************************************************************
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* @section License
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* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
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*******************************************************************************
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*
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* This source code is the property of Energy Micro AS. The source and compiled
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* code may only be used on Energy Micro "EFM32" microcontrollers.
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*
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* This copyright notice may not be removed from the source code nor changed.
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*
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* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
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* obligation to support this Software. Energy Micro AS is providing the
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* Software "AS IS", with no express or implied warranties of any kind,
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* including, but not limited to, any implied warranties of merchantability
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* or fitness for any particular purpose or warranties against infringement
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* of any proprietary rights of a third party.
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*
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* Energy Micro AS will not be liable for any consequential, incidental, or
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* special damages, or any other relief, or for any claim by any third party,
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* arising from your use of this Software.
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*
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******************************************************************************/
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#ifndef __EFM32_USART_H
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#define __EFM32_USART_H
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#include <stdbool.h>
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#include "efm32.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************************************************************//**
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* @addtogroup EFM32_Library
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* @{
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******************************************************************************/
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/***************************************************************************//**
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* @addtogroup USART
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* @brief Universal Synchronous/Asynchronous Receiver/Transmitter (USART) peripheral API for EFM32
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* @{
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******************************************************************************/
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/*******************************************************************************
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******************************** ENUMS ************************************
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******************************************************************************/
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/** Databit selection. */
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typedef enum
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{
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usartDatabits4 = USART_FRAME_DATABITS_FOUR, /**< 4 databits (not available for UART). */
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usartDatabits5 = USART_FRAME_DATABITS_FIVE, /**< 5 databits (not available for UART). */
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usartDatabits6 = USART_FRAME_DATABITS_SIX, /**< 6 databits (not available for UART). */
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usartDatabits7 = USART_FRAME_DATABITS_SEVEN, /**< 7 databits (not available for UART). */
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usartDatabits8 = USART_FRAME_DATABITS_EIGHT, /**< 8 databits. */
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usartDatabits9 = USART_FRAME_DATABITS_NINE, /**< 9 databits. */
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usartDatabits10 = USART_FRAME_DATABITS_TEN, /**< 10 databits (not available for UART). */
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usartDatabits11 = USART_FRAME_DATABITS_ELEVEN, /**< 11 databits (not available for UART). */
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usartDatabits12 = USART_FRAME_DATABITS_TWELVE, /**< 12 databits (not available for UART). */
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usartDatabits13 = USART_FRAME_DATABITS_THIRTEEN, /**< 13 databits (not available for UART). */
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usartDatabits14 = USART_FRAME_DATABITS_FOURTEEN, /**< 14 databits (not available for UART). */
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usartDatabits15 = USART_FRAME_DATABITS_FIFTEEN, /**< 15 databits (not available for UART). */
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usartDatabits16 = USART_FRAME_DATABITS_SIXTEEN /**< 16 databits (not available for UART). */
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} USART_Databits_TypeDef;
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/** Enable selection. */
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typedef enum
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{
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/** Disable both receiver and transmitter. */
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usartDisable = 0x0,
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/** Enable receiver only, transmitter disabled. */
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usartEnableRx = USART_CMD_RXEN,
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/** Enable transmitter only, receiver disabled. */
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usartEnableTx = USART_CMD_TXEN,
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/** Enable both receiver and transmitter. */
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usartEnable = (USART_CMD_RXEN | USART_CMD_TXEN)
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} USART_Enable_TypeDef;
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/** Oversampling selection, used for asynchronous operation. */
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typedef enum
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{
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usartOVS16 = USART_CTRL_OVS_X16, /**< 16x oversampling (normal). */
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usartOVS8 = USART_CTRL_OVS_X8, /**< 8x oversampling. */
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usartOVS6 = USART_CTRL_OVS_X6, /**< 6x oversampling. */
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usartOVS4 = USART_CTRL_OVS_X4 /**< 4x oversampling. */
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} USART_OVS_TypeDef;
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/** Parity selection, mainly used for asynchronous operation. */
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typedef enum
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{
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usartNoParity = USART_FRAME_PARITY_NONE, /**< No parity. */
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usartEvenParity = USART_FRAME_PARITY_EVEN, /**< Even parity. */
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usartOddParity = USART_FRAME_PARITY_ODD /**< Odd parity. */
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} USART_Parity_TypeDef;
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/** Stopbits selection, used for asynchronous operation. */
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typedef enum
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{
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usartStopbits0p5 = USART_FRAME_STOPBITS_HALF, /**< 0.5 stopbits. */
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usartStopbits1 = USART_FRAME_STOPBITS_ONE, /**< 1 stopbits. */
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usartStopbits1p5 = USART_FRAME_STOPBITS_ONEANDAHALF, /**< 1.5 stopbits. */
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usartStopbits2 = USART_FRAME_STOPBITS_TWO /**< 2 stopbits. */
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} USART_Stopbits_TypeDef;
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/** Clock polarity/phase mode. */
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typedef enum
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{
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/** Clock idle low, sample on rising edge. */
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usartClockMode0 = USART_CTRL_CLKPOL_IDLELOW | USART_CTRL_CLKPHA_SAMPLELEADING,
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/** Clock idle low, sample on falling edge. */
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usartClockMode1 = USART_CTRL_CLKPOL_IDLELOW | USART_CTRL_CLKPHA_SAMPLETRAILING,
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/** Clock idle high, sample on falling edge. */
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usartClockMode2 = USART_CTRL_CLKPOL_IDLEHIGH | USART_CTRL_CLKPHA_SAMPLELEADING,
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/** Clock idle high, sample on rising edge. */
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usartClockMode3 = USART_CTRL_CLKPOL_IDLEHIGH | USART_CTRL_CLKPHA_SAMPLETRAILING
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} USART_ClockMode_TypeDef;
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/** Pulse width selection for IrDA mode. */
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typedef enum
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{
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/** IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1 */
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usartIrDAPwONE = USART_IRCTRL_IRPW_ONE,
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/** IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1 */
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usartIrDAPwTWO = USART_IRCTRL_IRPW_TWO,
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/** IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1 */
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usartIrDAPwTHREE = USART_IRCTRL_IRPW_THREE,
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/** IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1 */
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usartIrDAPwFOUR = USART_IRCTRL_IRPW_FOUR
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} USART_IrDAPw_Typedef;
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/** PRS channel selection for IrDA mode. */
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typedef enum
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{
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usartIrDAPrsCh0 = USART_IRCTRL_IRPRSSEL_PRSCH0, /**< PRS channel 0 */
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usartIrDAPrsCh1 = USART_IRCTRL_IRPRSSEL_PRSCH1, /**< PRS channel 1 */
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usartIrDAPrsCh2 = USART_IRCTRL_IRPRSSEL_PRSCH2, /**< PRS channel 2 */
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usartIrDAPrsCh3 = USART_IRCTRL_IRPRSSEL_PRSCH3, /**< PRS channel 3 */
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usartIrDAPrsCh4 = USART_IRCTRL_IRPRSSEL_PRSCH4, /**< PRS channel 4 */
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usartIrDAPrsCh5 = USART_IRCTRL_IRPRSSEL_PRSCH5, /**< PRS channel 5 */
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usartIrDAPrsCh6 = USART_IRCTRL_IRPRSSEL_PRSCH6, /**< PRS channel 6 */
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usartIrDAPrsCh7 = USART_IRCTRL_IRPRSSEL_PRSCH7 /**< PRS channel 7 */
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} USART_IrDAPrsSel_Typedef;
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#if defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_TINY_FAMILY)
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/** I2S format selection. */
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typedef enum
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{
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usartI2sFormatW32D32 = USART_I2SCTRL_FORMAT_W32D32, /**< 32-bit word, 32-bit data */
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usartI2sFormatW32D24M = USART_I2SCTRL_FORMAT_W32D24M, /**< 32-bit word, 32-bit data with 8 lsb masked */
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usartI2sFormatW32D24 = USART_I2SCTRL_FORMAT_W32D24, /**< 32-bit word, 24-bit data */
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usartI2sFormatW32D16 = USART_I2SCTRL_FORMAT_W32D16, /**< 32-bit word, 16-bit data */
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usartI2sFormatW32D8 = USART_I2SCTRL_FORMAT_W32D8, /**< 32-bit word, 8-bit data */
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usartI2sFormatW16D16 = USART_I2SCTRL_FORMAT_W16D16, /**< 16-bit word, 16-bit data */
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usartI2sFormatW16D8 = USART_I2SCTRL_FORMAT_W16D8, /**< 16-bit word, 8-bit data */
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usartI2sFormatW8D8 = USART_I2SCTRL_FORMAT_W8D8 /**< 8-bit word, 8-bit data */
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} USART_I2sFormat_TypeDef;
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/** I2S frame data justify. */
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typedef enum
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{
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usartI2sJustifyLeft = USART_I2SCTRL_JUSTIFY_LEFT, /**< Data is left-justified within the frame */
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usartI2sJustifyRight = USART_I2SCTRL_JUSTIFY_RIGHT /**< Data is right-justified within the frame */
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} USART_I2sJustify_TypeDef;
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/** USART Rx input PRS selection. */
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typedef enum
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{
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usartPrsRxCh0 = USART_INPUT_RXPRSSEL_PRSCH0, /**< PRSCH0 selected as USART_INPUT */
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usartPrsRxCh1 = USART_INPUT_RXPRSSEL_PRSCH1, /**< PRSCH1 selected as USART_INPUT */
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usartPrsRxCh2 = USART_INPUT_RXPRSSEL_PRSCH2, /**< PRSCH2 selected as USART_INPUT */
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usartPrsRxCh3 = USART_INPUT_RXPRSSEL_PRSCH3, /**< PRSCH3 selected as USART_INPUT */
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usartPrsRxCh4 = USART_INPUT_RXPRSSEL_PRSCH4, /**< PRSCH4 selected as USART_INPUT */
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usartPrsRxCh5 = USART_INPUT_RXPRSSEL_PRSCH5, /**< PRSCH5 selected as USART_INPUT */
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usartPrsRxCh6 = USART_INPUT_RXPRSSEL_PRSCH6, /**< PRSCH6 selected as USART_INPUT */
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#if defined(_EFM32_TINY_FAMILY)
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usartPrsRxCh7 = USART_INPUT_RXPRSSEL_PRSCH7 /**< PRSCH7 selected as USART_INPUT */
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#elif defined(_EFM32_GIANT_FAMILY)
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usartPrsRxCh7 = USART_INPUT_RXPRSSEL_PRSCH7, /**< PRSCH7 selected as USART_INPUT */
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usartPrsRxCh8 = USART_INPUT_RXPRSSEL_PRSCH8, /**< PRSCH8 selected as USART_INPUT */
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usartPrsRxCh9 = USART_INPUT_RXPRSSEL_PRSCH9, /**< PRSCH9 selected as USART_INPUT */
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usartPrsRxCh10 = USART_INPUT_RXPRSSEL_PRSCH10, /**< PRSCH10 selected as USART_INPUT */
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usartPrsRxCh11 = USART_INPUT_RXPRSSEL_PRSCH11 /**< PRSCH11 selected as USART_INPUT */
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#else
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#error Unknown EFM32 family.
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#endif
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} USART_PrsRxCh_TypeDef;
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#endif
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#if defined (_EFM32_TINY_FAMILY) || defined(_EFM32_GIANT_FAMILY)
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/** USART PRS Transmit Trigger Channels */
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typedef enum
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{
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usartPrsTriggerCh0 = USART_TRIGCTRL_TSEL_PRSCH0, /**< PRSCH0 selected as USART Trigger */
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usartPrsTriggerCh1 = USART_TRIGCTRL_TSEL_PRSCH1, /**< PRSCH0 selected as USART Trigger */
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usartPrsTriggerCh2 = USART_TRIGCTRL_TSEL_PRSCH2, /**< PRSCH0 selected as USART Trigger */
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usartPrsTriggerCh3 = USART_TRIGCTRL_TSEL_PRSCH3, /**< PRSCH0 selected as USART Trigger */
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usartPrsTriggerCh4 = USART_TRIGCTRL_TSEL_PRSCH4, /**< PRSCH0 selected as USART Trigger */
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usartPrsTriggerCh5 = USART_TRIGCTRL_TSEL_PRSCH5, /**< PRSCH0 selected as USART Trigger */
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usartPrsTriggerCh6 = USART_TRIGCTRL_TSEL_PRSCH6, /**< PRSCH0 selected as USART Trigger */
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usartPrsTriggerCh7 = USART_TRIGCTRL_TSEL_PRSCH7, /**< PRSCH0 selected as USART Trigger */
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} USART_PrsTriggerCh_TypeDef;
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#endif
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/*******************************************************************************
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******************************* STRUCTS ***********************************
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******************************************************************************/
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/** Asynchronous mode init structure. */
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typedef struct
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{
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/** Specifies whether TX and/or RX shall be enabled when init completed. */
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USART_Enable_TypeDef enable;
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/**
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* USART/UART reference clock assumed when configuring baudrate setup. Set
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* it to 0 if currently configurated reference clock shall be used.
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*/
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uint32_t refFreq;
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/** Desired baudrate. */
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uint32_t baudrate;
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/** Oversampling used. */
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USART_OVS_TypeDef oversampling;
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/** Number of databits in frame. Notice that UART modules only support 8 or
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* 9 databits. */
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USART_Databits_TypeDef databits;
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/** Parity mode to use. */
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USART_Parity_TypeDef parity;
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/** Number of stopbits to use. */
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USART_Stopbits_TypeDef stopbits;
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#if defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_TINY_FAMILY)
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/** Majority Vote Disable for 16x, 8x and 6x oversampling modes. */
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bool mvdis;
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/** Enable USART Rx via PRS. */
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bool prsRxEnable;
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/** Select PRS channel for USART Rx. (Only valid if prsRxEnable is true). */
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USART_PrsRxCh_TypeDef prsRxCh;
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#endif
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} USART_InitAsync_TypeDef;
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#if defined(_EFM32_TINY_FAMILY) || defined(_EFM32_GIANT_FAMILY)
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/** USART PRS trigger enable */
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typedef struct
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{
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#if defined(_EFM32_GIANT_FAMILY)
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/** Enable AUTOTX */
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bool autoTxTriggerEnable;
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#endif
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/** Trigger receive via PRS channel */
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bool rxTriggerEnable;
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/** Trigger transmit via PRS channel */
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bool txTriggerEnable;
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/** PRS channel to be used to trigger auto transmission */
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USART_PrsTriggerCh_TypeDef prsTriggerChannel;
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} USART_PrsTriggerInit_TypeDef;
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#endif
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/** Default config for USART async init structure. */
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#if defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_TINY_FAMILY)
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#define USART_INITASYNC_DEFAULT \
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{ usartEnable, /* Enable RX/TX when init completed. */ \
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0, /* Use current configured reference clock for configuring baudrate. */ \
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115200, /* 115200 bits/s. */ \
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usartOVS16, /* 16x oversampling. */ \
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usartDatabits8, /* 8 databits. */ \
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usartNoParity, /* No parity. */ \
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usartStopbits1, /* 1 stopbit. */ \
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false, /* Do not disable majority vote. */ \
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false, /* Not USART PRS input mode. */ \
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usartPrsRxCh0 /* PRS channel 0. */ \
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}
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#else
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#define USART_INITASYNC_DEFAULT \
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{ usartEnable, /* Enable RX/TX when init completed. */ \
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0, /* Use current configured reference clock for configuring baudrate. */ \
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115200, /* 115200 bits/s. */ \
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usartOVS16, /* 16x oversampling. */ \
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usartDatabits8, /* 8 databits. */ \
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usartNoParity, /* No parity. */ \
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usartStopbits1 /* 1 stopbit. */ \
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}
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#endif
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/** Synchronous mode init structure. */
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typedef struct
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{
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/** Specifies whether TX and/or RX shall be enabled when init completed. */
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USART_Enable_TypeDef enable;
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/**
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* USART/UART reference clock assumed when configuring baudrate setup. Set
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* it to 0 if currently configurated reference clock shall be used.
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*/
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uint32_t refFreq;
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/** Desired baudrate. */
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uint32_t baudrate;
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/** Number of databits in frame. */
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USART_Databits_TypeDef databits;
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/** Select if to operate in master or slave mode. */
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bool master;
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/** Select if to send most or least significant bit first. */
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bool msbf;
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/** Clock polarity/phase mode. */
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USART_ClockMode_TypeDef clockMode;
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#if defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_TINY_FAMILY)
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/** Enable USART Rx via PRS. */
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bool prsRxEnable;
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/** Select PRS channel for USART Rx. (Only valid if prsRxEnable is true). */
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USART_PrsRxCh_TypeDef prsRxCh;
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/** Enable AUTOTX mode. Transmits as long as RX is not full.
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* If TX is empty, underflows are generated. */
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bool autoTx;
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#endif
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} USART_InitSync_TypeDef;
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/** Default config for USART sync init structure. */
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#if defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_TINY_FAMILY)
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#define USART_INITSYNC_DEFAULT \
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{ usartEnable, /* Enable RX/TX when init completed. */ \
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0, /* Use current configured reference clock for configuring baudrate. */ \
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1000000, /* 1 Mbits/s. */ \
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usartDatabits8, /* 8 databits. */ \
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true, /* Master mode. */ \
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false, /* Send least significant bit first. */ \
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usartClockMode0, /* Clock idle low, sample on rising edge. */ \
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false, /* Not USART PRS input mode. */ \
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usartPrsRxCh0, /* PRS channel 0. */ \
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false /* No AUTOTX mode. */ \
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}
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#else
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#define USART_INITSYNC_DEFAULT \
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{ usartEnable, /* Enable RX/TX when init completed. */ \
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0, /* Use current configured reference clock for configuring baudrate. */ \
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1000000, /* 1 Mbits/s. */ \
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usartDatabits8, /* 8 databits. */ \
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true, /* Master mode. */ \
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false, /* Send least significant bit first. */ \
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usartClockMode0 /* Clock idle low, sample on rising edge. */ \
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}
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#endif
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/** IrDA mode init structure. Inherited from asynchronous mode init structure */
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typedef struct
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{
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/** General Async initialization structure. */
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USART_InitAsync_TypeDef async;
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/** Set to invert Rx signal before IrDA demodulator. */
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bool irRxInv;
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/** Set to enable filter on IrDA demodulator. */
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bool irFilt;
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/** Configure the pulse width generated by the IrDA modulator as a fraction
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* of the configured USART bit period. */
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USART_IrDAPw_Typedef irPw;
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/** Enable the PRS channel selected by irPrsSel as input to IrDA module
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* instead of TX. */
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bool irPrsEn;
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/** A PRS can be used as input to the pulse modulator instead of TX.
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* This value selects the channel to use. */
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USART_IrDAPrsSel_Typedef irPrsSel;
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} USART_InitIrDA_TypeDef;
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/** Default config for IrDA mode init structure. */
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#define USART_INITIRDA_DEFAULT \
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{ \
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{ usartEnable, /* Enable RX/TX when init completed. */ \
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0, /* Use current configured reference clock for configuring baudrate. */ \
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115200, /* 115200 bits/s. */ \
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usartOVS16, /* 16x oversampling. */ \
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usartDatabits8, /* 8 databits. */ \
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usartEvenParity, /* Even parity. */ \
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usartStopbits1 /* 1 stopbit. */ \
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}, \
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false, /* Rx invert disabled. */ \
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false, /* Filtering disabled. */ \
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usartIrDAPwTHREE, /* Pulse width is set to ONE. */ \
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false, /* Routing to PRS is disabled. */ \
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usartIrDAPrsCh0 /* PRS channel 0. */ \
|
|
}
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|
|
|
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|
#if defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_TINY_FAMILY)
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|
/** I2S mode init structure. Inherited from synchronous mode init structure */
|
|
typedef struct
|
|
{
|
|
/** General Sync initialization structure. */
|
|
USART_InitSync_TypeDef sync;
|
|
|
|
/** I2S mode. */
|
|
USART_I2sFormat_TypeDef format;
|
|
|
|
/** Delay on I2S data. Set to add a one-cycle delay between a transition
|
|
* on the word-clock and the start of the I2S word.
|
|
* Should be set for standard I2S format. */
|
|
bool delay;
|
|
|
|
/** Separate DMA Request For Left/Right Data. */
|
|
bool dmaSplit;
|
|
|
|
/** Justification of I2S data within the frame */
|
|
USART_I2sJustify_TypeDef justify;
|
|
|
|
/** Stero or Mono, set to true for mono. */
|
|
bool mono;
|
|
} USART_InitI2s_TypeDef;
|
|
|
|
|
|
/** Default config for I2S mode init structure. */
|
|
#define USART_INITI2S_DEFAULT \
|
|
{ \
|
|
{ usartEnableTx, /* Enable TX when init completed. */ \
|
|
0, /* Use current configured reference clock for configuring baudrate. */ \
|
|
1000000, /* Baudrate 1M bits/s. */ \
|
|
usartDatabits16, /* 16 databits. */ \
|
|
true, /* Operate as I2S master. */ \
|
|
true, /* Most significant bit first. */ \
|
|
usartClockMode0, /* Clock idle low, sample on rising edge. */ \
|
|
false, /* Don't enable USARTRx via PRS. */ \
|
|
usartPrsRxCh0, /* PRS channel selection (dummy). */ \
|
|
false /* Disable AUTOTX mode. */ \
|
|
}, \
|
|
usartI2sFormatW16D16, /* 16-bit word, 16-bit data */ \
|
|
true, /* Delay on I2S data. */ \
|
|
false, /* No DMA split. */ \
|
|
usartI2sJustifyLeft, /* Data is left-justified within the frame */ \
|
|
false /* Stereo mode. */ \
|
|
}
|
|
#endif
|
|
|
|
/*******************************************************************************
|
|
***************************** PROTOTYPES **********************************
|
|
******************************************************************************/
|
|
|
|
void USART_BaudrateAsyncSet(USART_TypeDef *usart,
|
|
uint32_t refFreq,
|
|
uint32_t baudrate,
|
|
USART_OVS_TypeDef ovs);
|
|
uint32_t USART_BaudrateCalc(uint32_t refFreq,
|
|
uint32_t clkdiv,
|
|
bool syncmode,
|
|
USART_OVS_TypeDef ovs);
|
|
uint32_t USART_BaudrateGet(USART_TypeDef *usart);
|
|
void USART_BaudrateSyncSet(USART_TypeDef *usart,
|
|
uint32_t refFreq,
|
|
uint32_t baudrate);
|
|
void USART_Enable(USART_TypeDef *usart, USART_Enable_TypeDef enable);
|
|
|
|
void USART_InitAsync(USART_TypeDef *usart, const USART_InitAsync_TypeDef *init);
|
|
void USART_InitSync(USART_TypeDef *usart, const USART_InitSync_TypeDef *init);
|
|
void USART_InitIrDA(const USART_InitIrDA_TypeDef *init);
|
|
|
|
#if defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_TINY_FAMILY)
|
|
void USART_InitI2s(USART_TypeDef *usart, USART_InitI2s_TypeDef *init);
|
|
void USART_InitPrsTrigger(USART_TypeDef *usart, const USART_PrsTriggerInit_TypeDef *init);
|
|
#endif
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Clear one or more pending USART interrupts.
|
|
*
|
|
* @param[in] usart
|
|
* Pointer to USART/UART peripheral register block.
|
|
*
|
|
* @param[in] flags
|
|
* Pending USART/UART interrupt source(s) to clear. Use one or more valid
|
|
* interrupt flags for the USART module (USART_IF_nnn) OR'ed together.
|
|
******************************************************************************/
|
|
static __INLINE void USART_IntClear(USART_TypeDef *usart, uint32_t flags)
|
|
{
|
|
usart->IFC = flags;
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Disable one or more USART interrupts.
|
|
*
|
|
* @param[in] usart
|
|
* Pointer to USART/UART peripheral register block.
|
|
*
|
|
* @param[in] flags
|
|
* USART/UART interrupt source(s) to disable. Use one or more valid
|
|
* interrupt flags for the USART module (USART_IF_nnn) OR'ed together.
|
|
******************************************************************************/
|
|
static __INLINE void USART_IntDisable(USART_TypeDef *usart, uint32_t flags)
|
|
{
|
|
usart->IEN &= ~(flags);
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Enable one or more USART interrupts.
|
|
*
|
|
* @note
|
|
* Depending on the use, a pending interrupt may already be set prior to
|
|
* enabling the interrupt. Consider using USART_IntClear() prior to enabling
|
|
* if such a pending interrupt should be ignored.
|
|
*
|
|
* @param[in] usart
|
|
* Pointer to USART/UART peripheral register block.
|
|
*
|
|
* @param[in] flags
|
|
* USART/UART interrupt source(s) to enable. Use one or more valid
|
|
* interrupt flags for the USART module (USART_IF_nnn) OR'ed together.
|
|
******************************************************************************/
|
|
static __INLINE void USART_IntEnable(USART_TypeDef *usart, uint32_t flags)
|
|
{
|
|
usart->IEN |= flags;
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Get pending USART interrupt flags.
|
|
*
|
|
* @note
|
|
* The event bits are not cleared by the use of this function.
|
|
*
|
|
* @param[in] usart
|
|
* Pointer to USART/UART peripheral register block.
|
|
*
|
|
* @return
|
|
* USART/UART interrupt source(s) pending. Returns one or more valid
|
|
* interrupt flags for the USART module (USART_IF_nnn) OR'ed together.
|
|
******************************************************************************/
|
|
static __INLINE uint32_t USART_IntGet(USART_TypeDef *usart)
|
|
{
|
|
return usart->IF;
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Get enabled and pending USART interrupt flags.
|
|
* Useful for handling more interrupt sources in the same interrupt handler.
|
|
*
|
|
* @param[in] usart
|
|
* Pointer to USART/UART peripheral register block.
|
|
*
|
|
* @note
|
|
* Interrupt flags are not cleared by the use of this function.
|
|
*
|
|
* @return
|
|
* Pending and enabled USART interrupt sources.
|
|
* The return value is the bitwise AND combination of
|
|
* - the OR combination of enabled interrupt sources in USARTx_IEN_nnn
|
|
* register (USARTx_IEN_nnn) and
|
|
* - the OR combination of valid interrupt flags of the USART module
|
|
* (USARTx_IF_nnn).
|
|
******************************************************************************/
|
|
static __INLINE uint32_t USART_IntGetEnabled(USART_TypeDef *usart)
|
|
{
|
|
uint32_t tmp;
|
|
|
|
/* Store USARTx->IEN in temporary variable in order to define explicit order
|
|
* of volatile accesses. */
|
|
tmp = usart->IEN;
|
|
|
|
/* Bitwise AND of pending and enabled interrupts */
|
|
return usart->IF & tmp;
|
|
}
|
|
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Set one or more pending USART interrupts from SW.
|
|
*
|
|
* @param[in] usart
|
|
* Pointer to USART/UART peripheral register block.
|
|
*
|
|
* @param[in] flags
|
|
* USART/UART interrupt source(s) to set to pending. Use one or more valid
|
|
* interrupt flags for the USART module (USART_IF_nnn) OR'ed together.
|
|
******************************************************************************/
|
|
static __INLINE void USART_IntSet(USART_TypeDef *usart, uint32_t flags)
|
|
{
|
|
usart->IFS = flags;
|
|
}
|
|
|
|
void USART_Reset(USART_TypeDef *usart);
|
|
uint8_t USART_Rx(USART_TypeDef *usart);
|
|
uint16_t USART_RxDouble(USART_TypeDef *usart);
|
|
uint32_t USART_RxDoubleExt(USART_TypeDef *usart);
|
|
uint16_t USART_RxExt(USART_TypeDef *usart);
|
|
void USART_Tx(USART_TypeDef *usart, uint8_t data);
|
|
void USART_TxDouble(USART_TypeDef *usart, uint16_t data);
|
|
void USART_TxDoubleExt(USART_TypeDef *usart, uint32_t data);
|
|
void USART_TxExt(USART_TypeDef *usart, uint16_t data);
|
|
|
|
|
|
/** @} (end addtogroup USART) */
|
|
/** @} (end addtogroup EFM32_Library) */
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* __EFM32_USART_H */
|