476 lines
20 KiB
C
476 lines
20 KiB
C
/**
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******************************************************************************
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* @file stm32f3xx_hal_flash_ex.h
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* @author MCD Application Team
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* @brief Header file of Flash HAL Extended module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F3xx_HAL_FLASH_EX_H
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#define __STM32F3xx_HAL_FLASH_EX_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f3xx_hal_def.h"
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/** @addtogroup STM32F3xx_HAL_Driver
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* @{
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*/
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/** @addtogroup FLASHEx
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* @{
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*/
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/** @addtogroup FLASHEx_Private_Constants
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* @{
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*/
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#define FLASH_SIZE_DATA_REGISTER (0x1FFFF7CCU)
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/**
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* @}
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*/
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/** @addtogroup FLASHEx_Private_Macros
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* @{
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*/
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#define IS_FLASH_TYPEERASE(VALUE) (((VALUE) == FLASH_TYPEERASE_PAGES) || \
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((VALUE) == FLASH_TYPEERASE_MASSERASE))
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#define IS_OPTIONBYTE(VALUE) ((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_DATA))
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#define IS_WRPSTATE(VALUE) (((VALUE) == OB_WRPSTATE_DISABLE) || \
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((VALUE) == OB_WRPSTATE_ENABLE))
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#define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == OB_DATA_ADDRESS_DATA0) || ((ADDRESS) == OB_DATA_ADDRESS_DATA1))
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#define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\
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((LEVEL) == OB_RDP_LEVEL_1))/*||\
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((LEVEL) == OB_RDP_LEVEL_2))*/
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#define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
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#define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST))
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#define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST))
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#define IS_OB_BOOT1(BOOT1) (((BOOT1) == OB_BOOT1_RESET) || ((BOOT1) == OB_BOOT1_SET))
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#define IS_OB_VDDA_ANALOG(ANALOG) (((ANALOG) == OB_VDDA_ANALOG_ON) || ((ANALOG) == OB_VDDA_ANALOG_OFF))
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#define IS_OB_SRAM_PARITY(PARITY) (((PARITY) == OB_SRAM_PARITY_SET) || ((PARITY) == OB_SRAM_PARITY_RESET))
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#if defined(FLASH_OBR_SDADC12_VDD_MONITOR)
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#define IS_OB_SDACD_VDD_MONITOR(VDD_MONITOR) (((VDD_MONITOR) == OB_SDACD_VDD_MONITOR_SET) || \
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((VDD_MONITOR) == OB_SDACD_VDD_MONITOR_RESET))
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#endif /* FLASH_OBR_SDADC12_VDD_MONITOR */
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#define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000U))
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#if defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) \
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|| defined(STM32F373xC) || defined(STM32F378xx)
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#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100U) ? \
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((ADDRESS) <= 0x0803FFFFU) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80U) ? \
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((ADDRESS) <= 0x0801FFFFU) : ((ADDRESS) <= 0x0800FFFFU))))
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#endif /* STM32F302xC || STM32F303xC || STM32F358xx || */
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/* STM32F373xC || STM32F378xx */
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#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
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#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) <= 0x0807FFFFU))
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#endif /* STM32F302xE || STM32F303xE || STM32F398xx */
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#if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) \
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|| defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)
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#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40U) ? \
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((ADDRESS) <= 0x0800FFFFU) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20U) ? \
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((ADDRESS) <= 0x08007FFFU) : ((ADDRESS) <= 0x08003FFFU))))
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#endif /* STM32F301x8 || STM32F302x8 || STM32F318xx || */
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/* STM32F303x8 || STM32F334x8 || STM32F328xx */
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#if defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) \
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|| defined(STM32F373xC) || defined(STM32F378xx)
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#define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1U <= 0x0803FFFFU) : \
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(((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1U <= 0x0801FFFFU) : \
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((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1U <= 0x0800FFFFU)))
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#endif /* STM32F302xC || STM32F303xC || STM32F358xx || */
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/* STM32F373xC || STM32F378xx */
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#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
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#define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1U <= 0x0807FFFFU)
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#endif /* STM32F302xE || STM32F303xE || STM32F398xx */
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#if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) \
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|| defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)
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#define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1U <= 0x0800FFFFU) : \
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(((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1U <= 0x08007FFFU) : \
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((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1U <= 0x08003FFFU)))
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#endif /* STM32F301x8 || STM32F302x8 || STM32F318xx || */
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/* STM32F303x8 || STM32F334x8 || STM32F328xx */
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/**
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* @}
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup FLASHEx_Exported_Types FLASHEx Exported Types
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* @{
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*/
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/**
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* @brief FLASH Erase structure definition
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*/
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typedef struct
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{
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uint32_t TypeErase; /*!< TypeErase: Mass erase or page erase.
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This parameter can be a value of @ref FLASHEx_Type_Erase */
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uint32_t PageAddress; /*!< PageAdress: Initial FLASH page address to erase when mass erase is disabled
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This parameter must be a number between Min_Data = FLASH_BASE and Max_Data = FLASH_BANK1_END */
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uint32_t NbPages; /*!< NbPages: Number of pagess to be erased.
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This parameter must be a value between Min_Data = 1 and Max_Data = (max number of pages - value of initial page)*/
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} FLASH_EraseInitTypeDef;
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/**
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* @brief FLASH Options bytes program structure definition
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*/
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typedef struct
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{
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uint32_t OptionType; /*!< OptionType: Option byte to be configured.
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This parameter can be a value of @ref FLASHEx_OB_Type */
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uint32_t WRPState; /*!< WRPState: Write protection activation or deactivation.
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This parameter can be a value of @ref FLASHEx_OB_WRP_State */
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uint32_t WRPPage; /*!< WRPPage: specifies the page(s) to be write protected
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This parameter can be a value of @ref FLASHEx_OB_Write_Protection */
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uint8_t RDPLevel; /*!< RDPLevel: Set the read protection level..
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This parameter can be a value of @ref FLASHEx_OB_Read_Protection */
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uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte:
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IWDG / STOP / STDBY / BOOT1 / VDDA_ANALOG / SRAM_PARITY / SDADC12_VDD_MONITOR
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This parameter can be a combination of @ref FLASHEx_OB_IWatchdog, @ref FLASHEx_OB_nRST_STOP,
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@ref FLASHEx_OB_nRST_STDBY, @ref FLASHEx_OB_BOOT1, @ref FLASHEx_OB_VDDA_Analog_Monitoring,
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@ref FLASHEx_OB_RAM_Parity_Check_Enable.
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@if STM32F373xC
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And @ref FLASHEx_OB_SDADC12_VDD_MONITOR (only for STM32F373xC & STM32F378xx devices)
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@endif
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@if STM32F378xx
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And @ref FLASHEx_OB_SDADC12_VDD_MONITOR (only for STM32F373xC & STM32F378xx devices)
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@endif
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*/
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uint32_t DATAAddress; /*!< DATAAddress: Address of the option byte DATA to be programmed
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This parameter can be a value of @ref FLASHEx_OB_Data_Address */
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uint8_t DATAData; /*!< DATAData: Data to be stored in the option byte DATA
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This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFFU */
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} FLASH_OBProgramInitTypeDef;
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup FLASHEx_Exported_Constants FLASHEx Exported Constants
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* @{
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*/
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/** @defgroup FLASHEx_Page_Size FLASHEx Page Size
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* @{
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*/
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#define FLASH_PAGE_SIZE 0x800
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/**
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* @}
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*/
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/** @defgroup FLASHEx_Type_Erase FLASH Type Erase
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* @{
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*/
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#define FLASH_TYPEERASE_PAGES (0x00U) /*!<Pages erase only*/
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#define FLASH_TYPEERASE_MASSERASE (0x01U) /*!<Flash mass erase activation*/
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/**
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* @}
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*/
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/** @defgroup FLASHEx_OptionByte_Constants Option Byte Constants
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* @{
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*/
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/** @defgroup FLASHEx_OB_Type Option Bytes Type
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* @{
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*/
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#define OPTIONBYTE_WRP (0x01U) /*!<WRP option byte configuration*/
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#define OPTIONBYTE_RDP (0x02U) /*!<RDP option byte configuration*/
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#define OPTIONBYTE_USER (0x04U) /*!<USER option byte configuration*/
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#define OPTIONBYTE_DATA (0x08U) /*!<DATA option byte configuration*/
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/**
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* @}
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*/
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/** @defgroup FLASHEx_OB_WRP_State Option Byte WRP State
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* @{
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*/
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#define OB_WRPSTATE_DISABLE (0x00U) /*!<Disable the write protection of the desired pages*/
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#define OB_WRPSTATE_ENABLE (0x01U) /*!<Enable the write protection of the desired pagess*/
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/**
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* @}
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*/
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/** @defgroup FLASHEx_OB_Write_Protection FLASHEx OB Write Protection
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* @{
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*/
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#define OB_WRP_PAGES0TO1 (0x00000001U) /* Write protection of page 0 to 1 */
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#define OB_WRP_PAGES2TO3 (0x00000002U) /* Write protection of page 2 to 3 */
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#define OB_WRP_PAGES4TO5 (0x00000004U) /* Write protection of page 4 to 5 */
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#define OB_WRP_PAGES6TO7 (0x00000008U) /* Write protection of page 6 to 7 */
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#define OB_WRP_PAGES8TO9 (0x00000010U) /* Write protection of page 8 to 9 */
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#define OB_WRP_PAGES10TO11 (0x00000020U) /* Write protection of page 10 to 11 */
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#define OB_WRP_PAGES12TO13 (0x00000040U) /* Write protection of page 12 to 13 */
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#define OB_WRP_PAGES14TO15 (0x00000080U) /* Write protection of page 14 to 15 */
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#define OB_WRP_PAGES16TO17 (0x00000100U) /* Write protection of page 16 to 17 */
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#define OB_WRP_PAGES18TO19 (0x00000200U) /* Write protection of page 18 to 19 */
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#define OB_WRP_PAGES20TO21 (0x00000400U) /* Write protection of page 20 to 21 */
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#define OB_WRP_PAGES22TO23 (0x00000800U) /* Write protection of page 22 to 23 */
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#define OB_WRP_PAGES24TO25 (0x00001000U) /* Write protection of page 24 to 25 */
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#define OB_WRP_PAGES26TO27 (0x00002000U) /* Write protection of page 26 to 27 */
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#define OB_WRP_PAGES28TO29 (0x00004000U) /* Write protection of page 28 to 29 */
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#define OB_WRP_PAGES30TO31 (0x00008000U) /* Write protection of page 30 to 31 */
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#if defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) \
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|| defined(STM32F373xC) || defined(STM32F378xx)
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#define OB_WRP_PAGES32TO33 (0x00010000U) /* Write protection of page 32 to 33 */
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#define OB_WRP_PAGES34TO35 (0x00020000U) /* Write protection of page 34 to 35 */
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#define OB_WRP_PAGES36TO37 (0x00040000U) /* Write protection of page 36 to 37 */
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#define OB_WRP_PAGES38TO39 (0x00080000U) /* Write protection of page 38 to 39 */
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#define OB_WRP_PAGES40TO41 (0x00100000U) /* Write protection of page 40 to 41 */
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#define OB_WRP_PAGES42TO43 (0x00200000U) /* Write protection of page 42 to 43 */
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#define OB_WRP_PAGES44TO45 (0x00400000U) /* Write protection of page 44 to 45 */
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#define OB_WRP_PAGES46TO47 (0x00800000U) /* Write protection of page 46 to 47 */
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#define OB_WRP_PAGES48TO49 (0x01000000U) /* Write protection of page 48 to 49 */
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#define OB_WRP_PAGES50TO51 (0x02000000U) /* Write protection of page 50 to 51 */
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#define OB_WRP_PAGES52TO53 (0x04000000U) /* Write protection of page 52 to 53 */
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#define OB_WRP_PAGES54TO55 (0x08000000U) /* Write protection of page 54 to 55 */
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#define OB_WRP_PAGES56TO57 (0x10000000U) /* Write protection of page 56 to 57 */
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#define OB_WRP_PAGES58TO59 (0x20000000U) /* Write protection of page 58 to 59 */
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#define OB_WRP_PAGES60TO61 (0x40000000U) /* Write protection of page 60 to 61 */
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#define OB_WRP_PAGES62TO127 (0x80000000U) /* Write protection of page 62 to 127 */
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#endif /* STM32F302xC || STM32F303xC || STM32F358xx || */
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/* STM32F373xC || STM32F378xx */
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#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
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#define OB_WRP_PAGES32TO33 (0x00010000U) /* Write protection of page 32 to 33 */
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#define OB_WRP_PAGES34TO35 (0x00020000U) /* Write protection of page 34 to 35 */
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#define OB_WRP_PAGES36TO37 (0x00040000U) /* Write protection of page 36 to 37 */
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#define OB_WRP_PAGES38TO39 (0x00080000U) /* Write protection of page 38 to 39 */
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#define OB_WRP_PAGES40TO41 (0x00100000U) /* Write protection of page 40 to 41 */
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#define OB_WRP_PAGES42TO43 (0x00200000U) /* Write protection of page 42 to 43 */
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#define OB_WRP_PAGES44TO45 (0x00400000U) /* Write protection of page 44 to 45 */
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#define OB_WRP_PAGES46TO47 (0x00800000U) /* Write protection of page 46 to 47 */
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#define OB_WRP_PAGES48TO49 (0x01000000U) /* Write protection of page 48 to 49 */
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#define OB_WRP_PAGES50TO51 (0x02000000U) /* Write protection of page 50 to 51 */
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#define OB_WRP_PAGES52TO53 (0x04000000U) /* Write protection of page 52 to 53 */
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#define OB_WRP_PAGES54TO55 (0x08000000U) /* Write protection of page 54 to 55 */
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#define OB_WRP_PAGES56TO57 (0x10000000U) /* Write protection of page 56 to 57 */
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#define OB_WRP_PAGES58TO59 (0x20000000U) /* Write protection of page 58 to 59 */
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#define OB_WRP_PAGES60TO61 (0x40000000U) /* Write protection of page 60 to 61 */
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#define OB_WRP_PAGES62TO255 (0x80000000U) /* Write protection of page 62 to 255 */
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#endif /* STM32F302xE || STM32F303xE || STM32F398xx */
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#define OB_WRP_PAGES0TO15MASK (0x000000FFU)
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#define OB_WRP_PAGES16TO31MASK (0x0000FF00U)
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#if defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) \
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|| defined(STM32F373xC) || defined(STM32F378xx)
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#define OB_WRP_PAGES32TO47MASK (0x00FF0000U)
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#define OB_WRP_PAGES48TO127MASK (0xFF000000U)
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#endif /* STM32F302xC || STM32F303xC || STM32F358xx || */
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/* STM32F373xC || STM32F378xx */
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#if defined(STM32F302xE) || defined(STM32F303xE)
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#define OB_WRP_PAGES32TO47MASK (0x00FF0000U)
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#define OB_WRP_PAGES48TO255MASK (0xFF000000U)
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#endif /* STM32F302xE || STM32F303xE */
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#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) \
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|| defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) \
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|| defined(STM32F373xC) || defined(STM32F378xx)
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#define OB_WRP_ALLPAGES (0xFFFFFFFFU) /*!< Write protection of all pages */
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#endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
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/* STM32F302xC || STM32F303xC || STM32F358xx || */
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/* STM32F373xC || STM32F378xx */
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#if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) \
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|| defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)
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#define OB_WRP_ALLPAGES (0x0000FFFFU) /*!< Write protection of all pages */
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#endif /* STM32F301x8 || STM32F302x8 || STM32F318xx || */
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/* STM32F303x8 || STM32F334x8 || STM32F328xx */
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/**
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* @}
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*/
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/** @defgroup FLASHEx_OB_Read_Protection Option Byte Read Protection
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* @{
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*/
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#define OB_RDP_LEVEL_0 ((uint8_t)0xAAU)
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#define OB_RDP_LEVEL_1 ((uint8_t)0xBBU)
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#define OB_RDP_LEVEL_2 ((uint8_t)0xCCU) /*!< Warning: When enabling read protection level 2
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it's no more possible to go back to level 1 or 0U */
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/**
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* @}
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*/
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/** @defgroup FLASHEx_OB_IWatchdog Option Byte IWatchdog
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* @{
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*/
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#define OB_IWDG_SW ((uint8_t)0x01U) /*!< Software IWDG selected */
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#define OB_IWDG_HW ((uint8_t)0x00U) /*!< Hardware IWDG selected */
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/**
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* @}
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*/
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/** @defgroup FLASHEx_OB_nRST_STOP Option Byte nRST STOP
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* @{
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*/
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#define OB_STOP_NO_RST ((uint8_t)0x02U) /*!< No reset generated when entering in STOP */
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#define OB_STOP_RST ((uint8_t)0x00U) /*!< Reset generated when entering in STOP */
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/**
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* @}
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*/
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/** @defgroup FLASHEx_OB_nRST_STDBY Option Byte nRST STDBY
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* @{
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*/
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#define OB_STDBY_NO_RST ((uint8_t)0x04U) /*!< No reset generated when entering in STANDBY */
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#define OB_STDBY_RST ((uint8_t)0x00U) /*!< Reset generated when entering in STANDBY */
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/**
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* @}
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*/
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/** @defgroup FLASHEx_OB_BOOT1 Option Byte BOOT1
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* @{
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*/
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#define OB_BOOT1_RESET ((uint8_t)0x00U) /*!< BOOT1 Reset */
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#define OB_BOOT1_SET ((uint8_t)0x10U) /*!< BOOT1 Set */
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/**
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* @}
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*/
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/** @defgroup FLASHEx_OB_VDDA_Analog_Monitoring Option Byte VDDA Analog Monitoring
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* @{
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*/
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#define OB_VDDA_ANALOG_ON ((uint8_t)0x20U) /*!< Analog monitoring on VDDA Power source ON */
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#define OB_VDDA_ANALOG_OFF ((uint8_t)0x00U) /*!< Analog monitoring on VDDA Power source OFF */
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/**
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* @}
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*/
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/** @defgroup FLASHEx_OB_RAM_Parity_Check_Enable Option Byte SRAM Parity Check Enable
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* @{
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*/
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#define OB_SRAM_PARITY_SET ((uint8_t)0x00U) /*!< SRAM parity check enable set */
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#define OB_SRAM_PARITY_RESET ((uint8_t)0x40U) /*!< SRAM parity check enable reset */
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/**
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* @}
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*/
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#if defined(FLASH_OBR_SDADC12_VDD_MONITOR)
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/** @defgroup FLASHEx_OB_SDADC12_VDD_MONITOR OB SDADC12 VDD MONITOR
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* @{
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*/
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#define OB_SDACD_VDD_MONITOR_RESET ((uint8_t)0x00U) /*!< SDADC VDD Monitor reset */
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#define OB_SDACD_VDD_MONITOR_SET ((uint8_t)0x80U) /*!< SDADC VDD Monitor set */
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/**
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* @}
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*/
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#endif /* FLASH_OBR_SDADC12_VDD_MONITOR */
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/** @defgroup FLASHEx_OB_Data_Address Option Byte Data Address
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* @{
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*/
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#define OB_DATA_ADDRESS_DATA0 (0x1FFFF804U)
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#define OB_DATA_ADDRESS_DATA1 (0x1FFFF806U)
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/**
|
|
* @}
|
|
*/
|
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/**
|
|
* @}
|
|
*/
|
|
|
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/**
|
|
* @}
|
|
*/
|
|
|
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/* Exported functions --------------------------------------------------------*/
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|
/** @addtogroup FLASHEx_Exported_Functions
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|
* @{
|
|
*/
|
|
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/** @addtogroup FLASHEx_Exported_Functions_Group1
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|
* @{
|
|
*/
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|
/* IO operation functions *****************************************************/
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|
HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError);
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|
HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit);
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|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @addtogroup FLASHEx_Exported_Functions_Group2
|
|
* @{
|
|
*/
|
|
/* Peripheral Control functions ***********************************************/
|
|
HAL_StatusTypeDef HAL_FLASHEx_OBErase(void);
|
|
HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);
|
|
void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
|
|
uint32_t HAL_FLASHEx_OBGetUserData(uint32_t DATAAdress);
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* __STM32F3xx_HAL_FLASH_EX_H */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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