72 lines
3.4 KiB
C
72 lines
3.4 KiB
C
/************************************************************************************//**
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* \file Demo\ARMCM3_STM32F1_Olimex_STM32H103_GCC\Boot\usb_conf.h
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* \brief Bootloader USB device configuration header file.
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* \ingroup Boot_ARMCM3_STM32F1_Olimex_STM32H103_GCC
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* \internal
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*----------------------------------------------------------------------------------------
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* C O P Y R I G H T
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*----------------------------------------------------------------------------------------
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* Copyright (c) 2012 by Feaser http://www.feaser.com All rights reserved
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*
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*----------------------------------------------------------------------------------------
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* L I C E N S E
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*----------------------------------------------------------------------------------------
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* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as published by the Free
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* Software Foundation, either version 3 of the License, or (at your option) any later
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* version.
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*
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* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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* PURPOSE. See the GNU General Public License for more details.
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*
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* You have received a copy of the GNU General Public License along with OpenBLT. It
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* should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy.
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*
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* \endinternal
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****************************************************************************************/
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#ifndef USB_CONF_H
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#define USB_CONF_H
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/****************************************************************************************
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* Macro definitions
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****************************************************************************************/
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/** \brief Total number of used endpoints. */
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#define EP_NUM (3)
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/** \brief Buffer table base address. */
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#define BTABLE_ADDRESS (0x00)
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/** \brief EP0 rx buffer base address. */
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#define ENDP0_RXADDR (0x40)
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/** \brief EP0 tx buffer base address. */
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#define ENDP0_TXADDR (0x80)
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/** \brief EP1 rx buffer base address */
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#define ENDP1_RXADDR (0xC0)
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/** \brief EP1 tx buffer base address */
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#define ENDP1_TXADDR (0x100)
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/** \brief Mask defining which events has to be handled by the device application software. */
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#define IMR_MSK (CNTR_CTRM | CNTR_SOFM | CNTR_RESETM )
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/** \brief Enable start of frame callback. */
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#define SOF_CALLBACK
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/* CTR service routines associated to defined endpoints. keep EP1_IN and EP1_OUT
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* callback uncommented to enable them. They are implemented in usb_endp.c
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*/
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/*#define EP1_IN_Callback NOP_Process*/
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#define EP2_IN_Callback NOP_Process
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#define EP3_IN_Callback NOP_Process
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#define EP4_IN_Callback NOP_Process
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#define EP5_IN_Callback NOP_Process
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#define EP6_IN_Callback NOP_Process
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#define EP7_IN_Callback NOP_Process
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/*#define EP1_OUT_Callback NOP_Process*/
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#define EP2_OUT_Callback NOP_Process
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#define EP3_OUT_Callback NOP_Process
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#define EP4_OUT_Callback NOP_Process
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#define EP5_OUT_Callback NOP_Process
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#define EP6_OUT_Callback NOP_Process
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#define EP7_OUT_Callback NOP_Process
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#endif /* USB_CONF_H */
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/*********************************** end of usb_conf.h *********************************/
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