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Frank Voorburg c6125bed87 Refs #53. 
- Removed comment regarding TCP/IP connect retry configuration in Microboot becase this will be a default feature in the future.

git-svn-id: https://svn.code.sf.net/p/openblt/code/trunk@152 5dc33758-31d5-4daf-9ae8-b24bf3d40d73
 		2016-10-12 09:07:02 +00:00
..
ARM7_LPC2000_Olimex_LPC_L2294_Crossworks Refs #133. Corrected comment related to BOOT_CPU_BYTE_ORDER_MOTOROLA because the Endian modes were mixed up. 2016-10-04 19:36:57 +00:00
ARM7_LPC2000_Olimex_LPC_L2294_GCC Refs #133. Corrected comment related to BOOT_CPU_BYTE_ORDER_MOTOROLA because the Endian modes were mixed up. 2016-10-04 19:36:57 +00:00
ARMCM0_STM32_Discovery_STM32F051_GCC Refs #133. Corrected comment related to BOOT_CPU_BYTE_ORDER_MOTOROLA because the Endian modes were mixed up. 2016-10-04 19:36:57 +00:00
ARMCM0_STM32_Discovery_STM32F051_IAR Refs #133. Corrected comment related to BOOT_CPU_BYTE_ORDER_MOTOROLA because the Endian modes were mixed up. 2016-10-04 19:36:57 +00:00
ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks Refs #133. Corrected comment related to BOOT_CPU_BYTE_ORDER_MOTOROLA because the Endian modes were mixed up. 2016-10-04 19:36:57 +00:00
ARMCM3_EFM32_Olimex_EM32G880F128STK_GCC Refs #133. Corrected comment related to BOOT_CPU_BYTE_ORDER_MOTOROLA because the Endian modes were mixed up. 2016-10-04 19:36:57 +00:00
ARMCM3_EFM32_Olimex_EM32G880F128STK_IAR Refs #133. Corrected comment related to BOOT_CPU_BYTE_ORDER_MOTOROLA because the Endian modes were mixed up. 2016-10-04 19:36:57 +00:00
ARMCM3_LM3S_EK_LM3S6965_Crossworks Refs #53. 2016-10-12 09:07:02 +00:00
ARMCM3_LM3S_EK_LM3S6965_GCC Refs #53. 2016-10-12 09:07:02 +00:00
ARMCM3_LM3S_EK_LM3S6965_IAR Refs #53. 2016-10-12 09:07:02 +00:00
ARMCM3_LM3S_EK_LM3S8962_Crossworks Refs #133. Corrected comment related to BOOT_CPU_BYTE_ORDER_MOTOROLA because the Endian modes were mixed up. 2016-10-04 19:36:57 +00:00
ARMCM3_LM3S_EK_LM3S8962_GCC Refs #133. Corrected comment related to BOOT_CPU_BYTE_ORDER_MOTOROLA because the Endian modes were mixed up. 2016-10-04 19:36:57 +00:00
ARMCM3_LM3S_EK_LM3S8962_IAR Refs #133. Corrected comment related to BOOT_CPU_BYTE_ORDER_MOTOROLA because the Endian modes were mixed up. 2016-10-04 19:36:57 +00:00
ARMCM3_STM32F2_Olimex_STM32P207_GCC Refs #133. Corrected comment related to BOOT_CPU_BYTE_ORDER_MOTOROLA because the Endian modes were mixed up. 2016-10-04 19:36:57 +00:00
ARMCM3_STM32_Nucleo_STM32F103RB_GNU_ARM_GCC Refs #133. Corrected comment related to BOOT_CPU_BYTE_ORDER_MOTOROLA because the Endian modes were mixed up. 2016-10-04 19:36:57 +00:00
ARMCM3_STM32_Olimex_STM32H103_Crossworks Refs #133. Corrected comment related to BOOT_CPU_BYTE_ORDER_MOTOROLA because the Endian modes were mixed up. 2016-10-04 19:36:57 +00:00
ARMCM3_STM32_Olimex_STM32H103_GCC Refs #133. Corrected comment related to BOOT_CPU_BYTE_ORDER_MOTOROLA because the Endian modes were mixed up. 2016-10-04 19:36:57 +00:00
ARMCM3_STM32_Olimex_STM32H103_IAR Refs #133. Corrected comment related to BOOT_CPU_BYTE_ORDER_MOTOROLA because the Endian modes were mixed up. 2016-10-04 19:36:57 +00:00
ARMCM3_STM32_Olimex_STM32P103_Crossworks Refs #133. Corrected comment related to BOOT_CPU_BYTE_ORDER_MOTOROLA because the Endian modes were mixed up. 2016-10-04 19:36:57 +00:00
ARMCM3_STM32_Olimex_STM32P103_GCC Refs #133. Corrected comment related to BOOT_CPU_BYTE_ORDER_MOTOROLA because the Endian modes were mixed up. 2016-10-04 19:36:57 +00:00
ARMCM3_STM32_Olimex_STM32P103_IAR Refs #133. Corrected comment related to BOOT_CPU_BYTE_ORDER_MOTOROLA because the Endian modes were mixed up. 2016-10-04 19:36:57 +00:00
ARMCM3_STM32_Olimex_STM32P103_Keil Refs #133. Corrected comment related to BOOT_CPU_BYTE_ORDER_MOTOROLA because the Endian modes were mixed up. 2016-10-04 19:36:57 +00:00
ARMCM4_STM32_Olimex_STM32E407_Crossworks Refs #53. 2016-10-12 09:07:02 +00:00
ARMCM4_STM32_Olimex_STM32E407_GCC Refs #53. 2016-10-12 09:07:02 +00:00
ARMCM4_STM32_Olimex_STM32E407_IAR Refs #53. 2016-10-12 09:07:02 +00:00
ARMCM4_TM4C_DK_TM4C123G_IAR Refs #133. Corrected comment related to BOOT_CPU_BYTE_ORDER_MOTOROLA because the Endian modes were mixed up. 2016-10-04 19:36:57 +00:00
HCS12_Evbplus_Dragon12p_CodeWarrior Refs #133. Corrected comment related to BOOT_CPU_BYTE_ORDER_MOTOROLA because the Endian modes were mixed up. 2016-10-04 19:36:57 +00:00