158 lines
10 KiB
C
158 lines
10 KiB
C
/************************************************************************************//**
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* \file Demo\HCS12_Evbplus_Dragon12p_CodeWarrior\Prog\vectors.c
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* \brief Demo program interrupt vectors source file.
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* \ingroup Prog_HCS12_Evbplus_Dragon12p_CodeWarrior
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* \internal
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*----------------------------------------------------------------------------------------
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* C O P Y R I G H T
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*----------------------------------------------------------------------------------------
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* Copyright (c) 2013 by Feaser http://www.feaser.com All rights reserved
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*
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*----------------------------------------------------------------------------------------
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* L I C E N S E
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*----------------------------------------------------------------------------------------
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* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as published by the Free
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* Software Foundation, either version 3 of the License, or (at your option) any later
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* version.
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*
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* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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* PURPOSE. See the GNU General Public License for more details.
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*
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* You have received a copy of the GNU General Public License along with OpenBLT. It
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* should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy.
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*
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* \endinternal
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****************************************************************************************/
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/****************************************************************************************
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* Include files
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****************************************************************************************/
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#include "header.h" /* generic header */
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/****************************************************************************************
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* External functions
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****************************************************************************************/
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extern void near _Startup(void);
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/****************************************************************************************
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* Type definitions
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****************************************************************************************/
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/** \brief Type for vector table entries. */
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typedef void (*near tIsrFunc)(void);
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/****************************************************************************************
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** NAME: UnusedISR
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** PARAMETER: none
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** RETURN VALUE: none
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** DESCRIPTION: Catch-all for unused interrrupt service routines.
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**
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****************************************************************************************/
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__interrupt void UnusedISR(void)
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{
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/* unexpected interrupt occured, so halt the system */
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while (1) { ; }
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} /*** end of UnusedISR ***/
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/****************************************************************************************
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* I N T E R R U P T V E C T O R T A B L E
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****************************************************************************************/
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/** \brief Interrupt vector table.
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* \details Normally, these are at 0xff80-0xffff, but the bootloader occupies 0xe800 -
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* 0xffff. The bootloader expects the vector table to be at the end of user
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* program flash, which is 0xe780 - 0xe7ff. 2 more bytes are reserved for the
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* checksum that is programmed and verified by the bootloader, so the start
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* address ends up being 0xe77e. Note that this needs to be updated when the
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* size of the bootloader changes, as defined in the flashLayout[] table in
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* flash.c of the bootloader.
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*/
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#if (BDM_DEBUGGING_ENABLED == 1)
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/* for programming and debugging with a BDM device, the vector table should be at
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* its default location.
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*/
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const tIsrFunc _vectab[] @0xff80 =
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#else
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const tIsrFunc _vectab[] @0xe77e =
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#endif
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{
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#if (BDM_DEBUGGING_ENABLED != 1)
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/* for programming and debugging with a BDM device, the checksum should not be
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* programmed because it would be in a reserved flash memory space.
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*/
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(tIsrFunc)0xaa55, /* Reserved for OpenBLT checksum */
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#endif
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(tIsrFunc)UnusedISR, /* Reserved 0xFF80 */
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(tIsrFunc)UnusedISR, /* Reserved 0xFF82 */
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(tIsrFunc)UnusedISR, /* Reserved 0xFF84 */
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(tIsrFunc)UnusedISR, /* Reserved 0xFF86 */
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(tIsrFunc)UnusedISR, /* Reserved 0xFF88 */
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(tIsrFunc)UnusedISR, /* Reserved 0xFF8A */
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(tIsrFunc)UnusedISR, /* PWM Emergency Shutdown 0xFF8C */
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(tIsrFunc)UnusedISR, /* PortP Interrupt 0xFF8E */
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(tIsrFunc)UnusedISR, /* MSCAN4 Transmit 0xFF90 */
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(tIsrFunc)UnusedISR, /* MSCAN4 Receive 0xFF92 */
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(tIsrFunc)UnusedISR, /* MSCAN4 Errors 0xFF94 */
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(tIsrFunc)UnusedISR, /* MSCAN4 WakeUp 0xFF96 */
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(tIsrFunc)UnusedISR, /* MSCAN3 Transmit 0xFF98 */
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(tIsrFunc)UnusedISR, /* MSCAN3 Receive 0xFF9A */
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(tIsrFunc)UnusedISR, /* MSCAN3 Errors 0xFF9C */
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(tIsrFunc)UnusedISR, /* MSCAN3 WakeUp 0xFF9E */
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(tIsrFunc)UnusedISR, /* MSCAN2 Transmit 0xFFA0 */
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(tIsrFunc)UnusedISR, /* MSCAN2 Receive 0xFFA2 */
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(tIsrFunc)UnusedISR, /* MSCAN2 Errors 0xFFA4 */
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(tIsrFunc)UnusedISR, /* MSCAN2 WakeUp 0xFFA6 */
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(tIsrFunc)UnusedISR, /* MSCAN1 Transmit 0xFFA8 */
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(tIsrFunc)UnusedISR, /* MSCAN1 Receive 0xFFAA */
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(tIsrFunc)UnusedISR, /* MSCAN1 Errors 0xFFAC */
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(tIsrFunc)UnusedISR, /* MSCAN1 WakeUp 0xFFAE */
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(tIsrFunc)UnusedISR, /* MSCAN0 Transmit 0xFFB0 */
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(tIsrFunc)UnusedISR, /* MSCAN0 Receive 0xFFB2 */
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(tIsrFunc)UnusedISR, /* MSCAN0 Errors 0xFFB4 */
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(tIsrFunc)UnusedISR, /* MSCAN0 WakeUp 0xFFB6 */
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(tIsrFunc)UnusedISR, /* Flash 0xFFB8 */
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(tIsrFunc)UnusedISR, /* Eeprom WakeUp 0xFFBA */
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(tIsrFunc)UnusedISR, /* SPI2 0xFFBC */
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(tIsrFunc)UnusedISR, /* SPI1 0xFFBE */
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(tIsrFunc)UnusedISR, /* IIC Bus 0xFFC0 */
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(tIsrFunc)UnusedISR, /* DLC 0xFFC2 */
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(tIsrFunc)UnusedISR, /* SCME 0xFFC4 */
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(tIsrFunc)UnusedISR, /* CRG Lock 0xFFC6 */
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(tIsrFunc)UnusedISR, /* Pulse AccB Overflow 0xFFC8 */
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(tIsrFunc)UnusedISR, /* Mod Down Cnt Underflow 0xFFCA */
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(tIsrFunc)UnusedISR, /* PortH Interrupt 0xFFCC */
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(tIsrFunc)UnusedISR, /* PortJ Interrupt 0xFFCE */
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(tIsrFunc)UnusedISR, /* ATD1 0xFFD0 */
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(tIsrFunc)UnusedISR, /* ATD0 0xFFD2 */
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(tIsrFunc)UnusedISR, /* SCI1 0xFFD4 */
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(tIsrFunc)UnusedISR, /* SCI0 0xFFD6 */
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(tIsrFunc)UnusedISR, /* SPI0 0xFFD8 */
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(tIsrFunc)UnusedISR, /* Pulse AccA Input Edge 0xFFDA */
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(tIsrFunc)UnusedISR, /* Pulse AccA Overflow 0xFFDC */
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(tIsrFunc)UnusedISR, /* Timer Overflow 0xFFDE */
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(tIsrFunc)UnusedISR, /* Timer 7 0xFFE0 */
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(tIsrFunc)UnusedISR, /* Timer 6 0xFFE2 */
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(tIsrFunc)UnusedISR, /* Timer 5 0xFFE4 */
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(tIsrFunc)UnusedISR, /* Timer 4 0xFFE6 */
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(tIsrFunc)UnusedISR, /* Timer 3 0xFFE8 */
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(tIsrFunc)UnusedISR, /* Timer 2 0xFFEA */
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(tIsrFunc)UnusedISR, /* Timer 1 0xFFEC */
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(tIsrFunc)TimerISRHandler, /* Timer 0 0xFFEE */
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(tIsrFunc)UnusedISR, /* RTI 0xFFF0 */
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(tIsrFunc)UnusedISR, /* IRQ 0xFFF2 */
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(tIsrFunc)UnusedISR, /* XIRQ 0xFFF4 */
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(tIsrFunc)UnusedISR, /* SWI 0xFFF6 */
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(tIsrFunc)UnusedISR, /* Unimpl Instr Trap 0xFFF8 */
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(tIsrFunc)UnusedISR, /* COP Failure Reset 0xFFFA */
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(tIsrFunc)UnusedISR, /* COP Clk Mon Fail 0xFFFC */
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(tIsrFunc)_Startup /* Reset(N/A) 0xFFFE */
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};
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#pragma CODE_SEG DEFAULT
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/************************************ end of vectors.c *********************************/
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