694 lines
33 KiB
ArmAsm
694 lines
33 KiB
ArmAsm
; ---------------------------------------------------------------------------------------
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; @file: startup_S32K144.s
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; @purpose: IAR Startup File
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; S32K144
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; @version: 2.0
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; @date: 2017-1-10
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; @build: b170107
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; ---------------------------------------------------------------------------------------
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;
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; Copyright (c) 1997 - 2016 , Freescale Semiconductor, Inc.
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; Copyright 2016-2017 NXP
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; All rights reserved.
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;
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; THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
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; IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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; OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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; IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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; INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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; (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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; HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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; STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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; IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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; THE POSSIBILITY OF SUCH DAMAGE.
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;
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; The modules in this file are included in the libraries, and may be replaced
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; by any user-defined modules that define the PUBLIC symbol _program_start or
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; a user defined start symbol.
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; To override the cstartup defined in the library, simply add your modified
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; version to the workbench project.
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;
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; The vector table is normally located at address 0.
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; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
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; The name "__vector_table" has special meaning for C-SPY:
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; it is where the SP start value is found, and the NVIC vector
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; table register (VTOR) is initialized to this address if != 0.
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;
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; Cortex-M version
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;
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MODULE ?cstartup
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;; Forward declaration of sections.
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SECTION CSTACK:DATA:NOROOT(3)
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SECTION .intvec:CODE:ROOT(2)
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EXTERN main
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EXTERN SystemInit
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EXTERN init_data_bss
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PUBLIC __vector_table
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PUBLIC __vector_table_0x1c
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PUBLIC __Vectors
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PUBLIC __Vectors_End
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PUBLIC __Vectors_Size
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DATA
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__vector_table
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DCD sfe(CSTACK)
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DCD Reset_Handler
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DCD NMI_Handler ;NMI Handler
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DCD HardFault_Handler ;Hard Fault Handler
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DCD MemManage_Handler ;MPU Fault Handler
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DCD BusFault_Handler ;Bus Fault Handler
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DCD UsageFault_Handler ;Usage Fault Handler
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__vector_table_0x1c
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DCD 0 ;Reserved
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DCD 0 ;Reserved
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DCD 0 ;Reserved
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DCD 0 ;Reserved
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DCD SVC_Handler ;SVCall Handler
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DCD DebugMon_Handler ;Debug Monitor Handler
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DCD 0 ;Reserved
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DCD PendSV_Handler ;PendSV Handler
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DCD SysTick_Handler ;SysTick Handler
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;External Interrupts
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DCD DMA0_IRQHandler ;DMA channel 0 transfer complete
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DCD DMA1_IRQHandler ;DMA channel 1 transfer complete
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DCD DMA2_IRQHandler ;DMA channel 2 transfer complete
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DCD DMA3_IRQHandler ;DMA channel 3 transfer complete
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DCD DMA4_IRQHandler ;DMA channel 4 transfer complete
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DCD DMA5_IRQHandler ;DMA channel 5 transfer complete
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DCD DMA6_IRQHandler ;DMA channel 6 transfer complete
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DCD DMA7_IRQHandler ;DMA channel 7 transfer complete
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DCD DMA8_IRQHandler ;DMA channel 8 transfer complete
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DCD DMA9_IRQHandler ;DMA channel 9 transfer complete
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DCD DMA10_IRQHandler ;DMA channel 10 transfer complete
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DCD DMA11_IRQHandler ;DMA channel 11 transfer complete
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DCD DMA12_IRQHandler ;DMA channel 12 transfer complete
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DCD DMA13_IRQHandler ;DMA channel 13 transfer complete
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DCD DMA14_IRQHandler ;DMA channel 14 transfer complete
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DCD DMA15_IRQHandler ;DMA channel 15 transfer complete
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DCD DMA_Error_IRQHandler ;DMA error interrupt channels 0-15
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DCD MCM_IRQHandler ;FPU sources
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DCD FTFC_IRQHandler ;FTFC Command complete
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DCD Read_Collision_IRQHandler ;FTFC Read collision
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DCD LVD_LVW_IRQHandler ;PMC Low voltage detect interrupt
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DCD FTFC_Fault_IRQHandler ;FTFC Double bit fault detect
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DCD WDOG_EWM_IRQHandler ;Single interrupt vector for WDOG and EWM
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DCD RCM_IRQHandler ;RCM Asynchronous Interrupt
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DCD LPI2C0_Master_IRQHandler ;LPI2C0 Master Interrupt
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DCD LPI2C0_Slave_IRQHandler ;LPI2C0 Slave Interrupt
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DCD LPSPI0_IRQHandler ;LPSPI0 Interrupt
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DCD LPSPI1_IRQHandler ;LPSPI1 Interrupt
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DCD LPSPI2_IRQHandler ;LPSPI2 Interrupt
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DCD Reserved45_IRQHandler ;Reserved Interrupt 45
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DCD Reserved46_IRQHandler ;Reserved Interrupt 46
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DCD LPUART0_RxTx_IRQHandler ;LPUART0 Transmit / Receive Interrupt
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DCD Reserved48_IRQHandler ;Reserved Interrupt 48
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DCD LPUART1_RxTx_IRQHandler ;LPUART1 Transmit / Receive Interrupt
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DCD Reserved50_IRQHandler ;Reserved Interrupt 50
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DCD LPUART2_RxTx_IRQHandler ;LPUART2 Transmit / Receive Interrupt
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DCD Reserved52_IRQHandler ;Reserved Interrupt 52
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DCD Reserved53_IRQHandler ;Reserved Interrupt 53
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DCD Reserved54_IRQHandler ;Reserved Interrupt 54
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DCD ADC0_IRQHandler ;ADC0 interrupt request.
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DCD ADC1_IRQHandler ;ADC1 interrupt request.
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DCD CMP0_IRQHandler ;CMP0 interrupt request
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DCD Reserved58_IRQHandler ;Reserved Interrupt 58
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DCD Reserved59_IRQHandler ;Reserved Interrupt 59
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DCD ERM_single_fault_IRQHandler ;ERM single bit error correction
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DCD ERM_double_fault_IRQHandler ;ERM double bit error non-correctable
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DCD RTC_IRQHandler ;RTC alarm interrupt
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DCD RTC_Seconds_IRQHandler ;RTC seconds interrupt
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DCD LPIT0_Ch0_IRQHandler ;LPIT0 channel 0 overflow interrupt
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DCD LPIT0_Ch1_IRQHandler ;LPIT0 channel 1 overflow interrupt
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DCD LPIT0_Ch2_IRQHandler ;LPIT0 channel 2 overflow interrupt
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DCD LPIT0_Ch3_IRQHandler ;LPIT0 channel 3 overflow interrupt
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DCD PDB0_IRQHandler ;PDB0 interrupt
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DCD Reserved69_IRQHandler ;Reserved Interrupt 69
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DCD Reserved70_IRQHandler ;Reserved Interrupt 70
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DCD Reserved71_IRQHandler ;Reserved Interrupt 71
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DCD Reserved72_IRQHandler ;Reserved Interrupt 72
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DCD SCG_IRQHandler ;SCG bus interrupt request
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DCD LPTMR0_IRQHandler ;LPTIMER interrupt request
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DCD PORTA_IRQHandler ;Port A pin detect interrupt
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DCD PORTB_IRQHandler ;Port B pin detect interrupt
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DCD PORTC_IRQHandler ;Port C pin detect interrupt
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DCD PORTD_IRQHandler ;Port D pin detect interrupt
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DCD PORTE_IRQHandler ;Port E pin detect interrupt
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DCD SWI_IRQHandler ;Software interrupt
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DCD Reserved81_IRQHandler ;Reserved Interrupt 81
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DCD Reserved82_IRQHandler ;Reserved Interrupt 82
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DCD Reserved83_IRQHandler ;Reserved Interrupt 83
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DCD PDB1_IRQHandler ;PDB1 interrupt
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DCD FLEXIO_IRQHandler ;FlexIO Interrupt
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DCD Reserved86_IRQHandler ;Reserved Interrupt 86
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DCD Reserved87_IRQHandler ;Reserved Interrupt 87
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DCD Reserved88_IRQHandler ;Reserved Interrupt 88
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DCD Reserved89_IRQHandler ;Reserved Interrupt 89
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DCD Reserved90_IRQHandler ;Reserved Interrupt 90
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DCD Reserved91_IRQHandler ;Reserved Interrupt 91
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DCD Reserved92_IRQHandler ;Reserved Interrupt 92
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DCD Reserved93_IRQHandler ;Reserved Interrupt 93
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DCD CAN0_ORed_IRQHandler ;CAN0 OR'ed [Bus Off OR Transmit Warning OR Receive Warning]
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DCD CAN0_Error_IRQHandler ;CAN0 Interrupt indicating that errors were detected on the CAN bus
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DCD CAN0_Wake_Up_IRQHandler ;CAN0 Interrupt asserted when Pretended Networking operation is enabled, and a valid message matches the selected filter criteria during Low Power mode
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DCD CAN0_ORed_0_15_MB_IRQHandler ;CAN0 OR'ed Message buffer (0-15)
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DCD CAN0_ORed_16_31_MB_IRQHandler ;CAN0 OR'ed Message buffer (16-31)
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DCD Reserved99_IRQHandler ;Reserved Interrupt 99
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DCD Reserved100_IRQHandler ;Reserved Interrupt 100
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DCD CAN1_ORed_IRQHandler ;CAN1 OR'ed [Bus Off OR Transmit Warning OR Receive Warning]
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DCD CAN1_Error_IRQHandler ;CAN1 Interrupt indicating that errors were detected on the CAN bus
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DCD Reserved103_IRQHandler ;Reserved Interrupt 103
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DCD CAN1_ORed_0_15_MB_IRQHandler ;CAN1 OR'ed Interrupt for Message buffer (0-15)
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DCD Reserved105_IRQHandler ;Reserved Interrupt 105
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DCD Reserved106_IRQHandler ;Reserved Interrupt 106
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DCD Reserved107_IRQHandler ;Reserved Interrupt 107
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DCD CAN2_ORed_IRQHandler ;CAN2 OR'ed [Bus Off OR Transmit Warning OR Receive Warning]
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DCD CAN2_Error_IRQHandler ;CAN2 Interrupt indicating that errors were detected on the CAN bus
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DCD Reserved110_IRQHandler ;Reserved Interrupt 110
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DCD CAN2_ORed_0_15_MB_IRQHandler ;CAN2 OR'ed Message buffer (0-15)
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DCD Reserved112_IRQHandler ;Reserved Interrupt 112
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DCD Reserved113_IRQHandler ;Reserved Interrupt 113
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DCD Reserved114_IRQHandler ;Reserved Interrupt 114
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DCD FTM0_Ch0_Ch1_IRQHandler ;FTM0 Channel 0 and 1 interrupt
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DCD FTM0_Ch2_Ch3_IRQHandler ;FTM0 Channel 2 and 3 interrupt
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DCD FTM0_Ch4_Ch5_IRQHandler ;FTM0 Channel 4 and 5 interrupt
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DCD FTM0_Ch6_Ch7_IRQHandler ;FTM0 Channel 6 and 7 interrupt
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DCD FTM0_Fault_IRQHandler ;FTM0 Fault interrupt
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DCD FTM0_Ovf_Reload_IRQHandler ;FTM0 Counter overflow and Reload interrupt
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DCD FTM1_Ch0_Ch1_IRQHandler ;FTM1 Channel 0 and 1 interrupt
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DCD FTM1_Ch2_Ch3_IRQHandler ;FTM1 Channel 2 and 3 interrupt
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DCD FTM1_Ch4_Ch5_IRQHandler ;FTM1 Channel 4 and 5 interrupt
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DCD FTM1_Ch6_Ch7_IRQHandler ;FTM1 Channel 6 and 7 interrupt
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DCD FTM1_Fault_IRQHandler ;FTM1 Fault interrupt
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DCD FTM1_Ovf_Reload_IRQHandler ;FTM1 Counter overflow and Reload interrupt
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DCD FTM2_Ch0_Ch1_IRQHandler ;FTM2 Channel 0 and 1 interrupt
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DCD FTM2_Ch2_Ch3_IRQHandler ;FTM2 Channel 2 and 3 interrupt
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DCD FTM2_Ch4_Ch5_IRQHandler ;FTM2 Channel 4 and 5 interrupt
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DCD FTM2_Ch6_Ch7_IRQHandler ;FTM2 Channel 6 and 7 interrupt
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DCD FTM2_Fault_IRQHandler ;FTM2 Fault interrupt
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DCD FTM2_Ovf_Reload_IRQHandler ;FTM2 Counter overflow and Reload interrupt
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DCD FTM3_Ch0_Ch1_IRQHandler ;FTM3 Channel 0 and 1 interrupt
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DCD FTM3_Ch2_Ch3_IRQHandler ;FTM3 Channel 2 and 3 interrupt
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DCD FTM3_Ch4_Ch5_IRQHandler ;FTM3 Channel 4 and 5 interrupt
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DCD FTM3_Ch6_Ch7_IRQHandler ;FTM3 Channel 6 and 7 interrupt
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DCD FTM3_Fault_IRQHandler ;FTM3 Fault interrupt
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DCD FTM3_Ovf_Reload_IRQHandler ;FTM3 Counter overflow and Reload interrupt
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DCD DefaultISR ;139
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DCD DefaultISR ;140
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DCD DefaultISR ;141
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DCD DefaultISR ;142
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DCD DefaultISR ;143
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DCD DefaultISR ;144
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DCD DefaultISR ;145
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DCD DefaultISR ;146
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DCD DefaultISR ;147
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DCD DefaultISR ;148
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DCD DefaultISR ;149
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DCD DefaultISR ;150
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DCD DefaultISR ;151
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DCD DefaultISR ;152
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DCD DefaultISR ;153
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DCD DefaultISR ;154
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DCD DefaultISR ;155
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DCD DefaultISR ;156
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DCD DefaultISR ;157
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DCD DefaultISR ;158
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DCD DefaultISR ;159
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DCD DefaultISR ;160
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DCD DefaultISR ;161
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DCD DefaultISR ;162
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DCD DefaultISR ;163
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DCD DefaultISR ;164
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DCD DefaultISR ;165
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DCD DefaultISR ;166
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DCD DefaultISR ;167
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DCD DefaultISR ;168
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DCD DefaultISR ;169
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DCD DefaultISR ;170
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DCD DefaultISR ;171
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DCD DefaultISR ;172
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DCD DefaultISR ;173
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DCD DefaultISR ;174
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DCD DefaultISR ;175
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DCD DefaultISR ;176
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DCD DefaultISR ;177
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DCD DefaultISR ;178
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DCD DefaultISR ;179
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DCD DefaultISR ;180
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DCD DefaultISR ;181
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DCD DefaultISR ;182
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DCD DefaultISR ;183
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DCD DefaultISR ;184
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DCD DefaultISR ;185
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DCD DefaultISR ;186
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DCD DefaultISR ;187
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DCD DefaultISR ;188
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DCD DefaultISR ;189
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DCD DefaultISR ;190
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DCD DefaultISR ;191
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DCD DefaultISR ;192
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DCD DefaultISR ;193
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DCD DefaultISR ;194
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DCD DefaultISR ;195
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DCD DefaultISR ;196
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DCD DefaultISR ;197
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DCD DefaultISR ;198
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DCD DefaultISR ;199
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DCD DefaultISR ;200
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DCD DefaultISR ;201
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DCD DefaultISR ;202
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DCD DefaultISR ;203
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DCD DefaultISR ;204
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DCD DefaultISR ;205
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DCD DefaultISR ;206
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DCD DefaultISR ;207
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DCD DefaultISR ;208
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DCD DefaultISR ;209
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DCD DefaultISR ;210
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DCD DefaultISR ;211
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DCD DefaultISR ;212
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DCD DefaultISR ;213
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DCD DefaultISR ;214
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DCD DefaultISR ;215
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DCD DefaultISR ;216
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DCD DefaultISR ;217
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DCD DefaultISR ;218
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DCD DefaultISR ;219
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DCD DefaultISR ;220
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DCD DefaultISR ;221
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DCD DefaultISR ;222
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DCD DefaultISR ;223
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DCD DefaultISR ;224
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DCD DefaultISR ;225
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DCD DefaultISR ;226
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DCD DefaultISR ;227
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DCD DefaultISR ;228
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DCD DefaultISR ;229
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DCD DefaultISR ;230
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DCD DefaultISR ;231
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DCD DefaultISR ;232
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DCD DefaultISR ;233
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DCD DefaultISR ;234
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DCD DefaultISR ;235
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DCD DefaultISR ;236
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DCD DefaultISR ;237
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DCD DefaultISR ;238
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DCD DefaultISR ;239
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DCD DefaultISR ;240
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DCD DefaultISR ;241
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DCD DefaultISR ;242
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DCD DefaultISR ;243
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DCD DefaultISR ;244
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DCD DefaultISR ;245
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DCD DefaultISR ;246
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DCD DefaultISR ;247
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DCD DefaultISR ;248
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DCD DefaultISR ;249
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DCD DefaultISR ;250
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DCD DefaultISR ;251
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DCD DefaultISR ;252
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DCD DefaultISR ;253
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DCD 0x55AA11EE ;254 Reserved for OpenBLT checksum
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DCD 0xFFFFFFFF ; Reserved for user TRIM value
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__Vectors_End
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SECTION FlashConfig:CODE
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__FlashConfig
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DCD 0xFFFFFFFF ; 8 bytes backdoor comparison key
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DCD 0xFFFFFFFF ;
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DCD 0xFFFFFFFF ; 4 bytes program flash protection bytes
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DCD 0xFFFF7FFE ; FDPROT:FEPROT:FOPT:FSEC(0xFE = unsecured)
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__FlashConfig_End
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__Vectors EQU __vector_table
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__Vectors_Size EQU __Vectors_End - __Vectors
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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;; Default interrupt handlers.
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;;
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THUMB
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PUBWEAK Reset_Handler
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SECTION .text:CODE:REORDER:NOROOT(2)
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Reset_Handler
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CPSID I ; Mask interrupts
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;; Init the rest of the registers
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LDR R1,=0
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LDR R2,=0
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LDR R3,=0
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LDR R4,=0
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LDR R5,=0
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LDR R6,=0
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LDR R7,=0
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MOV R8,R7
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MOV R9,R7
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MOV R10,R7
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MOV R11,R7
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MOV R12,R7
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#ifdef START_FROM_FLASH
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IMPORT __RAM_START, __RAM_END
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;; INIT ECC RAM
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LDR R1, =__RAM_START
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LDR R2, =__RAM_END
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SUBS R2, R2, R1
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SUBS R2, #1
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BLE .LC5
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MOVS R0, #0
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MOVS R3, #4
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.LC4:
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STR R0, [R1]
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ADD R1, R1, R3
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SUBS R2, #4
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BGE .LC4
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.LC5:
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#endif
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;; Initialize the stack pointer
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LDR R0, =sfe(CSTACK)
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MOV R13,R0
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#ifndef __NO_SYSTEM_INIT
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;; Call the CMSIS system init routine
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LDR R0, =SystemInit
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BLX R0
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#endif
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;; Init .data and .bss sections
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LDR R0, =init_data_bss
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BLX R0
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CPSIE I ; Unmask interrupts
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BL main
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JumpToSelf
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B JumpToSelf
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PUBWEAK NMI_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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NMI_Handler
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B .
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PUBWEAK HardFault_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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HardFault_Handler
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B .
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PUBWEAK MemManage_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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MemManage_Handler
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B .
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PUBWEAK BusFault_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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BusFault_Handler
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B .
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PUBWEAK UsageFault_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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UsageFault_Handler
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B .
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PUBWEAK SVC_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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SVC_Handler
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B .
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PUBWEAK DebugMon_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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DebugMon_Handler
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B .
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PUBWEAK PendSV_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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PendSV_Handler
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B .
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PUBWEAK SysTick_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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SysTick_Handler
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B .
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PUBWEAK DMA0_IRQHandler
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PUBWEAK DMA1_IRQHandler
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PUBWEAK DMA2_IRQHandler
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PUBWEAK DMA3_IRQHandler
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PUBWEAK DMA4_IRQHandler
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PUBWEAK DMA5_IRQHandler
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PUBWEAK DMA6_IRQHandler
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PUBWEAK DMA7_IRQHandler
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PUBWEAK DMA8_IRQHandler
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PUBWEAK DMA9_IRQHandler
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PUBWEAK DMA10_IRQHandler
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PUBWEAK DMA11_IRQHandler
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PUBWEAK DMA12_IRQHandler
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PUBWEAK DMA13_IRQHandler
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PUBWEAK DMA14_IRQHandler
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PUBWEAK DMA15_IRQHandler
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PUBWEAK DMA_Error_IRQHandler
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PUBWEAK MCM_IRQHandler
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PUBWEAK FTFC_IRQHandler
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PUBWEAK Read_Collision_IRQHandler
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PUBWEAK LVD_LVW_IRQHandler
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PUBWEAK FTFC_Fault_IRQHandler
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PUBWEAK WDOG_EWM_IRQHandler
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PUBWEAK RCM_IRQHandler
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PUBWEAK LPI2C0_Master_IRQHandler
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PUBWEAK LPI2C0_Slave_IRQHandler
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PUBWEAK LPSPI0_IRQHandler
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PUBWEAK LPSPI1_IRQHandler
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PUBWEAK LPSPI2_IRQHandler
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PUBWEAK Reserved45_IRQHandler
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PUBWEAK Reserved46_IRQHandler
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PUBWEAK LPUART0_RxTx_IRQHandler
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PUBWEAK Reserved48_IRQHandler
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PUBWEAK LPUART1_RxTx_IRQHandler
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PUBWEAK Reserved50_IRQHandler
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PUBWEAK LPUART2_RxTx_IRQHandler
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PUBWEAK Reserved52_IRQHandler
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PUBWEAK Reserved53_IRQHandler
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PUBWEAK Reserved54_IRQHandler
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PUBWEAK ADC0_IRQHandler
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PUBWEAK ADC1_IRQHandler
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PUBWEAK CMP0_IRQHandler
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PUBWEAK Reserved58_IRQHandler
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PUBWEAK Reserved59_IRQHandler
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PUBWEAK ERM_single_fault_IRQHandler
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PUBWEAK ERM_double_fault_IRQHandler
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PUBWEAK RTC_IRQHandler
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PUBWEAK RTC_Seconds_IRQHandler
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PUBWEAK LPIT0_Ch0_IRQHandler
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PUBWEAK LPIT0_Ch1_IRQHandler
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PUBWEAK LPIT0_Ch2_IRQHandler
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PUBWEAK LPIT0_Ch3_IRQHandler
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PUBWEAK PDB0_IRQHandler
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PUBWEAK Reserved69_IRQHandler
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PUBWEAK Reserved70_IRQHandler
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PUBWEAK Reserved71_IRQHandler
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PUBWEAK Reserved72_IRQHandler
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PUBWEAK SCG_IRQHandler
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PUBWEAK LPTMR0_IRQHandler
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PUBWEAK PORTA_IRQHandler
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PUBWEAK PORTB_IRQHandler
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PUBWEAK PORTC_IRQHandler
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PUBWEAK PORTD_IRQHandler
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PUBWEAK PORTE_IRQHandler
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PUBWEAK SWI_IRQHandler
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PUBWEAK Reserved81_IRQHandler
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PUBWEAK Reserved82_IRQHandler
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PUBWEAK Reserved83_IRQHandler
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PUBWEAK PDB1_IRQHandler
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PUBWEAK FLEXIO_IRQHandler
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PUBWEAK Reserved86_IRQHandler
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PUBWEAK Reserved87_IRQHandler
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PUBWEAK Reserved88_IRQHandler
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PUBWEAK Reserved89_IRQHandler
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PUBWEAK Reserved90_IRQHandler
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PUBWEAK Reserved91_IRQHandler
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PUBWEAK Reserved92_IRQHandler
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PUBWEAK Reserved93_IRQHandler
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PUBWEAK CAN0_ORed_IRQHandler
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PUBWEAK CAN0_Error_IRQHandler
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PUBWEAK CAN0_Wake_Up_IRQHandler
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PUBWEAK CAN0_ORed_0_15_MB_IRQHandler
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PUBWEAK CAN0_ORed_16_31_MB_IRQHandler
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PUBWEAK Reserved99_IRQHandler
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PUBWEAK Reserved100_IRQHandler
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PUBWEAK CAN1_ORed_IRQHandler
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PUBWEAK CAN1_Error_IRQHandler
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PUBWEAK Reserved103_IRQHandler
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PUBWEAK CAN1_ORed_0_15_MB_IRQHandler
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PUBWEAK Reserved105_IRQHandler
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PUBWEAK Reserved106_IRQHandler
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PUBWEAK Reserved107_IRQHandler
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PUBWEAK CAN2_ORed_IRQHandler
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PUBWEAK CAN2_Error_IRQHandler
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PUBWEAK Reserved110_IRQHandler
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PUBWEAK CAN2_ORed_0_15_MB_IRQHandler
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PUBWEAK Reserved112_IRQHandler
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PUBWEAK Reserved113_IRQHandler
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PUBWEAK Reserved114_IRQHandler
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PUBWEAK FTM0_Ch0_Ch1_IRQHandler
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PUBWEAK FTM0_Ch2_Ch3_IRQHandler
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PUBWEAK FTM0_Ch4_Ch5_IRQHandler
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PUBWEAK FTM0_Ch6_Ch7_IRQHandler
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PUBWEAK FTM0_Fault_IRQHandler
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PUBWEAK FTM0_Ovf_Reload_IRQHandler
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PUBWEAK FTM1_Ch0_Ch1_IRQHandler
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PUBWEAK FTM1_Ch2_Ch3_IRQHandler
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PUBWEAK FTM1_Ch4_Ch5_IRQHandler
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PUBWEAK FTM1_Ch6_Ch7_IRQHandler
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PUBWEAK FTM1_Fault_IRQHandler
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PUBWEAK FTM1_Ovf_Reload_IRQHandler
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PUBWEAK FTM2_Ch0_Ch1_IRQHandler
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PUBWEAK FTM2_Ch2_Ch3_IRQHandler
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PUBWEAK FTM2_Ch4_Ch5_IRQHandler
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PUBWEAK FTM2_Ch6_Ch7_IRQHandler
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PUBWEAK FTM2_Fault_IRQHandler
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PUBWEAK FTM2_Ovf_Reload_IRQHandler
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PUBWEAK FTM3_Ch0_Ch1_IRQHandler
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PUBWEAK FTM3_Ch2_Ch3_IRQHandler
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PUBWEAK FTM3_Ch4_Ch5_IRQHandler
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PUBWEAK FTM3_Ch6_Ch7_IRQHandler
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PUBWEAK FTM3_Fault_IRQHandler
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PUBWEAK FTM3_Ovf_Reload_IRQHandler
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PUBWEAK DefaultISR
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SECTION .text:CODE:REORDER:NOROOT(1)
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DMA0_IRQHandler
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DMA1_IRQHandler
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DMA2_IRQHandler
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DMA3_IRQHandler
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DMA4_IRQHandler
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DMA5_IRQHandler
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DMA6_IRQHandler
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DMA7_IRQHandler
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DMA8_IRQHandler
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DMA9_IRQHandler
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DMA10_IRQHandler
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DMA11_IRQHandler
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DMA12_IRQHandler
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DMA13_IRQHandler
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DMA14_IRQHandler
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DMA15_IRQHandler
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DMA_Error_IRQHandler
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MCM_IRQHandler
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FTFC_IRQHandler
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Read_Collision_IRQHandler
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LVD_LVW_IRQHandler
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FTFC_Fault_IRQHandler
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WDOG_EWM_IRQHandler
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RCM_IRQHandler
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LPI2C0_Master_IRQHandler
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LPI2C0_Slave_IRQHandler
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LPSPI0_IRQHandler
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LPSPI1_IRQHandler
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LPSPI2_IRQHandler
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Reserved45_IRQHandler
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Reserved46_IRQHandler
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LPUART0_RxTx_IRQHandler
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Reserved48_IRQHandler
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LPUART1_RxTx_IRQHandler
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Reserved50_IRQHandler
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LPUART2_RxTx_IRQHandler
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Reserved52_IRQHandler
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Reserved53_IRQHandler
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Reserved54_IRQHandler
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ADC0_IRQHandler
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ADC1_IRQHandler
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CMP0_IRQHandler
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Reserved58_IRQHandler
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Reserved59_IRQHandler
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ERM_single_fault_IRQHandler
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ERM_double_fault_IRQHandler
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RTC_IRQHandler
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RTC_Seconds_IRQHandler
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LPIT0_Ch0_IRQHandler
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LPIT0_Ch1_IRQHandler
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LPIT0_Ch2_IRQHandler
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LPIT0_Ch3_IRQHandler
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PDB0_IRQHandler
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Reserved69_IRQHandler
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Reserved70_IRQHandler
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Reserved71_IRQHandler
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Reserved72_IRQHandler
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SCG_IRQHandler
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LPTMR0_IRQHandler
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PORTA_IRQHandler
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PORTB_IRQHandler
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PORTC_IRQHandler
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PORTD_IRQHandler
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PORTE_IRQHandler
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SWI_IRQHandler
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Reserved81_IRQHandler
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Reserved82_IRQHandler
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Reserved83_IRQHandler
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PDB1_IRQHandler
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FLEXIO_IRQHandler
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Reserved86_IRQHandler
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Reserved87_IRQHandler
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Reserved88_IRQHandler
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Reserved89_IRQHandler
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Reserved90_IRQHandler
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Reserved91_IRQHandler
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Reserved92_IRQHandler
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Reserved93_IRQHandler
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CAN0_ORed_IRQHandler
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CAN0_Error_IRQHandler
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CAN0_Wake_Up_IRQHandler
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CAN0_ORed_0_15_MB_IRQHandler
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CAN0_ORed_16_31_MB_IRQHandler
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Reserved99_IRQHandler
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Reserved100_IRQHandler
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CAN1_ORed_IRQHandler
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CAN1_Error_IRQHandler
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Reserved103_IRQHandler
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CAN1_ORed_0_15_MB_IRQHandler
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Reserved105_IRQHandler
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Reserved106_IRQHandler
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Reserved107_IRQHandler
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CAN2_ORed_IRQHandler
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CAN2_Error_IRQHandler
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Reserved110_IRQHandler
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CAN2_ORed_0_15_MB_IRQHandler
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Reserved112_IRQHandler
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Reserved113_IRQHandler
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Reserved114_IRQHandler
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FTM0_Ch0_Ch1_IRQHandler
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FTM0_Ch2_Ch3_IRQHandler
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FTM0_Ch4_Ch5_IRQHandler
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FTM0_Ch6_Ch7_IRQHandler
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FTM0_Fault_IRQHandler
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FTM0_Ovf_Reload_IRQHandler
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FTM1_Ch0_Ch1_IRQHandler
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FTM1_Ch2_Ch3_IRQHandler
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FTM1_Ch4_Ch5_IRQHandler
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FTM1_Ch6_Ch7_IRQHandler
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FTM1_Fault_IRQHandler
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FTM1_Ovf_Reload_IRQHandler
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FTM2_Ch0_Ch1_IRQHandler
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FTM2_Ch2_Ch3_IRQHandler
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FTM2_Ch4_Ch5_IRQHandler
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FTM2_Ch6_Ch7_IRQHandler
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FTM2_Fault_IRQHandler
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FTM2_Ovf_Reload_IRQHandler
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FTM3_Ch0_Ch1_IRQHandler
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FTM3_Ch2_Ch3_IRQHandler
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FTM3_Ch4_Ch5_IRQHandler
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FTM3_Ch6_Ch7_IRQHandler
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FTM3_Fault_IRQHandler
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FTM3_Ovf_Reload_IRQHandler
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DefaultISR
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B DefaultISR
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END
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