539 lines
20 KiB
C
539 lines
20 KiB
C
/**
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******************************************************************************
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* @file stm32f30x_pwr.c
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* @author MCD Application Team
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* @version V1.2.3
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* @date 10-July-2015
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* @brief This file provides firmware functions to manage the following
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* functionalities of the Power Controller (PWR) peripheral:
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* + Backup Domain Access
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* + PVD configuration
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* + WakeUp pins configuration
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* + Low Power modes configuration
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* + Flags management
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*
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
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*
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* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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* You may not use this file except in compliance with the License.
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* You may obtain a copy of the License at:
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*
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* http://www.st.com/software_license_agreement_liberty_v2
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f30x_pwr.h"
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#include "stm32f30x_rcc.h"
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/** @addtogroup STM32F30x_StdPeriph_Driver
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* @{
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*/
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/** @defgroup PWR
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* @brief PWR driver modules
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* @{
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*/
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* --------- PWR registers bit address in the alias region ---------- */
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#define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
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/* --- CR Register ---*/
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/* Alias word address of DBP bit */
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#define CR_OFFSET (PWR_OFFSET + 0x00)
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#define DBP_BitNumber 0x08
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#define CR_DBP_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4))
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/* Alias word address of PVDE bit */
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#define PVDE_BitNumber 0x04
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#define CR_PVDE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4))
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/* ------------------ PWR registers bit mask ------------------------ */
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/* CR register bit mask */
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#define CR_DS_MASK ((uint32_t)0xFFFFFFFC)
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#define CR_PLS_MASK ((uint32_t)0xFFFFFF1F)
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Private functions ---------------------------------------------------------*/
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/** @defgroup PWR_Private_Functions
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* @{
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*/
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/** @defgroup PWR_Group1 Backup Domain Access function
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* @brief Backup Domain Access function
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*
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@verbatim
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==============================================================================
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##### Backup Domain Access function #####
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==============================================================================
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[..] After reset, the Backup Domain Registers (RCC BDCR Register, RTC registers
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and RTC backup registers) are protected against possible stray write accesses.
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[..] To enable access to Backup domain use the PWR_BackupAccessCmd(ENABLE) function.
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@endverbatim
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* @{
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*/
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/**
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* @brief Deinitializes the PWR peripheral registers to their default reset values.
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* @param None
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* @retval None
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*/
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void PWR_DeInit(void)
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{
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE);
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE);
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}
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/**
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* @brief Enables or disables access to the RTC and backup registers.
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* @note If the HSE divided by 32 is used as the RTC clock, the
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* Backup Domain Access should be kept enabled.
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* @param NewState: new state of the access to the RTC and backup registers.
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* This parameter can be: ENABLE or DISABLE.
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* @retval None
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*/
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void PWR_BackupAccessCmd(FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_FUNCTIONAL_STATE(NewState));
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*(__IO uint32_t *) CR_DBP_BB = (uint32_t)NewState;
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}
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/**
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* @}
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*/
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/** @defgroup PWR_Group2 PVD configuration functions
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* @brief PVD configuration functions
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*
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@verbatim
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===============================================================================
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##### PVD configuration functions #####
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==============================================================================
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[..]
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(+) The PVD is used to monitor the VDD power supply by comparing it to a threshold
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selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
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(+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower than the
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PVD threshold. This event is internally connected to the EXTI line16
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and can generate an interrupt if enabled through the EXTI registers.
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(+) The PVD is stopped in Standby mode.
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@endverbatim
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* @{
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*/
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/**
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* @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
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* @param PWR_PVDLevel: specifies the PVD detection level
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* This parameter can be one of the following values:
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* @arg PWR_PVDLevel_0: PVD detection level set to 2.18V
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* @arg PWR_PVDLevel_1: PVD detection level set to 2.28V
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* @arg PWR_PVDLevel_2: PVD detection level set to 2.38V
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* @arg PWR_PVDLevel_3: PVD detection level set to 2.48V
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* @arg PWR_PVDLevel_4: PVD detection level set to 2.58V
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* @arg PWR_PVDLevel_5: PVD detection level set to 2.68V
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* @arg PWR_PVDLevel_6: PVD detection level set to 2.78V
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* @arg PWR_PVDLevel_7: PVD detection level set to 2.88V
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* @retval None
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*/
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void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel)
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{
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uint32_t tmpreg = 0;
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/* Check the parameters */
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assert_param(IS_PWR_PVD_LEVEL(PWR_PVDLevel));
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tmpreg = PWR->CR;
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/* Clear PLS[7:5] bits */
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tmpreg &= CR_PLS_MASK;
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/* Set PLS[7:5] bits according to PWR_PVDLevel value */
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tmpreg |= PWR_PVDLevel;
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/* Store the new value */
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PWR->CR = tmpreg;
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}
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/**
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* @brief Enables or disables the Power Voltage Detector(PVD).
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* @param NewState: new state of the PVD.
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* This parameter can be: ENABLE or DISABLE.
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* @retval None
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*/
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void PWR_PVDCmd(FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_FUNCTIONAL_STATE(NewState));
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*(__IO uint32_t *) CR_PVDE_BB = (uint32_t)NewState;
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}
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/**
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* @}
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*/
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/** @defgroup PWR_Group3 WakeUp pins configuration functions
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* @brief WakeUp pins configuration functions
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*
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@verbatim
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===============================================================================
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##### WakeUp pins configuration functions #####
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===============================================================================
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[..]
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(+) WakeUp pins are used to wakeup the system from Standby mode. These pins are
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forced in input pull down configuration and are active on rising edges.
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(+) There are three WakeUp pins: WakeUp Pin 1 on PA.00, WakeUp Pin 2 on PC.13 and
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WakeUp Pin 3 on PE.06.
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@endverbatim
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* @{
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*/
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/**
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* @brief Enables or disables the WakeUp Pin functionality.
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* @param PWR_WakeUpPin: specifies the WakeUpPin.
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* This parameter can be: PWR_WakeUpPin_1, PWR_WakeUpPin_2 or PWR_WakeUpPin_3.
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* @param NewState: new state of the WakeUp Pin functionality.
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* This parameter can be: ENABLE or DISABLE.
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* @retval None
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*/
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void PWR_WakeUpPinCmd(uint32_t PWR_WakeUpPin, FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_PWR_WAKEUP_PIN(PWR_WakeUpPin));
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assert_param(IS_FUNCTIONAL_STATE(NewState));
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if (NewState != DISABLE)
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{
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/* Enable the EWUPx pin */
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PWR->CSR |= PWR_WakeUpPin;
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}
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else
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{
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/* Disable the EWUPx pin */
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PWR->CSR &= ~PWR_WakeUpPin;
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}
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}
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/**
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* @}
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*/
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/** @defgroup PWR_Group4 Low Power modes configuration functions
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* @brief Low Power modes configuration functions
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*
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@verbatim
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===============================================================================
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##### Low Power modes configuration functions #####
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==============================================================================
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[..] The devices feature three low-power modes:
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(+) Sleep mode: Cortex-M4 core stopped, peripherals kept running.
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(+) Stop mode: all clocks are stopped, regulator running, regulator in low power mode
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(+) Standby mode: VCORE domain powered off
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*** Sleep mode ***
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==================
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[..]
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(+) Entry:
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(++) The Sleep mode is entered by executing the WFE() or WFI() instructions.
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(+) Exit:
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(++) Any peripheral interrupt acknowledged by the nested vectored interrupt
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controller (NVIC) can wake up the device from Sleep mode.
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*** Stop mode ***
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=================
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[..] In Stop mode, all clocks in the VCORE domain are stopped, the PLL, the HSI,
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and the HSE RC oscillators are disabled. Internal SRAM and register
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contents are preserved.
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The voltage regulator can be configured either in normal or low-power mode.
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(+) Entry:
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(++) The Stop mode is entered using the PWR_EnterSTOPMode(PWR_Regulator_LowPower,)
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function with regulator in LowPower or with Regulator ON.
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(+) Exit:
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(++) Any EXTI Line (Internal or External) configured in Interrupt/Event mode
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or any internal IPs (I2C or UASRT) wakeup event.
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*** Standby mode ***
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====================
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[..] The Standby mode allows to achieve the lowest power consumption. It is based
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on the Cortex-M4 deepsleep mode, with the voltage regulator disabled.
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The VCORE domain is consequently powered off. The PLL, the HSI, and the HSE
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oscillator are also switched off. SRAM and register
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contents are lost except for the Backup domain (RTC registers, RTC backup
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registers and Standby circuitry).
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[..] The voltage regulator is OFF.
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(+) Entry:
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(++) The Standby mode is entered using the PWR_EnterSTANDBYMode() function.
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(+) Exit:
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(++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup,
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tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
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*** Auto-wakeup (AWU) from low-power mode ***
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=============================================
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[..] The MCU can be woken up from low-power mode by an RTC Alarm event, a tamper
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event, a time-stamp event, or a comparator event, without depending on an
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external interrupt (Auto-wakeup mode).
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(+) RTC auto-wakeup (AWU) from the Stop mode
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(++) To wake up from the Stop mode with an RTC alarm event, it is necessary to:
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(+++) Configure the EXTI Line 17 to be sensitive to rising edges (Interrupt
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or Event modes) using the EXTI_Init() function.
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(+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function
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(+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm()
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and RTC_AlarmCmd() functions.
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(++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
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is necessary to:
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(+++) Configure the EXTI Line 19 to be sensitive to rising edges (Interrupt
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or Event modes) using the EXTI_Init() function.
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(+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig()
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function.
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(+++) Configure the RTC to detect the tamper or time stamp event using the
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RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd()
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functions.
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(+) RTC auto-wakeup (AWU) from the Standby mode
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(++) To wake up from the Standby mode with an RTC alarm event, it is necessary to:
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(+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function.
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(+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm()
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and RTC_AlarmCmd() functions.
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(++) To wake up from the Standby mode with an RTC Tamper or time stamp event, it
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is necessary to:
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(+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig()
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function.
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(+++) Configure the RTC to detect the tamper or time stamp event using the
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RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd()
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functions.
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(+) Comparator auto-wakeup (AWU) from the Stop mode
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(++) To wake up from the Stop mode with a comparator wakeup event, it is necessary to:
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(+++) Configure the correspondent comparator EXTI Line to be sensitive to
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the selected edges (falling, rising or falling and rising)
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(Interrupt or Event modes) using the EXTI_Init() function.
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(+++) Configure the comparator to generate the event.
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@endverbatim
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* @{
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*/
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/**
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* @brief Enters Sleep mode.
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* @note In Sleep mode, all I/O pins keep the same state as in Run mode.
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* @param PWR_SLEEPEntry: specifies if SLEEP mode in entered with WFI or WFE instruction.
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* This parameter can be one of the following values:
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* @arg PWR_SLEEPEntry_WFI: enter SLEEP mode with WFI instruction
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* @arg PWR_SLEEPEntry_WFE: enter SLEEP mode with WFE instruction
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* @retval None
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*/
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void PWR_EnterSleepMode(uint8_t PWR_SLEEPEntry)
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{
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/* Check the parameters */
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assert_param(IS_PWR_SLEEP_ENTRY(PWR_SLEEPEntry));
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/* Clear SLEEPDEEP bit of Cortex System Control Register */
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SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
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/* Select SLEEP mode entry -------------------------------------------------*/
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if(PWR_SLEEPEntry == PWR_SLEEPEntry_WFI)
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{
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/* Request Wait For Interrupt */
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__WFI();
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}
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else
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{
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/* Request Wait For Event */
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__SEV();
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__WFE();
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__WFE();
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}
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}
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/**
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* @brief Enters STOP mode.
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* @note In Stop mode, all I/O pins keep the same state as in Run mode.
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* @note When exiting Stop mode by issuing an interrupt or a wakeup event,
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* the HSI RC oscillator is selected as system clock.
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* @note When the voltage regulator operates in low power mode, an additional
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* startup delay is incurred when waking up from Stop mode.
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* By keeping the internal regulator ON during Stop mode, the consumption
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* is higher although the startup time is reduced.
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* @param PWR_Regulator: specifies the regulator state in STOP mode.
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* This parameter can be one of the following values:
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* @arg PWR_Regulator_ON: STOP mode with regulator ON
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* @arg PWR_Regulator_LowPower: STOP mode with regulator in low power mode
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* @param PWR_STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction.
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* This parameter can be one of the following values:
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* @arg PWR_STOPEntry_WFI: enter STOP mode with WFI instruction
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* @arg PWR_STOPEntry_WFE: enter STOP mode with WFE instruction
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* @retval None
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*/
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void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry)
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{
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uint32_t tmpreg = 0;
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/* Check the parameters */
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assert_param(IS_PWR_REGULATOR(PWR_Regulator));
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assert_param(IS_PWR_STOP_ENTRY(PWR_STOPEntry));
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/* Select the regulator state in STOP mode ---------------------------------*/
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tmpreg = PWR->CR;
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/* Clear PDDS and LPDSR bits */
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tmpreg &= CR_DS_MASK;
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/* Set LPDSR bit according to PWR_Regulator value */
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tmpreg |= PWR_Regulator;
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/* Store the new value */
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PWR->CR = tmpreg;
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/* Set SLEEPDEEP bit of Cortex System Control Register */
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SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
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/* Select STOP mode entry --------------------------------------------------*/
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if(PWR_STOPEntry == PWR_STOPEntry_WFI)
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{
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/* Request Wait For Interrupt */
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__WFI();
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}
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else
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{
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/* Request Wait For Event */
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__WFE();
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}
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/* Reset SLEEPDEEP bit of Cortex System Control Register */
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SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
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}
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/**
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* @brief Enters STANDBY mode.
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* @note In Standby mode, all I/O pins are high impedance except for:
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* @note Reset pad (still available)
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* @note RTC_AF1 pin (PC13) if configured for Wakeup pin 2 (WKUP2), tamper,
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* time-stamp, RTC Alarm out, or RTC clock calibration out.
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* @note WKUP pin 1 (PA0) and WKUP pin 3 (PE6), if enabled.
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* @note The Wakeup flag (WUF) need to be cleared at application level before to call this function.
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* @param None
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* @retval None
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*/
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void PWR_EnterSTANDBYMode(void)
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{
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/* Select STANDBY mode */
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PWR->CR |= PWR_CR_PDDS;
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/* Set SLEEPDEEP bit of Cortex System Control Register */
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SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
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/* This option is used to ensure that store operations are completed */
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#if defined ( __CC_ARM )
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__force_stores();
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#endif
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/* Request Wait For Interrupt */
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__WFI();
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}
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/**
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* @}
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*/
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/** @defgroup PWR_Group5 Flags management functions
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* @brief Flags management functions
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*
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@verbatim
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===============================================================================
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##### Flags management functions #####
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===============================================================================
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@endverbatim
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* @{
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*/
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/**
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* @brief Checks whether the specified PWR flag is set or not.
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* @param PWR_FLAG: specifies the flag to check.
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* This parameter can be one of the following values:
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* @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
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* was received from the WKUP pin or from the RTC alarm (Alarm A or Alarm B),
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* RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
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* @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
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* resumed from StandBy mode.
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* @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
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* by the PWR_PVDCmd() function.
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* @arg PWR_FLAG_VREFINTRDY: Internal Voltage Reference Ready flag. This
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* flag indicates the state of the internal voltage reference, VREFINT.
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* @retval The new state of PWR_FLAG (SET or RESET).
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*/
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FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG)
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{
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FlagStatus bitstatus = RESET;
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/* Check the parameters */
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assert_param(IS_PWR_GET_FLAG(PWR_FLAG));
|
|
|
|
if ((PWR->CSR & PWR_FLAG) != (uint32_t)RESET)
|
|
{
|
|
bitstatus = SET;
|
|
}
|
|
else
|
|
{
|
|
bitstatus = RESET;
|
|
}
|
|
/* Return the flag status */
|
|
return bitstatus;
|
|
}
|
|
|
|
/**
|
|
* @brief Clears the PWR's pending flags.
|
|
* @param PWR_FLAG: specifies the flag to clear.
|
|
* This parameter can be one of the following values:
|
|
* @arg PWR_FLAG_WU: Wake Up flag
|
|
* @arg PWR_FLAG_SB: StandBy flag
|
|
* @retval None
|
|
*/
|
|
void PWR_ClearFlag(uint32_t PWR_FLAG)
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_PWR_CLEAR_FLAG(PWR_FLAG));
|
|
|
|
PWR->CR |= PWR_FLAG << 2;
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|