git-svn-id: https://svn.code.sf.net/p/openblt/code/trunk@409 5dc33758-31d5-4daf-9ae8-b24bf3d40d73
289 lines
9.9 KiB
C
289 lines
9.9 KiB
C
/**
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******************************************************************************
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* @file stm32f3xx_hal_pwr_ex.c
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* @author MCD Application Team
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* @brief Extended PWR HAL module driver.
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* This file provides firmware functions to manage the following
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* functionalities of the Power Controller (PWR) peripheral:
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* + Extended Initialization and de-initialization functions
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* + Extended Peripheral Control functions
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*
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f3xx_hal.h"
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/** @addtogroup STM32F3xx_HAL_Driver
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* @{
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*/
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/** @defgroup PWREx PWREx
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* @brief PWREx HAL module driver
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* @{
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*/
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#ifdef HAL_PWR_MODULE_ENABLED
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/** @defgroup PWREx_Private_Constants PWR Extended Private Constants
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* @{
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*/
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#define PVD_MODE_IT (0x00010000U)
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#define PVD_MODE_EVT (0x00020000U)
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#define PVD_RISING_EDGE (0x00000001U)
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#define PVD_FALLING_EDGE (0x00000002U)
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/**
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* @}
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*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Exported functions ---------------------------------------------------------*/
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/** @defgroup PWREx_Exported_Functions PWR Extended Exported Functions
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* @{
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*/
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/** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended Control Functions
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* @brief Extended Peripheral Control functions
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*
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@verbatim
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===============================================================================
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##### Peripheral Extended control functions #####
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===============================================================================
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*** PVD configuration (present on all other devices than STM32F3x8 devices) ***
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=========================
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[..]
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(+) The PVD is used to monitor the VDD power supply by comparing it to a
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threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
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(+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower
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than the PVD threshold. This event is internally connected to the EXTI
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line16 and can generate an interrupt if enabled. This is done through
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__HAL_PWR_PVD_EXTI_ENABLE_IT() macro
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(+) The PVD is stopped in Standby mode.
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-@- PVD is not available on STM32F3x8 Product Line
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*** Voltage regulator ***
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=========================
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[..]
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(+) The voltage regulator is always enabled after Reset. It works in three different
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modes.
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In Run mode, the regulator supplies full power to the 1.8V domain (core, memories
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and digital peripherals).
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In Stop mode, the regulator supplies low power to the 1.8V domain, preserving
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contents of registers and SRAM.
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In Stop mode, the regulator is powered off. The contents of the registers and SRAM
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are lost except for the Standby circuitry and the Backup Domain.
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Note: in the STM32F3x8xx devices, the voltage regulator is bypassed and the
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microcontroller must be powered from a nominal VDD = 1.8V +/-8U% voltage.
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(+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower
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than the PVD threshold. This event is internally connected to the EXTI
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line16 and can generate an interrupt if enabled. This is done through
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__HAL_PWR_PVD_EXTI_ENABLE_IT() macro
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(+) The PVD is stopped in Standby mode.
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*** SDADC power configuration ***
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================================
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[..]
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(+) On STM32F373xC/STM32F378xx devices, there are up to
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3 SDADC instances that can be enabled/disabled.
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@endverbatim
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* @{
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*/
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#if defined(STM32F302xE) || defined(STM32F303xE) || \
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defined(STM32F302xC) || defined(STM32F303xC) || \
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defined(STM32F303x8) || defined(STM32F334x8) || \
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defined(STM32F301x8) || defined(STM32F302x8) || \
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defined(STM32F373xC)
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/**
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* @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
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* @param sConfigPVD pointer to an PWR_PVDTypeDef structure that contains the configuration
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* information for the PVD.
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* @note Refer to the electrical characteristics of your device datasheet for
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* more details about the voltage threshold corresponding to each
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* detection level.
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* @retval None
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*/
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void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD)
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{
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/* Check the parameters */
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assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
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assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
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/* Set PLS[7:5] bits according to PVDLevel value */
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MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel);
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/* Clear any previous config. Keep it clear if no event or IT mode is selected */
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__HAL_PWR_PVD_EXTI_DISABLE_EVENT();
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__HAL_PWR_PVD_EXTI_DISABLE_IT();
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__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
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/* Configure interrupt mode */
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if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
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{
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__HAL_PWR_PVD_EXTI_ENABLE_IT();
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}
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/* Configure event mode */
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if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
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{
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__HAL_PWR_PVD_EXTI_ENABLE_EVENT();
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}
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/* Configure the edge */
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if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
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{
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__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
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}
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if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
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{
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__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
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}
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}
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/**
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* @brief Enables the Power Voltage Detector(PVD).
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* @retval None
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*/
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void HAL_PWR_EnablePVD(void)
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{
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SET_BIT(PWR->CR, PWR_CR_PVDE);
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}
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/**
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* @brief Disables the Power Voltage Detector(PVD).
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* @retval None
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*/
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void HAL_PWR_DisablePVD(void)
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{
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CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
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}
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/**
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* @brief This function handles the PWR PVD interrupt request.
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* @note This API should be called under the PVD_IRQHandler().
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* @retval None
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*/
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void HAL_PWR_PVD_IRQHandler(void)
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{
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/* Check PWR exti flag */
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if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET)
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{
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/* PWR PVD interrupt user callback */
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HAL_PWR_PVDCallback();
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/* Clear PWR Exti pending bit */
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__HAL_PWR_PVD_EXTI_CLEAR_FLAG();
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}
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}
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/**
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* @brief PWR PVD interrupt callback
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* @retval None
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*/
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__weak void HAL_PWR_PVDCallback(void)
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{
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/* NOTE : This function Should not be modified, when the callback is needed,
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the HAL_PWR_PVDCallback could be implemented in the user file
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*/
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}
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#endif /* STM32F302xE || STM32F303xE || */
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/* STM32F302xC || STM32F303xC || */
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/* STM32F303x8 || STM32F334x8 || */
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/* STM32F301x8 || STM32F302x8 || */
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/* STM32F373xC */
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#if defined(STM32F373xC) || defined(STM32F378xx)
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/**
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* @brief Enables the SDADC peripheral functionaliy
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* @param Analogx specifies the SDADC peripheral instance.
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* This parameter can be: PWR_SDADC_ANALOG1, PWR_SDADC_ANALOG2 or PWR_SDADC_ANALOG3.
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* @retval None
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*/
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void HAL_PWREx_EnableSDADC(uint32_t Analogx)
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{
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/* Check the parameters */
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assert_param(IS_PWR_SDADC_ANALOG(Analogx));
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/* Enable PWR clock interface for SDADC use */
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__HAL_RCC_PWR_CLK_ENABLE();
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PWR->CR |= Analogx;
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}
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/**
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* @brief Disables the SDADC peripheral functionaliy
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* @param Analogx specifies the SDADC peripheral instance.
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* This parameter can be: PWR_SDADC_ANALOG1, PWR_SDADC_ANALOG2 or PWR_SDADC_ANALOG3.
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* @retval None
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*/
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void HAL_PWREx_DisableSDADC(uint32_t Analogx)
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{
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/* Check the parameters */
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assert_param(IS_PWR_SDADC_ANALOG(Analogx));
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PWR->CR &= ~Analogx;
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}
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#endif /* STM32F373xC || STM32F378xx */
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/**
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* @}
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*/
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/**
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* @}
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*/
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#endif /* HAL_PWR_MODULE_ENABLED */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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