643 lines
20 KiB
C
643 lines
20 KiB
C
/**
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******************************************************************************
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* @file stm32g0xx_hal_pwr_ex.c
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* @author MCD Application Team
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* @brief Extended PWR HAL module driver.
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* This file provides firmware functions to manage the following
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* functionalities of the Power Controller (PWR) peripheral:
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* + Extended Initialization and de-initialization functions
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* + Extended Peripheral Control functions
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*
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2018 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32g0xx_hal.h"
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/** @addtogroup STM32G0xx_HAL_Driver
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* @{
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*/
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/** @addtogroup PWREx
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* @{
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*/
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#ifdef HAL_PWR_MODULE_ENABLED
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/** @defgroup PWR_Extended_Private_Defines PWR Extended Private Defines
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* @{
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*/
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/** @defgroup PWREx_TimeOut_Value PWREx Flag Setting Time Out Value
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* @{
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*/
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#define PWR_REGLPF_SETTING_DELAY_6_US 6u /*!< REGLPF should rise in about 5 us plus
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2 APB clock. Taking in account max Sysclk at
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2 MHz, and rounded to upper value */
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#define PWR_VOSF_SETTING_DELAY_6_US 6u /*!< VOSF should rise in about 5 us plus
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2 APB clock. Taking in account max Sysclk at
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16 MHz, and rounded to upper value */
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/**
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* @}
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*/
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/** @defgroup PWREx_Gpio_Pin_Number PWREx Gpio Pin Number
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* @{
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*/
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#define PWR_GPIO_PIN_NB 16u /*!< Number of gpio pin in bank */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Exported functions --------------------------------------------------------*/
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/** @addtogroup PWREx_Exported_Functions PWR Extended Exported Functions
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* @{
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*/
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/** @addtogroup PWREx_Exported_Functions_Group1 Extended Peripheral Control functions
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* @brief Extended Peripheral Control functions
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*
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@verbatim
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===============================================================================
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##### Extended Peripheral Initialization and de-initialization functions #####
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===============================================================================
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[..]
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@endverbatim
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* @{
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*/
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/**
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* @brief Enable battery charging.
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* @note When VDD is present, charge the external battery on VBAT thru an
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* internal resistor.
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* @param ResistorSelection specifies the resistor impedance.
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* This parameter can be one of the following values:
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* @arg @ref PWR_BATTERY_CHARGING_RESISTOR_5 5 kOhms resistor
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* @arg @ref PWR_BATTERY_CHARGING_RESISTOR_1_5 1.5 kOhms resistor
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* @retval None
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*/
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void HAL_PWREx_EnableBatteryCharging(uint32_t ResistorSelection)
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{
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uint32_t tmpreg;
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assert_param(IS_PWR_BATTERY_RESISTOR_SELECT(ResistorSelection));
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/* Specify resistor selection and enable battery charging */
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tmpreg = (PWR->CR4 & ~PWR_CR4_VBRS);
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PWR->CR4 = (tmpreg | ResistorSelection | PWR_CR4_VBE);
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}
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/**
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* @brief Disable battery charging.
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* @retval None
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*/
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void HAL_PWREx_DisableBatteryCharging(void)
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{
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CLEAR_BIT(PWR->CR4, PWR_CR4_VBE);
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}
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#if defined(PWR_CR3_ENB_ULP)
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/**
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* @brief Enable POR Monitor sampling mode.
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* @note When entering ultra low power modes (standby, shutdown) this feature
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* can be enabled to reduce further consumption: Power On Reset monitor
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* is then set in sampling mode, and no more in always on mode.
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* @retval None
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*/
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void HAL_PWREx_EnablePORMonitorSampling(void)
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{
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PWR->CR3 |= PWR_CR3_ENB_ULP;
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}
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/**
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* @brief Disable POR Monitor sampling mode.
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* @retval None
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*/
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void HAL_PWREx_DisablePORMonitorSampling(void)
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{
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PWR->CR3 &= ~PWR_CR3_ENB_ULP;
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}
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#endif
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/**
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* @brief Enable Internal Wake-up Line.
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* @retval None
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*/
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void HAL_PWREx_EnableInternalWakeUpLine(void)
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{
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SET_BIT(PWR->CR3, PWR_CR3_EIWUL);
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}
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/**
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* @brief Disable Internal Wake-up Line.
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* @retval None
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*/
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void HAL_PWREx_DisableInternalWakeUpLine(void)
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{
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CLEAR_BIT(PWR->CR3, PWR_CR3_EIWUL);
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}
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/**
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* @brief Enable GPIO pull-up state in Standby and Shutdown modes.
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* @note Set the relevant PUy bit of PWR_PUCRx register to configure the I/O in
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* pull-up state in Standby and Shutdown modes.
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* @note This state is effective in Standby and Shutdown modes only if APC bit
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* is set through HAL_PWREx_EnablePullUpPullDownConfig() API.
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* @note The configuration is lost when exiting the Shutdown mode due to the
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* power-on reset, maintained when exiting the Standby mode.
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* @note To avoid any conflict at Standby and Shutdown modes exits, the corresponding
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* PDy bit of PWR_PDCRx register is cleared unless it is reserved.
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* @param GPIO Specify the IO port. This parameter can be PWR_GPIO_A, ..., PWR_GPIO_F
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* to select the GPIO peripheral.
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* @param GPIONumber Specify the I/O pins numbers.
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* This parameter can be one of the following values:
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* PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for ports where less
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* I/O pins are available) or the logical OR of several of them to set
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* several bits for a given port in a single API call.
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* @retval HAL Status
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*/
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HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber)
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{
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HAL_StatusTypeDef status = HAL_OK;
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assert_param(IS_PWR_GPIO(GPIO));
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assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber));
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switch (GPIO)
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{
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case PWR_GPIO_A:
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SET_BIT(PWR->PUCRA, (GPIONumber & ~PWR_GPIO_BIT_14));
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CLEAR_BIT(PWR->PDCRA, (GPIONumber & ~PWR_GPIO_BIT_13));
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break;
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case PWR_GPIO_B:
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SET_BIT(PWR->PUCRB, GPIONumber);
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CLEAR_BIT(PWR->PDCRB, GPIONumber);
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break;
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case PWR_GPIO_C:
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SET_BIT(PWR->PUCRC, GPIONumber);
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CLEAR_BIT(PWR->PDCRC, GPIONumber);
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break;
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case PWR_GPIO_D:
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SET_BIT(PWR->PUCRD, GPIONumber);
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CLEAR_BIT(PWR->PDCRD, GPIONumber);
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break;
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case PWR_GPIO_F:
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SET_BIT(PWR->PUCRF, GPIONumber);
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CLEAR_BIT(PWR->PDCRF, GPIONumber);
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break;
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default:
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status = HAL_ERROR;
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break;
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}
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return status;
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}
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/**
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* @brief Disable GPIO pull-up state in Standby mode and Shutdown modes.
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* @note Reset the relevant PUy bit of PWR_PUCRx register used to configure the I/O
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* in pull-up state in Standby and Shutdown modes.
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* @param GPIO Specifies the IO port. This parameter can be PWR_GPIO_A, ..., PWR_GPIO_F
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* to select the GPIO peripheral.
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* @param GPIONumber Specify the I/O pins numbers.
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* This parameter can be one of the following values:
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* PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for ports where less
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* I/O pins are available) or the logical OR of several of them to reset
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* several bits for a given port in a single API call.
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* @retval HAL Status
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*/
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HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber)
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{
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HAL_StatusTypeDef status = HAL_OK;
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assert_param(IS_PWR_GPIO(GPIO));
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assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber));
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switch (GPIO)
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{
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case PWR_GPIO_A:
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CLEAR_BIT(PWR->PUCRA, (GPIONumber & ~PWR_GPIO_BIT_14));
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break;
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case PWR_GPIO_B:
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CLEAR_BIT(PWR->PUCRB, GPIONumber);
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break;
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case PWR_GPIO_C:
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CLEAR_BIT(PWR->PUCRC, GPIONumber);
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break;
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case PWR_GPIO_D:
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CLEAR_BIT(PWR->PUCRD, GPIONumber);
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break;
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case PWR_GPIO_F:
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CLEAR_BIT(PWR->PUCRF, GPIONumber);
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break;
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default:
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status = HAL_ERROR;
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break;
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}
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return status;
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}
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/**
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* @brief Enable GPIO pull-down state in Standby and Shutdown modes.
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* @note Set the relevant PDy bit of PWR_PDCRx register to configure the I/O in
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* pull-down state in Standby and Shutdown modes.
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* @note This state is effective in Standby and Shutdown modes only if APC bit
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* is set through HAL_PWREx_EnablePullUpPullDownConfig() API.
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* @note The configuration is lost when exiting the Shutdown mode due to the
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* power-on reset, maintained when exiting the Standby mode.
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* @note To avoid any conflict at Standby and Shutdown modes exits, the corresponding
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* PUy bit of PWR_PUCRx register is cleared unless it is reserved.
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* @param GPIO Specify the IO port. This parameter can be PWR_GPIO_A..PWR_GPIO_F
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* to select the GPIO peripheral.
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* @param GPIONumber Specify the I/O pins numbers.
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* This parameter can be one of the following values:
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* PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for ports where less
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* I/O pins are available) or the logical OR of several of them to set
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* several bits for a given port in a single API call.
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* @retval HAL Status
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*/
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HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber)
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{
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HAL_StatusTypeDef status = HAL_OK;
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assert_param(IS_PWR_GPIO(GPIO));
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assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber));
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switch (GPIO)
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{
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case PWR_GPIO_A:
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SET_BIT(PWR->PDCRA, (GPIONumber & ~PWR_GPIO_BIT_13));
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CLEAR_BIT(PWR->PUCRA, (GPIONumber & ~PWR_GPIO_BIT_14));
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break;
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case PWR_GPIO_B:
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SET_BIT(PWR->PDCRB, GPIONumber);
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CLEAR_BIT(PWR->PUCRB, GPIONumber);
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break;
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case PWR_GPIO_C:
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SET_BIT(PWR->PDCRC, GPIONumber);
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CLEAR_BIT(PWR->PUCRC, GPIONumber);
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break;
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case PWR_GPIO_D:
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SET_BIT(PWR->PDCRD, GPIONumber);
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CLEAR_BIT(PWR->PUCRD, GPIONumber);
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break;
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case PWR_GPIO_F:
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SET_BIT(PWR->PDCRF, GPIONumber);
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CLEAR_BIT(PWR->PUCRF, GPIONumber);
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break;
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default:
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status = HAL_ERROR;
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break;
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}
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return status;
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}
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/**
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* @brief Disable GPIO pull-down state in Standby and Shutdown modes.
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* @note Reset the relevant PDy bit of PWR_PDCRx register used to configure the I/O
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* in pull-down state in Standby and Shutdown modes.
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* @param GPIO Specifies the IO port. This parameter can be PWR_GPIO_A..PWR_GPIO_F
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* to select the GPIO peripheral.
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* @param GPIONumber Specify the I/O pins numbers.
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* This parameter can be one of the following values:
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* PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for ports where less
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* I/O pins are available) or the logical OR of several of them to reset
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* several bits for a given port in a single API call.
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* @retval HAL Status
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*/
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HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber)
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{
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HAL_StatusTypeDef status = HAL_OK;
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assert_param(IS_PWR_GPIO(GPIO));
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assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber));
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switch (GPIO)
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{
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case PWR_GPIO_A:
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CLEAR_BIT(PWR->PDCRA, (GPIONumber & ~PWR_GPIO_BIT_13));
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break;
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case PWR_GPIO_B:
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CLEAR_BIT(PWR->PDCRB, GPIONumber);
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break;
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case PWR_GPIO_C:
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CLEAR_BIT(PWR->PDCRC, GPIONumber);
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break;
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case PWR_GPIO_D:
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CLEAR_BIT(PWR->PDCRD, GPIONumber);
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break;
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case PWR_GPIO_F:
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CLEAR_BIT(PWR->PDCRF, GPIONumber);
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break;
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default:
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status = HAL_ERROR;
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break;
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}
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return status;
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}
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/**
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* @brief Enable pull-up and pull-down configuration.
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* @note When APC bit is set, the I/O pull-up and pull-down configurations defined in
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* PWR_PUCRx and PWR_PDCRx registers are applied in Standby and Shutdown modes.
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* @note Pull-up set by PUy bit of PWR_PUCRx register is not activated if the corresponding
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* PDy bit of PWR_PDCRx register is also set (pull-down configuration priority is higher).
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* HAL_PWREx_EnableGPIOPullUp() and HAL_PWREx_EnableGPIOPullDown() APIs ensure there
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* is no conflict when setting PUy or PDy bit.
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* @retval None
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*/
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void HAL_PWREx_EnablePullUpPullDownConfig(void)
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{
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SET_BIT(PWR->CR3, PWR_CR3_APC);
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}
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/**
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* @brief Disable pull-up and pull-down configuration.
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* @note When APC bit is cleared, the I/O pull-up and pull-down configurations defined in
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* PWR_PUCRx and PWR_PDCRx registers are not applied in Standby and Shutdown modes.
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* @retval None
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*/
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void HAL_PWREx_DisablePullUpPullDownConfig(void)
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{
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CLEAR_BIT(PWR->CR3, PWR_CR3_APC);
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}
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#if defined(PWR_CR3_RRS)
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/**
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* @brief Enable SRAM content retention in Standby mode.
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* @note When RRS bit is set, SRAM is powered by the low-power regulator in
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* Standby mode and its content is kept.
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* @retval None
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*/
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void HAL_PWREx_EnableSRAMRetention(void)
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{
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SET_BIT(PWR->CR3, PWR_CR3_RRS);
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}
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/**
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* @brief Disable SRAM content retention in Standby mode.
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* @note When RRS bit is reset, SRAM is powered off in Standby mode
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* and its content is lost.
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* @retval None
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*/
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void HAL_PWREx_DisableSRAMRetention(void)
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{
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CLEAR_BIT(PWR->CR3, PWR_CR3_RRS);
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}
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#endif
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/**
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* @brief Enable Flash Power Down.
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* @note This API allows to enable flash power down capabilities in low power
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* run, low power sleep and stop modes.
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* @param PowerMode this can be a combination of following values:
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* @arg @ref PWR_FLASHPD_LPRUN
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* @arg @ref PWR_FLASHPD_LPSLEEP
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* @arg @ref PWR_FLASHPD_STOP
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* @retval None
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*/
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void HAL_PWREx_EnableFlashPowerDown(uint32_t PowerMode)
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{
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assert_param(IS_PWR_FLASH_POWERDOWN(PowerMode));
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PWR->CR1 |= PowerMode;
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}
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/**
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* @brief Disable Flash Power Down.
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* @note This API allows to disable flash power down capabilities in low power
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* run, low power sleep and stop modes.
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* @param PowerMode this can be a combination of following values:
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* @arg @ref PWR_FLASHPD_LPRUN
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* @arg @ref PWR_FLASHPD_LPSLEEP
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* @arg @ref PWR_FLASHPD_STOP
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* @retval None
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*/
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void HAL_PWREx_DisableFlashPowerDown(uint32_t PowerMode)
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{
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assert_param(IS_PWR_FLASH_POWERDOWN(PowerMode));
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PWR->CR1 &= ~PowerMode;
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}
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/**
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* @brief Return Voltage Scaling Range.
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* @retval VOS bit field : PWR_REGULATOR_VOLTAGE_RANGE1 or PWR_REGULATOR_VOLTAGE_RANGE2
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*/
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uint32_t HAL_PWREx_GetVoltageRange(void)
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{
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return (PWR->CR1 & PWR_CR1_VOS);
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}
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/**
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* @brief Configure the main regulator output voltage.
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* @param VoltageScaling specifies the regulator output voltage to achieve
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* a tradeoff between performance and power consumption.
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* This parameter can be one of the following values:
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* @arg @ref PWR_REGULATOR_VOLTAGE_SCALE1 Regulator voltage output range 1 mode,
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* typical output voltage at 1.2 V,
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* system frequency up to 64 MHz.
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* @arg @ref PWR_REGULATOR_VOLTAGE_SCALE2 Regulator voltage output range 2 mode,
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* typical output voltage at 1.0 V,
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* system frequency up to 16 MHz.
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* @note When moving from Range 1 to Range 2, the system frequency must be decreased to
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* a value below 16 MHz before calling HAL_PWREx_ControlVoltageScaling() API.
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* When moving from Range 2 to Range 1, the system frequency can be increased to
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* a value up to 64 MHz after calling HAL_PWREx_ControlVoltageScaling() API.
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* @note When moving from Range 2 to Range 1, the API waits for VOSF flag to be
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* cleared before returning the status. If the flag is not cleared within
|
|
* 6 microseconds, HAL_TIMEOUT status is reported.
|
|
* @retval HAL Status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling)
|
|
{
|
|
uint32_t wait_loop_index;
|
|
|
|
assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling));
|
|
|
|
/* Modify voltage scaling range */
|
|
MODIFY_REG(PWR->CR1, PWR_CR1_VOS, VoltageScaling);
|
|
|
|
/* In case of Range 1 selected, we need to ensure that main regulator reaches new value */
|
|
if(VoltageScaling == PWR_REGULATOR_VOLTAGE_SCALE1)
|
|
{
|
|
/* Set timeout value */
|
|
wait_loop_index = ((PWR_VOSF_SETTING_DELAY_6_US * SystemCoreClock ) / 1000000U) + 1U;
|
|
|
|
/* Wait until VOSF is reset */
|
|
while(HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF))
|
|
{
|
|
if(wait_loop_index != 0U)
|
|
{
|
|
wait_loop_index--;
|
|
}
|
|
else
|
|
{
|
|
return HAL_TIMEOUT;
|
|
}
|
|
}
|
|
}
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
* @brief Enter Low-power Run mode
|
|
* @note System clock frequency has to be decreased below 2 MHz before entering
|
|
* low power run mode
|
|
* @note In Low-power Run mode, all I/O pins keep the same state as in Run mode.
|
|
* @retval None
|
|
*/
|
|
void HAL_PWREx_EnableLowPowerRunMode(void)
|
|
{
|
|
/* Set Regulator parameter */
|
|
SET_BIT(PWR->CR1, PWR_CR1_LPR);
|
|
}
|
|
|
|
|
|
/**
|
|
* @brief Exit Low-power Run mode.
|
|
* @note Before HAL_PWREx_DisableLowPowerRunMode() completion, the function checks that
|
|
* REGLPF has been properly reset (otherwise, HAL_PWREx_DisableLowPowerRunMode
|
|
* returns HAL_TIMEOUT status). The system clock frequency can then be
|
|
* increased above 2 MHz.
|
|
* @retval HAL Status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PWREx_DisableLowPowerRunMode(void)
|
|
{
|
|
uint32_t wait_loop_index = ((PWR_REGLPF_SETTING_DELAY_6_US * SystemCoreClock ) / 1000000U) + 1U;
|
|
|
|
/* Clear LPR bit */
|
|
CLEAR_BIT(PWR->CR1, PWR_CR1_LPR);
|
|
|
|
/* Wait until REGLPF is reset */
|
|
while(HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF))
|
|
{
|
|
if(wait_loop_index != 0U)
|
|
{
|
|
wait_loop_index--;
|
|
}
|
|
else
|
|
{
|
|
return HAL_TIMEOUT;
|
|
}
|
|
}
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
|
|
#if defined(PWR_SHDW_SUPPORT)
|
|
/**
|
|
* @brief Enter Shutdown mode.
|
|
* @note In Shutdown mode, the PLL, the HSI, the LSI and the HSE oscillators are switched
|
|
* off. The voltage regulator is disabled and Vcore domain is powered off.
|
|
* SRAM and registers contents are lost except for registers in the Backup domain.
|
|
* The BOR is not available.
|
|
* @note The I/Os can be configured either with a pull-up or pull-down or can
|
|
* be kept in analog state.
|
|
* HAL_PWREx_EnableGPIOPullUp() and HAL_PWREx_EnableGPIOPullDown()
|
|
* respectively enable Pull Up and PullDown state.
|
|
* HAL_PWREx_DisableGPIOPullUp() & HAL_PWREx_DisableGPIOPullDown()
|
|
* disable the same. These states are effective in Standby mode only if
|
|
* APC bit is set through HAL_PWREx_EnablePullUpPullDownConfig() API.
|
|
* @retval None
|
|
|
|
* @retval None
|
|
*/
|
|
void HAL_PWREx_EnterSHUTDOWNMode(void)
|
|
{
|
|
/* Set Shutdown mode */
|
|
MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_LOWPOWERMODE_SHUTDOWN);
|
|
|
|
/* Set SLEEPDEEP bit of Cortex System Control Register */
|
|
SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
|
|
|
|
/* This option is used to ensure that store operations are completed */
|
|
#if defined ( __CC_ARM)
|
|
__force_stores();
|
|
#endif
|
|
|
|
/* Request Wait For Interrupt */
|
|
__WFI();
|
|
}
|
|
#endif
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#endif /* HAL_PWR_MODULE_ENABLED */
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|