294 lines
21 KiB
C
294 lines
21 KiB
C
/**
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* @file xmc_vadc_map.h
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* @date 2016-11-17
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*
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* @cond
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*********************************************************************************************************************
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* XMClib v2.1.12 - XMC Peripheral Driver Library
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*
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* Copyright (c) 2015-2017, Infineon Technologies AG
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,are permitted provided that the
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* following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided with the distribution.
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*
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* Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote
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* products derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with
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* Infineon Technologies AG dave@infineon.com).
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*********************************************************************************************************************
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*
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* Change History
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* --------------
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*
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* 2015-02-15:
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* - Initial version
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*
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* 2015-12-01:
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* - Added:
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* - XMC4300 device supported
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*
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* - Fixed:
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* - Wrong MACRO name corrected for XMC4200/4100 devices.
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* XMC_VADC_G3_SAMPLE renamed to XMC_VADC_G1_SAMPLE
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*
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* 2016-11-17:
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* - Fixed: Add missing support for XMC47000
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* - Fixed: Renamed XMC_CCU_41_ST2 to XMC_CCU_41_ST3
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* - Added: New macros equivalent to th existing ones but with better naming.
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* Old macros are kept for backward compatibility but they deprecated.
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* - Added: ECAT support for XMC48/43
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*
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* @endcond
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*
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*/
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#ifndef XMC_ADC_MAP_H
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#define XMC_ADC_MAP_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**********************************************************************************************************************
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* MACROS
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*********************************************************************************************************************/
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#if ( UC_FAMILY == XMC1 )
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/* Group request source Gating input connection mappings */
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#define XMC_CCU_40_ST3 XMC_VADC_REQ_GT_A /**< @deprecated use instead XMC_VADC_REQ_GT_CCU40_ST3 */
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#define XMC_CCU_40_ST2 XMC_VADC_REQ_GT_B /**< @deprecated use instead XMC_VADC_REQ_GT_CCU40_ST2 */
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#define XMC_CCU_40_ST1 XMC_VADC_REQ_GT_C /**< @deprecated use instead XMC_VADC_REQ_GT_CCU40_ST1 */
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#define XMC_CCU_40_ST0 XMC_VADC_REQ_GT_D /**< @deprecated use instead XMC_VADC_REQ_GT_CCU40_ST0 */
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#if (UC_SERIES != XMC12 && UC_SERIES != XMC11)
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#define XMC_CCU_80_ST3_A XMC_VADC_REQ_GT_E /**< @deprecated use instead XMC_VADC_REQ_GT_CCU80_ST3A */
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#define XMC_CCU_81_ST3 XMC_VADC_REQ_GT_F /**< @deprecated use instead XMC_VADC_REQ_GT_CCU80_ST3 */
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#endif
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#if (UC_SERIES != XMC13 && UC_SERIES != XMC11)
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#define XMC_LEDTS0_FN XMC_VADC_REQ_GT_I /**< @deprecated use instead XMC_VADC_REQ_GT_LEDTS0_FN */
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#define XMC_LEDTS1_FN XMC_VADC_REQ_GT_J /**< @deprecated use instead XMC_VADC_REQ_GT_LEDTS1_FN */
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#endif
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#define XMC_ERU_0_PDOUT2 XMC_VADC_REQ_GT_K /**< @deprecated use instead XMC_VADC_REQ_GT_ERU0_PDOUT2 */
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#define XMC_ERU_0_PDOUT3 XMC_VADC_REQ_GT_L /**< @deprecated use instead XMC_VADC_REQ_GT_ERU0_PDOUT3 */
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#if (UC_SERIES != XMC12 && UC_SERIES != XMC11)
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#define XMC_CCU_80_ST0 XMC_VADC_REQ_GT_M /**< @deprecated use instead XMC_VADC_REQ_GT_CCU80_ST0 */
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#define XMC_CCU_80_ST1 XMC_VADC_REQ_GT_N /**< @deprecated use instead XMC_VADC_REQ_GT_CCU80_ST1 */
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#endif
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#define XMC_ERU_0_PDOUT0 XMC_VADC_REQ_GT_O /**< @deprecated use instead XMC_VADC_REQ_GT_ERU0_PDOUT0 */
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#define XMC_ERU_0_PDOUT1 XMC_VADC_REQ_GT_P /**< @deprecated use instead XMC_VADC_REQ_GT_ERU0_PDOUT1 */
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/* Group request source Trigger input connection mappings */
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#define XMC_CCU_40_SR2 XMC_VADC_REQ_TR_A /**< @deprecated use instead XMC_VADC_REQ_TR_CCU40_SR2 */
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#define XMC_CCU_40_SR3 XMC_VADC_REQ_TR_B /**< @deprecated use instead XMC_VADC_REQ_TR_CCU40_SR3 */
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#if (UC_SERIES != XMC11)
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#define XMC_BCCU0_TRIGOUT XMC_VADC_REQ_TR_F /**< @deprecated use instead XMC_VADC_REQ_TR_BCCU0_TRIGOUT0, XMC_VADC_REQ_TR_G0_BCCU0_TRIGOUT0 or XMC_VADC_REQ_TR_G1_BCCU0_TRIGOUT1 */
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#endif
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#define XMC_ERU_0_IOUT2 XMC_VADC_REQ_TR_G /**< @deprecated use instead XMC_VADC_REQ_TR_ERU0_IOUT2 */
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#define XMC_ERU_0_IOUT3 XMC_VADC_REQ_TR_H /**< @deprecated use instead XMC_VADC_REQ_TR_ERU0_IOUT3 */
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#if (UC_SERIES != XMC12 && UC_SERIES != XMC11)
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#define XMC_CCU_80_SR2 XMC_VADC_REQ_TR_I /**< @deprecated use instead XMC_VADC_REQ_TR_CCU80_SR2 */
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#define XMC_CCU_80_SR3 XMC_VADC_REQ_TR_J /**< @deprecated use instead XMC_VADC_REQ_TR_CCU80_SR3 */
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#endif
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#define XMC_ERU_0_IOUT0 XMC_VADC_REQ_TR_M /**< @deprecated use instead XMC_VADC_REQ_TR_ERU0_IOUT0 */
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#define XMC_ERU_0_IOUT1 XMC_VADC_REQ_TR_N /**< @deprecated use instead XMC_VADC_REQ_TR_ERU0_IOUT1 */
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#if (UC_SERIES != XMC12 && UC_SERIES != XMC11)
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#define XMC_POSIF_0_SR1 XMC_VADC_REQ_TR_O /**< @deprecated use instead XMC_VADC_REQ_TR_POSIF0_SR1 */
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#endif
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#define XMC_REQ_GT_SEL XMC_VADC_REQ_TR_P /**< @deprecated use instead XMC_VADC_REQ_TR_REQ_GT_SEL */
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/* Group request source Gating input connection mappings */
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#define XMC_VADC_REQ_GT_CCU40_ST3 XMC_VADC_REQ_GT_A /**< VADC Gating input A */
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#define XMC_VADC_REQ_GT_CCU40_ST2 XMC_VADC_REQ_GT_B /**< VADC Gating input B */
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#define XMC_VADC_REQ_GT_CCU40_ST1 XMC_VADC_REQ_GT_C /**< VADC Gating input C */
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#define XMC_VADC_REQ_GT_CCU40_ST0 XMC_VADC_REQ_GT_D /**< VADC Gating input D */
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#if (UC_SERIES != XMC12 && UC_SERIES != XMC11)
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#define XMC_VADC_REQ_GT_CCU80_ST3A XMC_VADC_REQ_GT_E /**< VADC Gating input E */
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#define XMC_VADC_REQ_GT_CCU80_ST3 XMC_VADC_REQ_GT_F /**< VADC Gating input F */
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#endif
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#if (UC_SERIES != XMC13 && UC_SERIES != XMC11)
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#define XMC_VADC_REQ_GT_LEDTS0_FN XMC_VADC_REQ_GT_I /**< VADC Gating input I */
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#define XMC_VADC_REQ_GT_LEDTS1_FN XMC_VADC_REQ_GT_J /**< VADC Gating input J */
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#endif
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#define XMC_VADC_REQ_GT_ERU0_PDOUT2 XMC_VADC_REQ_GT_K /**< VADC Gating input K */
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#define XMC_VADC_REQ_GT_ERU0_PDOUT3 XMC_VADC_REQ_GT_L /**< VADC Gating input L */
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#if (UC_SERIES != XMC12 && UC_SERIES != XMC11)
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#define XMC_VADC_REQ_GT_CCU80_ST0 XMC_VADC_REQ_GT_M /**< VADC Gating input M */
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#define XMC_VADC_REQ_GT_CCU80_ST1 XMC_VADC_REQ_GT_N /**< VADC Gating input N */
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#endif
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#define XMC_VADC_REQ_GT_ERU0_PDOUT0 XMC_VADC_REQ_GT_O /**< VADC Gating input O */
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#define XMC_VADC_REQ_GT_ERU0_PDOUT1 XMC_VADC_REQ_GT_P /**< VADC Gating input P */
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/* Group request source Trigger input connection mappings */
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#define XMC_VADC_REQ_TR_CCU40_SR2 XMC_VADC_REQ_TR_A /**< VADC Trigger input A */
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#define XMC_VADC_REQ_TR_CCU40_SR3 XMC_VADC_REQ_TR_B /**< VADC Trigger input B */
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#if (UC_SERIES != XMC11)
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#define XMC_VADC_REQ_TR_BCCU0_TRIGOUT0 XMC_VADC_REQ_TR_F /**< VADC Global Background Source Trigger input F */
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#define XMC_VADC_REQ_TR_G0_BCCU0_TRIGOUT0 XMC_VADC_REQ_TR_F /**< VADC Group 0 Trigger input F */
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#define XMC_VADC_REQ_TR_G1_BCCU0_TRIGOUT1 XMC_VADC_REQ_TR_F /**< VADC Group1 Trigger input F */
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#endif
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#define XMC_VADC_REQ_TR_ERU0_IOUT2 XMC_VADC_REQ_TR_G /**< VADC Trigger input G */
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#define XMC_VADC_REQ_TR_ERU0_IOUT3 XMC_VADC_REQ_TR_H /**< VADC Trigger input H */
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#if (UC_SERIES != XMC12 && UC_SERIES != XMC11)
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#define XMC_VADC_REQ_TR_CCU80_SR2 XMC_VADC_REQ_TR_I /**< VADC Trigger input I */
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#define XMC_VADC_REQ_TR_CCU80_SR3 XMC_VADC_REQ_TR_J /**< VADC Trigger input J */
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#endif
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#define XMC_VADC_REQ_TR_ERU0_IOUT0 XMC_VADC_REQ_TR_M /**< VADC Trigger input M */
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#define XMC_VADC_REQ_TR_ERU0_IOUT1 XMC_VADC_REQ_TR_N /**< VADC Trigger input N */
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#if (UC_SERIES != XMC12 && UC_SERIES != XMC11)
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#define XMC_VADC_REQ_TR_POSIF0_SR1 XMC_VADC_REQ_TR_O /**< VADC Trigger input O */
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#endif
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#define XMC_VADC_REQ_TR_REQ_GT_SEL XMC_VADC_REQ_TR_P /**< VADC Trigger input P */
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#endif
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#if ( UC_FAMILY == XMC4 )
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/* Group request source Gating input connection mappings */
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#define XMC_CCU_40_ST3 XMC_VADC_REQ_GT_A /**< @deprecated use instead XMC_VADC_REQ_GT_CCU40_ST3 */
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#define XMC_CCU_41_ST3 XMC_VADC_REQ_GT_B /**< @deprecated use instead XMC_VADC_REQ_GT_CCU41_ST3 */
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#define XMC_CCU_40_SR0 XMC_VADC_REQ_GT_C /**< @deprecated use instead XMC_VADC_REQ_GT_CCU40_SR0 */
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#define XMC_CCU_41_SR1 XMC_VADC_REQ_GT_D /**< @deprecated use instead XMC_VADC_REQ_GT_CCU41_SR1 */
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#define XMC_CCU_80_ST3_A XMC_VADC_REQ_GT_E /**< @deprecated use instead XMC_VADC_REQ_GT_CCU80_ST3A */
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#define XMC_CCU_80_ST3_B XMC_VADC_REQ_GT_F /**< @deprecated use instead XMC_VADC_REQ_GT_CCU80_ST3B */
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#if ( (UC_SERIES != XMC43) && (UC_SERIES != XMC42) && (UC_SERIES != XMC41))
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#define XMC_CCU_81_ST3_A XMC_VADC_REQ_GT_G /**< @deprecated use instead XMC_VADC_REQ_GT_CCU81_ST3A */
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#define XMC_CCU_81_ST3_B XMC_VADC_REQ_GT_H /**< @deprecated use instead XMC_VADC_REQ_GT_CCU81_ST3B */
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#endif
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#define XMC_DAC_0_SGN XMC_VADC_REQ_GT_I /**< @deprecated use instead XMC_VADC_REQ_GT_DAC0_SGN, XMC_VADC_REQ_GT_G0_DAC0_SGN or XMC_VADC_REQ_GT_G2_DAC0_SGN */
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#define XMC_DAC_1_SGN XMC_VADC_REQ_GT_I /**< @deprecated use instead XMC_VADC_REQ_GT_DAC0_SGN, XMC_VADC_REQ_GT_G1_DAC1_SGN or XMC_VADC_REQ_GT_G3_DAC1_SGN */
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#define XMC_LEDTS_FN XMC_VADC_REQ_GT_J /**< @deprecated use instead XMC_VADC_REQ_GT_LEDTS_FN */
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#define XMC_VADC_G0_BLOUT0 XMC_VADC_REQ_GT_K /**< @deprecated use instead XMC_VADC_REQ_GT_VADC_G1BFLOUT0 or XMC_VADC_REQ_GT_G0_VADC_G1BFLOUT0 */
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#define XMC_VADC_G1_BLOUT0 XMC_VADC_REQ_GT_K /**< @deprecated use instead XMC_VADC_REQ_GT_VADC_G1BFLOUT0 or XMC_VADC_REQ_GT_G1_VADC_G0BFLOUT0 */
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#if ( (UC_SERIES != XMC43) && (UC_SERIES != XMC42) && (UC_SERIES != XMC41))
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#define XMC_VADC_G2_BLOUT0 XMC_VADC_REQ_GT_K /**< @deprecated use instead XMC_VADC_REQ_GT_VADC_G1BFLOUT0 or XMC_VADC_REQ_GT_G2_VADC_G3BFLOUT0 */
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#define XMC_VADC_G3_BLOUT0 XMC_VADC_REQ_GT_K /**< @deprecated use instead XMC_VADC_REQ_GT_VADC_G1BFLOUT0 or XMC_VADC_REQ_GT_G3_VADC_G2BFLOUT0 */
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#endif
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#define XMC_VADC_G0_SAMPLE XMC_VADC_REQ_GT_L /**< @deprecated use instead XMC_VADC_REQ_GT_G0_VADC_G3SAMPLE */
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#if ( (UC_SERIES != XMC43) && (UC_SERIES != XMC42) && (UC_SERIES != XMC41))
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#define XMC_VADC_G1_SAMPLE XMC_VADC_REQ_GT_L /**< @deprecated use instead XMC_VADC_REQ_GT_G1_VADC_G0SAMPLE */
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#define XMC_VADC_G2_SAMPLE XMC_VADC_REQ_GT_L /**< @deprecated use instead XMC_VADC_REQ_GT_G2_VADC_G1SAMPLE */
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#define XMC_VADC_G3_SAMPLE XMC_VADC_REQ_GT_L /**< @deprecated use instead XMC_VADC_REQ_GT_G3_VADC_G2SAMPLE */
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#endif
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#define XMC_CCU_80_SR0 XMC_VADC_REQ_GT_M /**< @deprecated use instead XMC_VADC_REQ_GT_CCU80_SR0 */
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#define XMC_CCU_80_SR1 XMC_VADC_REQ_GT_N /**< @deprecated use instead XMC_VADC_REQ_GT_CCU80_SR1 */
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#define XMC_ERU_1_PDOUT0 XMC_VADC_REQ_GT_O /**< @deprecated use instead XMC_VADC_REQ_GT_ERU1_PDOUT0 */
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#define XMC_ERU_1_PDOUT1 XMC_VADC_REQ_GT_P /**< @deprecated use instead XMC_VADC_REQ_GT_ERU1_PDOUT1 */
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/* Group request source Trigger input connection mappings */
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#define XMC_CCU_40_SR2 XMC_VADC_REQ_TR_A /**< @deprecated use instead XMC_VADC_REQ_TR_CCU40_SR2 */
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#define XMC_CCU_40_SR3 XMC_VADC_REQ_TR_B /**< @deprecated use instead XMC_VADC_REQ_TR_CCU40_SR3 */
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#define XMC_CCU_41_SR2 XMC_VADC_REQ_TR_C /**< @deprecated use instead XMC_VADC_REQ_TR_CCU41_SR2 */
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#define XMC_CCU_41_SR3 XMC_VADC_REQ_TR_D /**< @deprecated use instead XMC_VADC_REQ_TR_CCU41_SR3 */
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#if ( (UC_SERIES != XMC43) && (UC_SERIES != XMC42) && (UC_SERIES != XMC41))
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#define XMC_CCU_42_SR3 XMC_VADC_REQ_TR_E /**< @deprecated use instead XMC_VADC_REQ_TR_CCU42_SR3 */
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#define XMC_CCU_43_SR3 XMC_VADC_REQ_TR_F /**< @deprecated use instead XMC_VADC_REQ_TR_CCU43_SR3 */
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#endif
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#define XMC_CCU_80_SR2 XMC_VADC_REQ_TR_I /**< @deprecated use instead XMC_VADC_REQ_TR_CCU80_SR2 */
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#define XMC_CCU_80_SR3 XMC_VADC_REQ_TR_J /**< @deprecated use instead XMC_VADC_REQ_TR_CCU80_SR3 */
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#define XMC_CCU_81_SR2 XMC_VADC_REQ_TR_K /**< @deprecated use instead XMC_VADC_REQ_TR_CCU81_SR2 */
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#define XMC_CCU_81_SR3 XMC_VADC_REQ_TR_L /**< @deprecated use instead XMC_VADC_REQ_TR_CCU81_SR3 */
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#define XMC_ERU_1_IOUT0 XMC_VADC_REQ_TR_M /**< @deprecated use instead XMC_VADC_REQ_TR_ERU1_IOUT0 */
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#define XMC_ERU_1_IOUT1 XMC_VADC_REQ_TR_N /**< @deprecated use instead XMC_VADC_REQ_TR_ERU1_IOUT1, XMC_VADC_REQ_TR_G0_ERU1_IOUT1 or XMC_VADC_REQ_TR_G1_ERU1_IOUT1 */
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#define XMC_ERU_1_IOUT2 XMC_VADC_REQ_TR_N /**< @deprecated use instead XMC_VADC_REQ_TR_ERU1_IOUT1, XMC_VADC_REQ_TR_G2_ERU1_IOUT2 or XMC_VADC_REQ_TR_G3_ERU1_IOUT1 */
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#if ( (UC_SERIES != XMC43) )
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#define XMC_POSIF_0_SR1 XMC_VADC_REQ_TR_O /**< @deprecated use instead XMC_VADC_REQ_TR_POSIF0_SR1, XMC_VADC_REQ_TR_G0_POSIF0_SR1 or XMC_VADC_REQ_TR_G2_POSIF0_SR1 */
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#endif
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#if ( (UC_SERIES != XMC43) && (UC_SERIES != XMC42) && (UC_SERIES != XMC41))
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#define XMC_POSIF_1_SR1 XMC_VADC_REQ_TR_O /**< @deprecated use instead XMC_VADC_REQ_TR_POSIF0_SR1, XMC_VADC_REQ_TR_G1_POSIF0_SR1 or XMC_VADC_REQ_TR_G3_POSIF0_SR1 */
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#endif
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#define XMC_REQ_GT_SEL XMC_VADC_REQ_TR_P /**< @deprecated use instead XMC_VADC_REQ_GT_CCU40_ST3 */
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/* Group request source Gating input connection mappings */
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#define XMC_VADC_REQ_GT_CCU40_ST3 XMC_VADC_REQ_GT_A /**< VADC Gating input A */
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#define XMC_VADC_REQ_GT_CCU41_ST3 XMC_VADC_REQ_GT_B /**< VADC Gating input B */
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#define XMC_VADC_REQ_GT_CCU40_SR0 XMC_VADC_REQ_GT_C /**< VADC Gating input C */
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#define XMC_VADC_REQ_GT_CCU41_SR1 XMC_VADC_REQ_GT_D /**< VADC Gating input D */
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#define XMC_VADC_REQ_GT_CCU80_ST3A XMC_VADC_REQ_GT_E /**< VADC Gating input E */
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#define XMC_VADC_REQ_GT_CCU80_ST3B XMC_VADC_REQ_GT_F /**< VADC Gating input F */
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#if ( (UC_SERIES != XMC43) && (UC_SERIES != XMC42) && (UC_SERIES != XMC41))
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#define XMC_VADC_REQ_GT_CCU81_ST3A XMC_VADC_REQ_GT_G /**< VADC Gating input G */
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#define XMC_VADC_REQ_GT_CCU81_ST3B XMC_VADC_REQ_GT_H /**< VADC Gating input H */
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#endif
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#define XMC_VADC_REQ_GT_DAC0_SGN XMC_VADC_REQ_GT_I /**< VADC Global Background Source Gating input I */
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#define XMC_VADC_REQ_GT_G0_DAC0_SGN XMC_VADC_REQ_GT_I /**< VADC Group 0 Gating input I */
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#define XMC_VADC_REQ_GT_G1_DAC1_SGN XMC_VADC_REQ_GT_I /**< VADC Group 1 Gating input I */
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#define XMC_VADC_REQ_GT_G2_DAC0_SGN XMC_VADC_REQ_GT_I /**< VADC Group 2 Gating input I */
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#define XMC_VADC_REQ_GT_G3_DAC1_SGN XMC_VADC_REQ_GT_I /**< VADC Group 3 Gating input I */
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#define XMC_VADC_REQ_GT_LEDTS_FN XMC_VADC_REQ_GT_J /**< VADC Gating input J */
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#define XMC_VADC_REQ_GT_VADC_G1BFLOUT0 XMC_VADC_REQ_GT_K /**< VADC Global Background Source Gating input K */
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#define XMC_VADC_REQ_GT_G0_VADC_G1BFLOUT0 XMC_VADC_REQ_GT_K /**< VADC Group 0 Gating input K */
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#define XMC_VADC_REQ_GT_G1_VADC_G0BFLOUT0 XMC_VADC_REQ_GT_K /**< VADC Group 1 Gating input K */
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#if ( (UC_SERIES != XMC43) && (UC_SERIES != XMC42) && (UC_SERIES != XMC41))
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#define XMC_VADC_REQ_GT_G2_VADC_G3BFLOUT0 XMC_VADC_REQ_GT_K /**< VADC Group 2 Gating input K */
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#define XMC_VADC_REQ_GT_G3_VADC_G2BFLOUT0 XMC_VADC_REQ_GT_K /**< VADC Group 3 Gating input K */
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#endif
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#define XMC_VADC_REQ_GT_G0_VADC_G3SAMPLE XMC_VADC_REQ_GT_L /**< VADC Group 0 Gating input L */
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#if ( (UC_SERIES != XMC43) && (UC_SERIES != XMC42) && (UC_SERIES != XMC41))
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#define XMC_VADC_REQ_GT_G1_VADC_G0SAMPLE XMC_VADC_REQ_GT_L /**< VADC Group 1 Gating input L */
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#define XMC_VADC_REQ_GT_G2_VADC_G1SAMPLE XMC_VADC_REQ_GT_L /**< VADC Group 2 Gating input L */
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#define XMC_VADC_REQ_GT_G3_VADC_G2SAMPLE XMC_VADC_REQ_GT_L /**< VADC Group 3 Gating input L */
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#endif
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#define XMC_VADC_REQ_GT_CCU80_SR0 XMC_VADC_REQ_GT_M /**< VADC Gating input M */
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#define XMC_VADC_REQ_GT_CCU80_SR1 XMC_VADC_REQ_GT_N /**< VADC Gating input N */
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#define XMC_VADC_REQ_GT_ERU1_PDOUT0 XMC_VADC_REQ_GT_O /**< VADC Gating input O */
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#define XMC_VADC_REQ_GT_ERU1_PDOUT1 XMC_VADC_REQ_GT_P /**< VADC Gating input P */
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/* Group request source Trigger input connection mappings */
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#define XMC_VADC_REQ_TR_CCU40_SR2 XMC_VADC_REQ_TR_A /**< VADC Trigger input A */
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#define XMC_VADC_REQ_TR_CCU40_SR3 XMC_VADC_REQ_TR_B /**< VADC Trigger input B */
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#define XMC_VADC_REQ_TR_CCU41_SR2 XMC_VADC_REQ_TR_C /**< VADC Trigger input C */
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#define XMC_VADC_REQ_TR_CCU41_SR3 XMC_VADC_REQ_TR_D /**< VADC Trigger input D */
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#if ( (UC_SERIES != XMC43) && (UC_SERIES != XMC42) && (UC_SERIES != XMC41))
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#define XMC_VADC_REQ_TR_CCU42_SR3 XMC_VADC_REQ_TR_E /**< VADC Trigger input E */
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#define XMC_VADC_REQ_TR_CCU43_SR3 XMC_VADC_REQ_TR_F /**< VADC Trigger input F */
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#endif
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#if ((UC_SERIES == XMC48) || (UC_SERIES == XMC43))
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#define XMC_VADC_REQ_TR_ECAT_SYNC0 XMC_VADC_REQ_TR_G /**< VADC Trigger input G */
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#define XMC_VADC_REQ_TR_ECAT_SYNC1 XMC_VADC_REQ_TR_H /**< VADC Trigger input H */
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#endif
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#define XMC_VADC_REQ_TR_CCU80_SR2 XMC_VADC_REQ_TR_I /**< VADC Trigger input I */
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#define XMC_VADC_REQ_TR_CCU80_SR3 XMC_VADC_REQ_TR_J /**< VADC Trigger input J */
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#define XMC_VADC_REQ_TR_CCU81_SR2 XMC_VADC_REQ_TR_K /**< VADC Trigger input K */
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#define XMC_VADC_REQ_TR_CCU81_SR3 XMC_VADC_REQ_TR_L /**< VADC Trigger input L */
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#define XMC_VADC_REQ_TR_ERU1_IOUT0 XMC_VADC_REQ_TR_M /**< VADC Trigger input M */
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#define XMC_VADC_REQ_TR_ERU1_IOUT1 XMC_VADC_REQ_TR_M /**< VADC Global Background Source Trigger input N */
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#define XMC_VADC_REQ_TR_G0_ERU1_IOUT1 XMC_VADC_REQ_TR_N /**< VADC Group 0 Trigger input N */
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#define XMC_VADC_REQ_TR_G1_ERU1_IOUT1 XMC_VADC_REQ_TR_N /**< VADC Group 1 Trigger input N */
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#define XMC_VADC_REQ_TR_G2_ERU1_IOUT2 XMC_VADC_REQ_TR_N /**< VADC Group 2 Trigger input N */
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#define XMC_VADC_REQ_TR_G3_ERU1_IOUT2 XMC_VADC_REQ_TR_N /**< VADC Group 3 Trigger input N */
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#if ( (UC_SERIES != XMC43) )
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#define XMC_VADC_REQ_TR_POSIF0_SR1 XMC_VADC_REQ_TR_O /**< VADC Global Background Source Trigger input O */
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#define XMC_VADC_REQ_TR_G0_POSIF0_SR1 XMC_VADC_REQ_TR_O /**< VADC Group 0 Trigger input O */
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#define XMC_VADC_REQ_TR_G1_POSIF1_SR1 XMC_VADC_REQ_TR_O /**< VADC Group 1 Trigger input O */
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#endif
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#if ( (UC_SERIES != XMC43) && (UC_SERIES != XMC42) && (UC_SERIES != XMC41))
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#define XMC_VADC_REQ_TR_G2_POSIF0_SR1 XMC_VADC_REQ_TR_O /**< VADC Group 2 Trigger input O */
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#define XMC_VADC_REQ_TR_G3_POSIF1_SR1 XMC_VADC_REQ_TR_O /**< VADC Group 3 Trigger input O */
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#endif
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#define XMC_VADC_REQ_TR_REQ_GT_SEL XMC_VADC_REQ_TR_P /**< VADC Trigger input P */
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif
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