296 lines
15 KiB
C
296 lines
15 KiB
C
/**
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* @file xmc_eru.c
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* @date 2016-03-10
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*
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* @cond
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*********************************************************************************************************************
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* XMClib v2.1.12 - XMC Peripheral Driver Library
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*
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* Copyright (c) 2015-2017, Infineon Technologies AG
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,are permitted provided that the
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* following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided with the distribution.
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*
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* Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote
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* products derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with
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* Infineon Technologies AG dave@infineon.com).
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*********************************************************************************************************************
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*
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* Change History
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* --------------
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*
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* 2015-02-20:
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* - Initial <br>
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*
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* 2015-06-20:
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* - Removed definition of GetDriverVersion API <br>
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*
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* 2016-03-10:
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* - XMC_ERU_ETL_GetEdgeDetection() API is added to get the configured edge for event generation. <br>
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*
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* @endcond
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*/
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/*********************************************************************************************************************
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* HEADER FILES
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********************************************************************************************************************/
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#include "xmc_eru.h"
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/*********************************************************************************************************************
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* MACROS
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********************************************************************************************************************/
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#define ERU_EXISEL_BITSIZE (4UL) /* Used to set the input for path A and path B based on the channel */
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#define ERU_EXISEL_INPUT_BITSIZE (2UL)
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#define XMC_ERU_ETL_CHECK_INPUT_A(input) \
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((input == XMC_ERU_ETL_INPUT_A0) || \
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(input == XMC_ERU_ETL_INPUT_A1) || \
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(input == XMC_ERU_ETL_INPUT_A2) || \
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(input == XMC_ERU_ETL_INPUT_A3))
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#define XMC_ERU_ETL_CHECK_INPUT_B(input) \
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((input == XMC_ERU_ETL_INPUT_B0) || \
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(input == XMC_ERU_ETL_INPUT_B1) || \
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(input == XMC_ERU_ETL_INPUT_B2) || \
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(input == XMC_ERU_ETL_INPUT_B3))
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#define XMC_ERU_ETL_CHECK_STATUS_FLAG_MODE(mode) \
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((mode == XMC_ERU_ETL_STATUS_FLAG_MODE_SWCTRL) || \
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(mode == XMC_ERU_ETL_STATUS_FLAG_MODE_HWCTRL))
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#define XMC_ERU_ETL_CHECK_EVENT_SOURCE(source) \
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((source == XMC_ERU_ETL_SOURCE_A) || \
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(source == XMC_ERU_ETL_SOURCE_B) || \
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(source == XMC_ERU_ETL_SOURCE_A_OR_B) || \
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(source == XMC_ERU_ETL_SOURCE_A_AND_B) || \
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(source == XMC_ERU_ETL_SOURCE_NOT_A) || \
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(source == XMC_ERU_ETL_SOURCE_NOT_A_OR_B) || \
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(source == XMC_ERU_ETL_SOURCE_NOT_A_AND_B) || \
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(source == XMC_ERU_ETL_SOURCE_NOT_B) || \
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(source == XMC_ERU_ETL_SOURCE_A_OR_NOT_B) || \
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(source == XMC_ERU_ETL_SOURCE_A_AND_NOT_B) || \
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(source == XMC_ERU_ETL_SOURCE_NOT_A_OR_NOT_B) || \
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(source == XMC_ERU_ETL_SOURCE_NOT_A_AND_NOT_B))
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#define XMC_ERU_ETL_CHECK_TRIGGER_EDGE(edge) \
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((edge == XMC_ERU_ETL_EDGE_DETECTION_DISABLED) || \
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(edge == XMC_ERU_ETL_EDGE_DETECTION_RISING) || \
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(edge == XMC_ERU_ETL_EDGE_DETECTION_FALLING) || \
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(edge == XMC_ERU_ETL_EDGE_DETECTION_BOTH))
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#define XMC_ERU_ETL_CHECK_TRIGGER_CHANNEL(channel) \
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((channel == XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL0) || \
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(channel == XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL1) || \
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(channel == XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL2) || \
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(channel == XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL3))
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#define XMC_ERU_OGU_CHECK_PATTERN_INPUT(input) \
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((input == XMC_ERU_OGU_PATTERN_DETECTION_INPUT0) || \
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(input == XMC_ERU_OGU_PATTERN_DETECTION_INPUT1) || \
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(input == XMC_ERU_OGU_PATTERN_DETECTION_INPUT2) || \
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(input == XMC_ERU_OGU_PATTERN_DETECTION_INPUT3))
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#define XMC_ERU_OGU_CHECK_PERIPHERAL_TRIGGER(trigger) \
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((trigger == XMC_ERU_OGU_PERIPHERAL_TRIGGER1) || \
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(trigger == XMC_ERU_OGU_PERIPHERAL_TRIGGER2) || \
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(trigger == XMC_ERU_OGU_PERIPHERAL_TRIGGER3))
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#define XMC_ERU_OGU_CHECK_SERIVCE_REQUEST(service) \
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((service == XMC_ERU_OGU_SERVICE_REQUEST_DISABLED) || \
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(service == XMC_ERU_OGU_SERVICE_REQUEST_ON_TRIGGER) || \
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(service == XMC_ERU_OGU_SERVICE_REQUEST_ON_TRIGGER_AND_PATTERN_MATCH) || \
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(service == XMC_ERU_OGU_SERVICE_REQUEST_ON_TRIGGER_AND_PATTERN_MISMATCH))
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/*********************************************************************************************************************
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* API IMPLEMENTATION
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********************************************************************************************************************/
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/* Initializes the selected ERU_ETLx channel with the config structure. */
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void XMC_ERU_ETL_Init(XMC_ERU_t *const eru,
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const uint8_t channel,
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const XMC_ERU_ETL_CONFIG_t *const config)
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{
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XMC_ASSERT("XMC_ERU_ETL_Init:Invalid Module Pointer", XMC_ERU_CHECK_MODULE_PTR(eru));
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XMC_ASSERT("XMC_ERU_ETL_Init:Invalid Channel Number", (channel < 4U));
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XMC_ERU_Enable(eru);
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eru->EXISEL = (eru->EXISEL &
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~((uint32_t)(ERU_EXISEL_EXS0A_Msk | ERU_EXISEL_EXS0B_Msk) << (channel * ERU_EXISEL_BITSIZE))) |
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(config->input << (channel * (uint32_t)ERU_EXISEL_BITSIZE));
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eru->EXICON[channel] = config->raw;
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}
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/* Initializes the selected ERU_OGUy channel with the config structure. */
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void XMC_ERU_OGU_Init(XMC_ERU_t *const eru,
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const uint8_t channel,
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const XMC_ERU_OGU_CONFIG_t *const config)
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{
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XMC_ASSERT("XMC_ERU_OGU_Init:Invalid Module Pointer", XMC_ERU_CHECK_MODULE_PTR(eru));
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XMC_ASSERT("XMC_ERU_OGU_Init:Invalid Channel Number", (channel < 4U));
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XMC_ERU_Enable(eru);
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eru->EXOCON[channel] = config->raw;
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}
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/* Configures the event source for path A and path B, with selected input_a and input_b respectively.*/
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void XMC_ERU_ETL_SetInput(XMC_ERU_t *const eru,
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const uint8_t channel,
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const XMC_ERU_ETL_INPUT_A_t input_a,
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const XMC_ERU_ETL_INPUT_B_t input_b)
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{
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XMC_ASSERT("XMC_ERU_ETL_SetInput:Invalid Module Pointer", XMC_ERU_CHECK_MODULE_PTR(eru));
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XMC_ASSERT("XMC_ERU_ETL_SetInput:Invalid Channel Number", (channel < 4U));
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XMC_ASSERT("XMC_ERU_ETL_SetInput:Invalid A", XMC_ERU_ETL_CHECK_INPUT_A(input_a));
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XMC_ASSERT("XMC_ERU_ETL_SetInput:Invalid B", XMC_ERU_ETL_CHECK_INPUT_B(input_b));
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eru->EXISEL = (eru->EXISEL & ~((uint32_t)(ERU_EXISEL_EXS0A_Msk | ERU_EXISEL_EXS0B_Msk) << (channel * ERU_EXISEL_BITSIZE))) |
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(((uint32_t)input_a | (uint32_t)(input_b << ERU_EXISEL_INPUT_BITSIZE)) << (channel * ERU_EXISEL_BITSIZE));
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}
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/* Select input path combination along with polarity for event generation by setting (SS, NA, NB) bits of
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EXICONx(x = [0 to 3]) register */
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void XMC_ERU_ETL_SetSource(XMC_ERU_t *const eru,
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const uint8_t channel,
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const XMC_ERU_ETL_SOURCE_t source)
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{
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XMC_ASSERT("XMC_ERU_ETL_SetSource:Invalid Module Pointer", XMC_ERU_CHECK_MODULE_PTR(eru));
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XMC_ASSERT("XMC_ERU_ETL_SetSource:Invalid Channel Number", (channel < 4U));
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XMC_ASSERT("XMC_ERU_ETL_SetSource:Invalid Source", XMC_ERU_ETL_CHECK_EVENT_SOURCE(source));
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eru->EXICON_b[channel].SS = (uint8_t)source;
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}
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/* Configure event trigger edge/s by setting (RE, FE) bits of EXICONx(x = [0 to 3]) register.*/
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void XMC_ERU_ETL_SetEdgeDetection(XMC_ERU_t *const eru,
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const uint8_t channel,
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const XMC_ERU_ETL_EDGE_DETECTION_t edge_detection)
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{
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XMC_ASSERT("XMC_ERU_ETL_SetEdgeDetection:Invalid Module Pointer", XMC_ERU_CHECK_MODULE_PTR(eru));
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XMC_ASSERT("XMC_ERU_ETL_SetEdgeDetection:Invalid Channel Number", (channel < 4U));
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XMC_ASSERT("XMC_ERU_ETL_SetEdgeDetection:Invalid Trigger Edge", XMC_ERU_ETL_CHECK_TRIGGER_EDGE(edge_detection));
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eru->EXICON_b[channel].ED = (uint8_t)edge_detection;
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}
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/* Returns the configured event trigger edge/s by reading (RE, FE) bits of EXICONx(x = [0 to 3]) register. */
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XMC_ERU_ETL_EDGE_DETECTION_t XMC_ERU_ETL_GetEdgeDetection(XMC_ERU_t *const eru, const uint8_t channel)
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{
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XMC_ASSERT("XMC_ERU_ETL_GetEdgeDetection:Invalid Module Pointer", XMC_ERU_CHECK_MODULE_PTR(eru));
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XMC_ASSERT("XMC_ERU_ETL_GetEdgeDetection:Invalid Channel Number", (channel < 4U));
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return ((XMC_ERU_ETL_EDGE_DETECTION_t)(eru->EXICON_b[channel].ED));
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}
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/* Set the status flag bit(FL) in EXICONx(x = [0 to 3]). */
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void XMC_ERU_ETL_SetStatusFlagMode(XMC_ERU_t *const eru,
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const uint8_t channel,
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const XMC_ERU_ETL_STATUS_FLAG_MODE_t mode)
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{
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XMC_ASSERT("XMC_ERU_ETL_SetStatusFlagMode:Invalid Module Pointer", XMC_ERU_CHECK_MODULE_PTR(eru));
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XMC_ASSERT("XMC_ERU_ETL_SetStatusFlagMode:Invalid Channel Number", (channel < 4U));
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XMC_ASSERT("XMC_ERU_ETL_SetStatusFlagMode:Invalid Status Flag Mode", XMC_ERU_ETL_CHECK_STATUS_FLAG_MODE(mode));
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eru->EXICON_b[channel].LD = (uint8_t)mode;
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}
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/* Configure which Channel of OGUy(Output gating unit y = [0 to 3]) to be mapped by the trigger pulse generated by
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* ETLx(Event Trigger Logic, x = [0 to 3]) by setting (OCS and PE) bit fields. */
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void XMC_ERU_ETL_EnableOutputTrigger(XMC_ERU_t *const eru,
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const uint8_t channel,
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const XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL_t trigger)
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{
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XMC_ASSERT("XMC_ERU_ETL_EnableOutputTrigger:Invalid Module Pointer", XMC_ERU_CHECK_MODULE_PTR(eru));
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XMC_ASSERT("XMC_ERU_ETL_EnableOutputTrigger:Invalid Channel Number", (channel < 4U));
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XMC_ASSERT("XMC_ERU_ETL_EnableOutputTrigger:Invalid Output Channel", XMC_ERU_ETL_CHECK_TRIGGER_CHANNEL(trigger));
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eru->EXICON_b[channel].OCS = (uint8_t)trigger;
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eru->EXICON_b[channel].PE = (uint8_t)true;
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}
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/* Disables the trigger pulse generation by clearing the (PE) of the EXICONx(x = [0 to 3]). */
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void XMC_ERU_ETL_DisableOutputTrigger(XMC_ERU_t *const eru, const uint8_t channel)
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{
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XMC_ASSERT("XMC_ERU_ETL_DisableOutputTrigger:Invalid Module Pointer", XMC_ERU_CHECK_MODULE_PTR(eru));
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XMC_ASSERT("XMC_ERU_ETL_DisableOutputTrigger:Invalid Channel Number", (channel < 4U));
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eru->EXICON_b[channel].PE = false;
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}
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/* Configures ERU_ETLx(x = [0 to 3]) for pattern match detection by setting IPENx(x = [0 to 3) and GEEN bits. */
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void XMC_ERU_OGU_EnablePatternDetection(XMC_ERU_t *const eru,
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const uint8_t channel,
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const XMC_ERU_OGU_PATTERN_DETECTION_INPUT_t input)
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{
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XMC_ASSERT("XMC_ERU_OGU_EnablePatternDetection:Invalid Module Pointer", XMC_ERU_CHECK_MODULE_PTR(eru));
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XMC_ASSERT("XMC_ERU_OGU_EnablePatternDetection:Invalid Channel Number", (channel < 4U));
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XMC_ASSERT("XMC_ERU_OGU_EnablePatternDetection:Invalid Pattern input", XMC_ERU_OGU_CHECK_PATTERN_INPUT(input));
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eru->EXOCON_b[channel].IPEN = (uint8_t)input;
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eru->EXOCON_b[channel].GEEN = true;
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}
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/* Disable the pattern detection by clearing (GEEN) bit. */
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void XMC_ERU_OGU_DisablePatternDetection(XMC_ERU_t *const eru, const uint8_t channel)
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{
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XMC_ASSERT("XMC_ERU_OGU_DisablePatternDetection:Invalid Module Pointer", XMC_ERU_CHECK_MODULE_PTR(eru));
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XMC_ASSERT("XMC_ERU_OGU_DisablePatternDetection:Invalid Channel Number", (channel < 4U));
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eru->EXOCON_b[channel].GEEN = false;
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}
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/* Configures peripheral trigger input, by setting (ISS) bit. */
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void XMC_ERU_OGU_EnablePeripheralTrigger(XMC_ERU_t *const eru,
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const uint8_t channel,
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const XMC_ERU_OGU_PERIPHERAL_TRIGGER_t peripheral_trigger)
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{
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XMC_ASSERT("XMC_ERU_OGU_EnablePeripheralTrigger:Invalid Module Pointer", XMC_ERU_CHECK_MODULE_PTR(eru));
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XMC_ASSERT("XMC_ERU_OGU_EnablePeripheralTrigger:Invalid Channel Number", (channel < 4U));
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XMC_ASSERT("XMC_ERU_OGU_EnablePeripheralTrigger:Invalid Peripheral Trigger Input",
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XMC_ERU_OGU_CHECK_PERIPHERAL_TRIGGER(peripheral_trigger));
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eru->EXOCON_b[channel].ISS = (uint8_t)peripheral_trigger;
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}
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/* Disables event generation based on peripheral trigger by clearing (ISS) bit. */
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void XMC_ERU_OGU_DisablePeripheralTrigger(XMC_ERU_t *const eru,
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const uint8_t channel)
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{
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XMC_ASSERT("XMC_ERU_OGU_DisablePeripheralTrigger:Invalid Module Pointer", XMC_ERU_CHECK_MODULE_PTR(eru));
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XMC_ASSERT("XMC_ERU_OGU_DisablePeripheralTrigger:Invalid Channel Number", (channel < 4U));
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eru->EXOCON_b[channel].ISS = (uint8_t)0;
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}
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/* Configures the gating scheme for service request generation by setting (GP) bit. */
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void XMC_ERU_OGU_SetServiceRequestMode(XMC_ERU_t *const eru,
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const uint8_t channel,
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const XMC_ERU_OGU_SERVICE_REQUEST_t mode)
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{
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XMC_ASSERT("XMC_ERU_OGU_SetServiceRequestMode:Invalid Module Pointer", XMC_ERU_CHECK_MODULE_PTR(eru));
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XMC_ASSERT("XMC_ERU_OGU_SetServiceRequestMode:Invalid Channel Number", (channel < 4U));
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XMC_ASSERT("XMC_ERU_OGU_SetServiceRequestMode:Invalid Service Request Mode", XMC_ERU_OGU_CHECK_SERIVCE_REQUEST(mode));
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eru->EXOCON_b[channel].GP = (uint8_t)mode;
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}
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