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cns3xxx: fix register for enabling MMC/SD pins 

also fixes a GPIO related regression from the upgrade to 3.10

Signed-off-by: Felix Fietkau <nbd@openwrt.org>

Backport of r42829

git-svn-id: svn://svn.openwrt.org/openwrt/branches/barrier_breaker@42845 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
nbd 2014-10-08 10:29:27 +00:00
parent a292e3b8bc
commit 782f6129ec
1 changed files with 1 additions and 2 deletions
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3
target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/laguna.c
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@ -818,8 +818,7 @@ static void __init laguna_init(void)
*reg |= BIT(12) | BIT(13);
/* Enable MMC/SD pins */
reg = MISC_GPIOA_PIN_ENABLE_REG;
*reg |= 0xf80;
*reg |= BIT(7) | BIT(8) | BIT(9) | BIT(10) | BIT(11);
cns3xxx_pwr_clk_en(1 << PM_CLK_GATE_REG_OFFSET_SPI_PCM_I2C);
cns3xxx_pwr_power_up(1 << PM_CLK_GATE_REG_OFFSET_SPI_PCM_I2C);