BB: remove all kernel versions except for 3.10
Signed-off-by: Felix Fietkau <nbd@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/branches/barrier_breaker@41877 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
parent
52bcebc3b2
commit
fe64250423
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@ -2,27 +2,9 @@
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LINUX_RELEASE?=1
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ifeq ($(LINUX_VERSION),3.3.8)
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LINUX_KERNEL_MD5SUM:=f1058f64eed085deb44f10cee8541d50
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endif
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ifeq ($(LINUX_VERSION),3.6.11)
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LINUX_KERNEL_MD5SUM:=3d602ad7f7984509c3e923a5ae90bc54
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endif
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ifeq ($(LINUX_VERSION),3.8.13)
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LINUX_KERNEL_MD5SUM:=2af19d06cd47ec459519159cdd10542d
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endif
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ifeq ($(LINUX_VERSION),3.9.11)
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LINUX_KERNEL_MD5SUM:=edbf88eb7f7d34dbd5d3887726790755
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endif
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ifeq ($(LINUX_VERSION),3.10.49)
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LINUX_KERNEL_MD5SUM:=9774e12764e740d49c80eda77d0ef3eb
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endif
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ifeq ($(LINUX_VERSION),3.13.7)
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LINUX_KERNEL_MD5SUM:=370adced5e5c1cb1d0d621c2dae2723f
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endif
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ifeq ($(LINUX_VERSION),3.14.12)
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LINUX_KERNEL_MD5SUM:=7e76da2910683fe4dfbcec6ebfdd9a32
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endif
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# disable the md5sum check for unknown kernel versions
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LINUX_KERNEL_MD5SUM?=x
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@ -1,123 +0,0 @@
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CONFIG_ADM6996_PHY=y
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CONFIG_AR8216_PHY=y
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CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
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CONFIG_ARCH_DISCARD_MEMBLOCK=y
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CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
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CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
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CONFIG_ARCH_HIBERNATION_POSSIBLE=y
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CONFIG_ARCH_REQUIRE_GPIOLIB=y
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CONFIG_ARCH_SUSPEND_POSSIBLE=y
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CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
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CONFIG_ATHEROS_AR2315=y
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CONFIG_ATHEROS_AR2315_PCI=y
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CONFIG_ATHEROS_AR231X=y
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CONFIG_ATHEROS_AR5312=y
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CONFIG_ATHEROS_WDT=y
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CONFIG_CC_OPTIMIZE_FOR_SIZE=y
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CONFIG_CEVT_R4K=y
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CONFIG_CEVT_R4K_LIB=y
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CONFIG_CMDLINE="console=ttyS0,9600 rootfstype=squashfs,jffs2"
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CONFIG_CMDLINE_BOOL=y
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# CONFIG_CMDLINE_OVERRIDE is not set
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CONFIG_CPU_BIG_ENDIAN=y
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CONFIG_CPU_GENERIC_DUMP_TLB=y
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CONFIG_CPU_HAS_PREFETCH=y
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CONFIG_CPU_HAS_SYNC=y
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CONFIG_CPU_MIPS32=y
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CONFIG_CPU_MIPS32_R1=y
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CONFIG_CPU_MIPSR1=y
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CONFIG_CPU_R4K_CACHE_TLB=y
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CONFIG_CPU_R4K_FPU=y
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CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
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CONFIG_CPU_SUPPORTS_HIGHMEM=y
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CONFIG_CSRC_R4K=y
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CONFIG_CSRC_R4K_LIB=y
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CONFIG_DECOMPRESS_LZMA=y
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CONFIG_DMA_NONCOHERENT=y
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CONFIG_EARLY_PRINTK=y
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CONFIG_ETHERNET_PACKET_MANGLE=y
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CONFIG_GENERIC_ATOMIC64=y
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CONFIG_GENERIC_CLOCKEVENTS=y
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CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
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CONFIG_GENERIC_CMOS_UPDATE=y
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CONFIG_GENERIC_GPIO=y
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CONFIG_GENERIC_IO=y
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CONFIG_GENERIC_IRQ_SHOW=y
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CONFIG_GENERIC_PCI_IOMAP=y
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CONFIG_GENERIC_SMP_IDLE_THREAD=y
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CONFIG_GPIOLIB=y
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CONFIG_GPIO_SYSFS=y
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# CONFIG_HAMRADIO is not set
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CONFIG_HARDWARE_WATCHPOINTS=y
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CONFIG_HAS_DMA=y
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CONFIG_HAS_IOMEM=y
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CONFIG_HAS_IOPORT=y
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CONFIG_HAVE_ARCH_JUMP_LABEL=y
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CONFIG_HAVE_ARCH_KGDB=y
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CONFIG_HAVE_C_RECORDMCOUNT=y
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CONFIG_HAVE_DEBUG_KMEMLEAK=y
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CONFIG_HAVE_DMA_API_DEBUG=y
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CONFIG_HAVE_DMA_ATTRS=y
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CONFIG_HAVE_DYNAMIC_FTRACE=y
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CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
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CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
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CONFIG_HAVE_FUNCTION_TRACER=y
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CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
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CONFIG_HAVE_GENERIC_DMA_COHERENT=y
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CONFIG_HAVE_GENERIC_HARDIRQS=y
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CONFIG_HAVE_IDE=y
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CONFIG_HAVE_IRQ_WORK=y
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CONFIG_HAVE_MEMBLOCK=y
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CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
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CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
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CONFIG_HAVE_OPROFILE=y
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CONFIG_HAVE_PERF_EVENTS=y
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CONFIG_HW_HAS_PCI=y
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CONFIG_HW_RANDOM=y
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CONFIG_IMAGE_CMDLINE_HACK=y
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CONFIG_INITRAMFS_SOURCE=""
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CONFIG_IP17XX_PHY=y
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CONFIG_IRQ_CPU=y
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CONFIG_IRQ_FORCED_THREADING=y
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CONFIG_LEDS_GPIO=y
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CONFIG_MDIO_BOARDINFO=y
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CONFIG_MIPS=y
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CONFIG_MIPS_L1_CACHE_SHIFT=5
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# CONFIG_MIPS_MACHINE is not set
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CONFIG_MIPS_MT_DISABLED=y
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CONFIG_MODULES_USE_ELF_REL=y
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CONFIG_MTD_AR2315=y
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CONFIG_MTD_CFI_ADV_OPTIONS=y
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# CONFIG_MTD_CFI_GEOMETRY is not set
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# CONFIG_MTD_CFI_INTELEXT is not set
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CONFIG_MTD_MYLOADER_PARTS=y
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CONFIG_MTD_PHYSMAP=y
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CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-3
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CONFIG_MTD_REDBOOT_PARTS=y
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CONFIG_MVSWITCH_PHY=y
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CONFIG_NEED_DMA_MAP_STATE=y
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CONFIG_NEED_PER_CPU_KM=y
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CONFIG_NET_VENDOR_AR231X=y
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CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
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CONFIG_PAGEFLAGS_EXTENDED=y
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CONFIG_PCI=y
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CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
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CONFIG_PCI_DOMAINS=y
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CONFIG_PERF_USE_VMALLOC=y
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CONFIG_PHYLIB=y
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# CONFIG_PREEMPT_RCU is not set
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# CONFIG_SCSI_DMA is not set
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CONFIG_SERIAL_8250_NR_UARTS=1
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CONFIG_SERIAL_8250_RUNTIME_UARTS=1
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# CONFIG_SWAP is not set
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CONFIG_SWCONFIG=y
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CONFIG_SYS_HAS_CPU_MIPS32_R1=y
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CONFIG_SYS_HAS_EARLY_PRINTK=y
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CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
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CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
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CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
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CONFIG_TICK_CPU_ACCOUNTING=y
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CONFIG_UIDGID_CONVERTED=y
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CONFIG_USB_ARCH_HAS_XHCI=y
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CONFIG_USB_SUPPORT=y
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CONFIG_ZONE_DMA_FLAG=0
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@ -1,39 +0,0 @@
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Fix the usage of get_c0_compare_int: override cp0_compare_irq if the returned
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value is in the MIPS CPU IRQ range to ensure that c0_compare_int_usable()
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still works.
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
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--- a/arch/mips/kernel/cevt-r4k.c
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+++ b/arch/mips/kernel/cevt-r4k.c
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@@ -173,20 +173,23 @@ int __cpuinit r4k_clockevent_init(void)
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struct clock_event_device *cd;
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unsigned int irq;
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- if (!cpu_has_counter || !mips_hpt_frequency)
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- return -ENXIO;
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-
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- if (!c0_compare_int_usable())
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- return -ENXIO;
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-
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/*
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* With vectored interrupts things are getting platform specific.
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* get_c0_compare_int is a hook to allow a platform to return the
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* interrupt number of it's liking.
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*/
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irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
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- if (get_c0_compare_int)
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+ if (get_c0_compare_int) {
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irq = get_c0_compare_int();
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+ if ((irq >= MIPS_CPU_IRQ_BASE) && (irq < MIPS_CPU_IRQ_BASE + 8))
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+ cp0_compare_irq = irq - MIPS_CPU_IRQ_BASE;
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+ }
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+
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+ if (!cpu_has_counter || !mips_hpt_frequency)
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+ return -ENXIO;
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+
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+ if (!c0_compare_int_usable())
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+ return -ENXIO;
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cd = &per_cpu(mips_clockevent_device, cpu);
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File diff suppressed because it is too large
Load Diff
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@ -1,68 +0,0 @@
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--- /dev/null
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+++ b/arch/mips/ar231x/early_printk.c
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@@ -0,0 +1,44 @@
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+/*
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+ * This file is subject to the terms and conditions of the GNU General Public
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+ * License. See the file "COPYING" in the main directory of this archive
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+ * for more details.
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+ *
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+ * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
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+ */
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+
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+#include <linux/mm.h>
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+#include <linux/io.h>
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+#include <linux/serial_reg.h>
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+#include <asm/addrspace.h>
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+
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+#include <asm/mach-ar231x/ar2315_regs.h>
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+#include <asm/mach-ar231x/ar5312_regs.h>
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+#include "devices.h"
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+
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+static inline void prom_uart_wr(void __iomem *base, unsigned reg,
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+ unsigned char ch)
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+{
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+ __raw_writeb(ch, base + 4 * reg);
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+}
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+
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+static inline unsigned char prom_uart_rr(void __iomem *base, unsigned reg)
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+{
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+ return __raw_readb(base + 4 * reg);
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+}
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+
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+void prom_putchar(unsigned char ch)
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+{
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+ static void __iomem *base;
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+
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+ if (unlikely(base == NULL)) {
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+ if (is_2315())
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+ base = (void __iomem *)(KSEG1ADDR(AR2315_UART0));
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+ else
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+ base = (void __iomem *)(KSEG1ADDR(AR531X_UART0));
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+ }
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+
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+ while ((prom_uart_rr(base, UART_LSR) & UART_LSR_THRE) == 0);
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+ prom_uart_wr(base, UART_TX, ch);
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+ while ((prom_uart_rr(base, UART_LSR) & UART_LSR_THRE) == 0);
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+}
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+
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--- a/arch/mips/ar231x/Makefile
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+++ b/arch/mips/ar231x/Makefile
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@@ -9,5 +9,8 @@
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#
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obj-y += board.o prom.o devices.o
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+
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+obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
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+
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obj-$(CONFIG_ATHEROS_AR5312) += ar5312.o
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obj-$(CONFIG_ATHEROS_AR2315) += ar2315.o
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--- a/arch/mips/Kconfig
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+++ b/arch/mips/Kconfig
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@@ -145,6 +145,7 @@ config ATHEROS_AR231X
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select SYS_SUPPORTS_BIG_ENDIAN
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select SYS_SUPPORTS_32BIT_KERNEL
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select ARCH_REQUIRE_GPIOLIB
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+ select SYS_HAS_EARLY_PRINTK
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help
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Support for AR231x and AR531x based boards
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@ -1,294 +0,0 @@
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--- a/arch/mips/ar231x/Makefile
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+++ b/arch/mips/ar231x/Makefile
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@@ -14,3 +14,4 @@ obj-$(CONFIG_EARLY_PRINTK) += early_prin
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obj-$(CONFIG_ATHEROS_AR5312) += ar5312.o
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obj-$(CONFIG_ATHEROS_AR2315) += ar2315.o
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+obj-$(CONFIG_ATHEROS_AR2315_PCI) += pci.o
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--- /dev/null
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+++ b/arch/mips/ar231x/pci.c
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@@ -0,0 +1,230 @@
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+/*
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License
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+ * as published by the Free Software Foundation; either version 2
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+ * of the License, or (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
|
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+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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+ */
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+
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+#include <linux/types.h>
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+#include <linux/pci.h>
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+#include <linux/kernel.h>
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+#include <linux/init.h>
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+#include <linux/mm.h>
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+#include <linux/spinlock.h>
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+#include <linux/delay.h>
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+#include <linux/irq.h>
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+#include <asm/bootinfo.h>
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+#include <asm/paccess.h>
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+#include <asm/irq_cpu.h>
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+#include <asm/io.h>
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+#include <ar231x_platform.h>
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+#include <ar231x.h>
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+#include <ar2315_regs.h>
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+#include "devices.h"
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+
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+#define AR531X_MEM_BASE 0x80800000UL
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+#define AR531X_MEM_SIZE 0x00ffffffUL
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+#define AR531X_IO_SIZE 0x00007fffUL
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+
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+static unsigned long configspace;
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+
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+static int config_access(int devfn, int where, int size, u32 *ptr, bool write)
|
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+{
|
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+ unsigned long flags;
|
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+ int func = PCI_FUNC(devfn);
|
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+ int dev = PCI_SLOT(devfn);
|
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+ u32 value = 0;
|
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+ int err = 0;
|
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+ u32 addr;
|
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+
|
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+ if (((dev != 0) && (dev != 3)) || (func > 2))
|
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+ return PCIBIOS_DEVICE_NOT_FOUND;
|
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+
|
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+ /* Select Configuration access */
|
||||
+ local_irq_save(flags);
|
||||
+ ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, 0, AR2315_PCIMISC_CFG_SEL);
|
||||
+ mb();
|
||||
+
|
||||
+ addr = (u32) configspace + (1 << (13 + dev)) + (func << 8) + where;
|
||||
+ if (size == 1)
|
||||
+ addr ^= 0x3;
|
||||
+ else if (size == 2)
|
||||
+ addr ^= 0x2;
|
||||
+
|
||||
+ if (write) {
|
||||
+ value = *ptr;
|
||||
+ if (size == 1)
|
||||
+ err = put_dbe(value, (u8 *) addr);
|
||||
+ else if (size == 2)
|
||||
+ err = put_dbe(value, (u16 *) addr);
|
||||
+ else if (size == 4)
|
||||
+ err = put_dbe(value, (u32 *) addr);
|
||||
+ } else {
|
||||
+ if (size == 1)
|
||||
+ err = get_dbe(value, (u8 *) addr);
|
||||
+ else if (size == 2)
|
||||
+ err = get_dbe(value, (u16 *) addr);
|
||||
+ else if (size == 4)
|
||||
+ err = get_dbe(value, (u32 *) addr);
|
||||
+ if (err)
|
||||
+ *ptr = 0xffffffff;
|
||||
+ else
|
||||
+ *ptr = value;
|
||||
+ }
|
||||
+
|
||||
+ /* Select Memory access */
|
||||
+ ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, AR2315_PCIMISC_CFG_SEL, 0);
|
||||
+ local_irq_restore(flags);
|
||||
+
|
||||
+ return (err ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL);
|
||||
+}
|
||||
+
|
||||
+static int ar231x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 * value)
|
||||
+{
|
||||
+ return config_access(devfn, where, size, value, 0);
|
||||
+}
|
||||
+
|
||||
+static int ar231x_pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
|
||||
+{
|
||||
+ return config_access(devfn, where, size, &value, 1);
|
||||
+}
|
||||
+
|
||||
+struct pci_ops ar231x_pci_ops = {
|
||||
+ .read = ar231x_pci_read,
|
||||
+ .write = ar231x_pci_write,
|
||||
+};
|
||||
+
|
||||
+static struct resource ar231x_mem_resource = {
|
||||
+ .name = "AR531x PCI MEM",
|
||||
+ .start = AR531X_MEM_BASE,
|
||||
+ .end = AR531X_MEM_BASE + AR531X_MEM_SIZE - AR531X_IO_SIZE - 1 + 0x4000000,
|
||||
+ .flags = IORESOURCE_MEM,
|
||||
+};
|
||||
+
|
||||
+static struct resource ar231x_io_resource = {
|
||||
+ .name = "AR531x PCI I/O",
|
||||
+ .start = AR531X_MEM_BASE + AR531X_MEM_SIZE - AR531X_IO_SIZE,
|
||||
+ .end = AR531X_MEM_BASE + AR531X_MEM_SIZE - 1,
|
||||
+ .flags = IORESOURCE_IO,
|
||||
+};
|
||||
+
|
||||
+struct pci_controller ar231x_pci_controller = {
|
||||
+ .pci_ops = &ar231x_pci_ops,
|
||||
+ .mem_resource = &ar231x_mem_resource,
|
||||
+ .io_resource = &ar231x_io_resource,
|
||||
+ .mem_offset = 0x00000000UL,
|
||||
+ .io_offset = 0x00000000UL,
|
||||
+};
|
||||
+
|
||||
+int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
||||
+{
|
||||
+ return AR2315_IRQ_LCBUS_PCI;
|
||||
+}
|
||||
+
|
||||
+int pcibios_plat_dev_init(struct pci_dev *dev)
|
||||
+{
|
||||
+ pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 5);
|
||||
+ pci_write_config_word(dev, 0x40, 0);
|
||||
+
|
||||
+ /* Clear any pending Abort or external Interrupts
|
||||
+ * and enable interrupt processing */
|
||||
+ ar231x_mask_reg(AR2315_PCI_INTEN_REG, AR2315_PCI_INT_ENABLE, 0);
|
||||
+ ar231x_write_reg(AR2315_PCI_INT_STATUS, (AR2315_PCI_ABORT_INT | AR2315_PCI_EXT_INT));
|
||||
+ ar231x_write_reg(AR2315_PCI_INT_MASK, (AR2315_PCI_ABORT_INT | AR2315_PCI_EXT_INT));
|
||||
+ ar231x_mask_reg(AR2315_PCI_INTEN_REG, 0, AR2315_PCI_INT_ENABLE);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+ar2315_pci_fixup(struct pci_dev *dev)
|
||||
+{
|
||||
+ unsigned int devfn = dev->devfn;
|
||||
+
|
||||
+ if (dev->bus->number != 0)
|
||||
+ return;
|
||||
+
|
||||
+ /* Only fix up the PCI host settings */
|
||||
+ if ((PCI_SLOT(devfn) != 3) || (PCI_FUNC(devfn) != 0))
|
||||
+ return;
|
||||
+
|
||||
+ /* Fix up MBARs */
|
||||
+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, HOST_PCI_MBAR0);
|
||||
+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, HOST_PCI_MBAR1);
|
||||
+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_2, HOST_PCI_MBAR2);
|
||||
+ pci_write_config_dword(dev, PCI_COMMAND,
|
||||
+ PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_SPECIAL |
|
||||
+ PCI_COMMAND_INVALIDATE | PCI_COMMAND_PARITY | PCI_COMMAND_SERR |
|
||||
+ PCI_COMMAND_FAST_BACK);
|
||||
+}
|
||||
+DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, ar2315_pci_fixup);
|
||||
+
|
||||
+static int __init
|
||||
+ar2315_pci_init(void)
|
||||
+{
|
||||
+ u32 reg;
|
||||
+
|
||||
+ if (ar231x_devtype != DEV_TYPE_AR2315)
|
||||
+ return -ENODEV;
|
||||
+
|
||||
+ configspace = (unsigned long) ioremap_nocache(AR2315_PCIEXT, 1*1024*1024); /* Remap PCI config space */
|
||||
+ ar231x_pci_controller.io_map_base =
|
||||
+ (unsigned long) ioremap_nocache(AR531X_MEM_BASE + AR531X_MEM_SIZE, AR531X_IO_SIZE);
|
||||
+ set_io_port_base(ar231x_pci_controller.io_map_base); /* PCI I/O space */
|
||||
+
|
||||
+ reg = ar231x_mask_reg(AR2315_RESET, 0, AR2315_RESET_PCIDMA);
|
||||
+ msleep(10);
|
||||
+
|
||||
+ reg &= ~AR2315_RESET_PCIDMA;
|
||||
+ ar231x_write_reg(AR2315_RESET, reg);
|
||||
+ msleep(10);
|
||||
+
|
||||
+ ar231x_mask_reg(AR2315_ENDIAN_CTL, 0,
|
||||
+ AR2315_CONFIG_PCIAHB | AR2315_CONFIG_PCIAHB_BRIDGE);
|
||||
+
|
||||
+ ar231x_write_reg(AR2315_PCICLK, AR2315_PCICLK_PLLC_CLKM |
|
||||
+ (AR2315_PCICLK_IN_FREQ_DIV_6 << AR2315_PCICLK_DIV_S));
|
||||
+ ar231x_mask_reg(AR2315_AHB_ARB_CTL, 0, AR2315_ARB_PCI);
|
||||
+ ar231x_mask_reg(AR2315_IF_CTL, AR2315_IF_PCI_CLK_MASK | AR2315_IF_MASK,
|
||||
+ AR2315_IF_PCI | AR2315_IF_PCI_HOST | AR2315_IF_PCI_INTR |
|
||||
+ (AR2315_IF_PCI_CLK_OUTPUT_CLK << AR2315_IF_PCI_CLK_SHIFT));
|
||||
+
|
||||
+ /* Reset the PCI bus by setting bits 5-4 in PCI_MCFG */
|
||||
+ ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, AR2315_PCIMISC_RST_MODE,
|
||||
+ AR2315_PCIRST_LOW);
|
||||
+ msleep(100);
|
||||
+
|
||||
+ /* Bring the PCI out of reset */
|
||||
+ ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, AR2315_PCIMISC_RST_MODE,
|
||||
+ AR2315_PCIRST_HIGH | AR2315_PCICACHE_DIS | 0x8);
|
||||
+
|
||||
+ ar231x_write_reg(AR2315_PCI_UNCACHE_CFG,
|
||||
+ 0x1E | /* 1GB uncached */
|
||||
+ (1 << 5) | /* Enable uncached */
|
||||
+ (0x2 << 30) /* Base: 0x80000000 */
|
||||
+ );
|
||||
+ ar231x_read_reg(AR2315_PCI_UNCACHE_CFG);
|
||||
+
|
||||
+ msleep(500);
|
||||
+
|
||||
+ /* dirty hack - anyone with a datasheet that knows the memory map ? */
|
||||
+ ioport_resource.start = 0x10000000;
|
||||
+ ioport_resource.end = 0xffffffff;
|
||||
+ iomem_resource.start = 0x10000000;
|
||||
+ iomem_resource.end = 0xffffffff;
|
||||
+
|
||||
+ register_pci_controller(&ar231x_pci_controller);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+arch_initcall(ar2315_pci_init);
|
||||
--- a/arch/mips/ar231x/Kconfig
|
||||
+++ b/arch/mips/ar231x/Kconfig
|
||||
@@ -14,3 +14,10 @@ config ATHEROS_AR2315
|
||||
select SYS_SUPPORTS_32BIT_KERNEL
|
||||
select SYS_SUPPORTS_BIG_ENDIAN
|
||||
default y
|
||||
+
|
||||
+config ATHEROS_AR2315_PCI
|
||||
+ bool "PCI support"
|
||||
+ depends on ATHEROS_AR2315
|
||||
+ select HW_HAS_PCI
|
||||
+ select PCI
|
||||
+ default y
|
||||
--- a/arch/mips/ar231x/ar2315.c
|
||||
+++ b/arch/mips/ar231x/ar2315.c
|
||||
@@ -64,6 +64,27 @@ static inline void ar2315_gpio_irq(void)
|
||||
do_IRQ(AR531X_GPIO_IRQ_BASE + bit);
|
||||
}
|
||||
|
||||
+#ifdef CONFIG_ATHEROS_AR2315_PCI
|
||||
+static inline void pci_abort_irq(void)
|
||||
+{
|
||||
+ ar231x_write_reg(AR2315_PCI_INT_STATUS, AR2315_PCI_ABORT_INT);
|
||||
+}
|
||||
+
|
||||
+static inline void pci_ack_irq(void)
|
||||
+{
|
||||
+ ar231x_write_reg(AR2315_PCI_INT_STATUS, AR2315_PCI_EXT_INT);
|
||||
+}
|
||||
+
|
||||
+void ar2315_pci_irq(int irq)
|
||||
+{
|
||||
+ if (ar231x_read_reg(AR2315_PCI_INT_STATUS) == AR2315_PCI_ABORT_INT)
|
||||
+ pci_abort_irq();
|
||||
+ else {
|
||||
+ do_IRQ(irq);
|
||||
+ pci_ack_irq();
|
||||
+ }
|
||||
+}
|
||||
+#endif /* CONFIG_ATHEROS_AR2315_PCI */
|
||||
|
||||
/*
|
||||
* Called when an interrupt is received, this function
|
||||
@@ -82,6 +103,10 @@ ar2315_irq_dispatch(void)
|
||||
do_IRQ(AR2315_IRQ_WLAN0_INTRS);
|
||||
else if (pending & CAUSEF_IP4)
|
||||
do_IRQ(AR2315_IRQ_ENET0_INTRS);
|
||||
+#ifdef CONFIG_ATHEROS_AR2315_PCI
|
||||
+ else if (pending & CAUSEF_IP5)
|
||||
+ ar2315_pci_irq(AR2315_IRQ_LCBUS_PCI);
|
||||
+#endif
|
||||
else if (pending & CAUSEF_IP2) {
|
||||
unsigned int misc_intr = ar231x_read_reg(AR2315_ISR) & ar231x_read_reg(AR2315_IMR);
|
||||
|
File diff suppressed because it is too large
Load Diff
|
@ -1,662 +0,0 @@
|
|||
--- a/drivers/mtd/devices/Kconfig
|
||||
+++ b/drivers/mtd/devices/Kconfig
|
||||
@@ -136,6 +136,10 @@ config MTD_BCM47XXSFLASH
|
||||
registered by bcma as platform devices. This enables driver for
|
||||
serial flash memories (only read-only mode is implemented).
|
||||
|
||||
+config MTD_AR2315
|
||||
+ tristate "Atheros AR2315+ SPI Flash support"
|
||||
+ depends on ATHEROS_AR2315
|
||||
+
|
||||
config MTD_SLRAM
|
||||
tristate "Uncached system RAM"
|
||||
help
|
||||
--- a/drivers/mtd/devices/Makefile
|
||||
+++ b/drivers/mtd/devices/Makefile
|
||||
@@ -19,6 +19,7 @@ obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataf
|
||||
obj-$(CONFIG_MTD_M25P80) += m25p80.o
|
||||
obj-$(CONFIG_MTD_SPEAR_SMI) += spear_smi.o
|
||||
obj-$(CONFIG_MTD_SST25L) += sst25l.o
|
||||
+obj-$(CONFIG_MTD_AR2315) += ar2315.o
|
||||
obj-$(CONFIG_MTD_BCM47XXSFLASH) += bcm47xxsflash.o
|
||||
|
||||
-CFLAGS_docg3.o += -I$(src)
|
||||
\ No newline at end of file
|
||||
+CFLAGS_docg3.o += -I$(src)
|
||||
--- /dev/null
|
||||
+++ b/drivers/mtd/devices/ar2315.c
|
||||
@@ -0,0 +1,515 @@
|
||||
+
|
||||
+/*
|
||||
+ * MTD driver for the SPI Flash Memory support on Atheros AR2315
|
||||
+ *
|
||||
+ * Copyright (c) 2005-2006 Atheros Communications Inc.
|
||||
+ * Copyright (C) 2006-2007 FON Technology, SL.
|
||||
+ * Copyright (C) 2006-2007 Imre Kaloz <kaloz@openwrt.org>
|
||||
+ * Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
|
||||
+ * Copyright (C) 2012 Alexandros C. Couloumbis <alex@ozo.com>
|
||||
+ *
|
||||
+ * This code is free software; you can redistribute it and/or modify
|
||||
+ * it under the terms of the GNU General Public License version 2 as
|
||||
+ * published by the Free Software Foundation.
|
||||
+ *
|
||||
+ */
|
||||
+
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/types.h>
|
||||
+#include <linux/version.h>
|
||||
+#include <linux/errno.h>
|
||||
+#include <linux/slab.h>
|
||||
+#include <linux/mtd/mtd.h>
|
||||
+#include <linux/mtd/partitions.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <linux/sched.h>
|
||||
+#include <linux/root_dev.h>
|
||||
+#include <linux/delay.h>
|
||||
+#include <asm/delay.h>
|
||||
+#include <asm/io.h>
|
||||
+
|
||||
+#include <ar2315_spiflash.h>
|
||||
+#include <ar231x_platform.h>
|
||||
+#include <ar231x.h>
|
||||
+
|
||||
+
|
||||
+#define SPIFLASH "spiflash: "
|
||||
+#define busy_wait(_priv, _condition, _wait) do { \
|
||||
+ while (_condition) { \
|
||||
+ spin_unlock_bh(&_priv->lock); \
|
||||
+ if (_wait > 1) \
|
||||
+ msleep(_wait); \
|
||||
+ else if ((_wait == 1) && need_resched()) \
|
||||
+ schedule(); \
|
||||
+ else \
|
||||
+ udelay(1); \
|
||||
+ spin_lock_bh(&_priv->lock); \
|
||||
+ } \
|
||||
+} while (0)
|
||||
+
|
||||
+enum {
|
||||
+ FLASH_NONE,
|
||||
+ FLASH_1MB,
|
||||
+ FLASH_2MB,
|
||||
+ FLASH_4MB,
|
||||
+ FLASH_8MB,
|
||||
+ FLASH_16MB,
|
||||
+};
|
||||
+
|
||||
+/* Flash configuration table */
|
||||
+struct flashconfig {
|
||||
+ u32 byte_cnt;
|
||||
+ u32 sector_cnt;
|
||||
+ u32 sector_size;
|
||||
+};
|
||||
+
|
||||
+const struct flashconfig flashconfig_tbl[] = {
|
||||
+ [FLASH_NONE] = { 0, 0, 0},
|
||||
+ [FLASH_1MB] = { STM_1MB_BYTE_COUNT, STM_1MB_SECTOR_COUNT, STM_1MB_SECTOR_SIZE},
|
||||
+ [FLASH_2MB] = { STM_2MB_BYTE_COUNT, STM_2MB_SECTOR_COUNT, STM_2MB_SECTOR_SIZE},
|
||||
+ [FLASH_4MB] = { STM_4MB_BYTE_COUNT, STM_4MB_SECTOR_COUNT, STM_4MB_SECTOR_SIZE},
|
||||
+ [FLASH_8MB] = { STM_8MB_BYTE_COUNT, STM_8MB_SECTOR_COUNT, STM_8MB_SECTOR_SIZE},
|
||||
+ [FLASH_16MB] = { STM_16MB_BYTE_COUNT, STM_16MB_SECTOR_COUNT, STM_16MB_SECTOR_SIZE}
|
||||
+};
|
||||
+
|
||||
+/* Mapping of generic opcodes to STM serial flash opcodes */
|
||||
+enum {
|
||||
+ SPI_WRITE_ENABLE,
|
||||
+ SPI_WRITE_DISABLE,
|
||||
+ SPI_RD_STATUS,
|
||||
+ SPI_WR_STATUS,
|
||||
+ SPI_RD_DATA,
|
||||
+ SPI_FAST_RD_DATA,
|
||||
+ SPI_PAGE_PROGRAM,
|
||||
+ SPI_SECTOR_ERASE,
|
||||
+ SPI_BULK_ERASE,
|
||||
+ SPI_DEEP_PWRDOWN,
|
||||
+ SPI_RD_SIG,
|
||||
+};
|
||||
+
|
||||
+struct opcodes {
|
||||
+ __u16 code;
|
||||
+ __s8 tx_cnt;
|
||||
+ __s8 rx_cnt;
|
||||
+};
|
||||
+const struct opcodes stm_opcodes[] = {
|
||||
+ [SPI_WRITE_ENABLE] = {STM_OP_WR_ENABLE, 1, 0},
|
||||
+ [SPI_WRITE_DISABLE] = {STM_OP_WR_DISABLE, 1, 0},
|
||||
+ [SPI_RD_STATUS] = {STM_OP_RD_STATUS, 1, 1},
|
||||
+ [SPI_WR_STATUS] = {STM_OP_WR_STATUS, 1, 0},
|
||||
+ [SPI_RD_DATA] = {STM_OP_RD_DATA, 4, 4},
|
||||
+ [SPI_FAST_RD_DATA] = {STM_OP_FAST_RD_DATA, 5, 0},
|
||||
+ [SPI_PAGE_PROGRAM] = {STM_OP_PAGE_PGRM, 8, 0},
|
||||
+ [SPI_SECTOR_ERASE] = {STM_OP_SECTOR_ERASE, 4, 0},
|
||||
+ [SPI_BULK_ERASE] = {STM_OP_BULK_ERASE, 1, 0},
|
||||
+ [SPI_DEEP_PWRDOWN] = {STM_OP_DEEP_PWRDOWN, 1, 0},
|
||||
+ [SPI_RD_SIG] = {STM_OP_RD_SIG, 4, 1},
|
||||
+};
|
||||
+
|
||||
+/* Driver private data structure */
|
||||
+struct spiflash_priv {
|
||||
+ struct mtd_info mtd;
|
||||
+ void *readaddr; /* memory mapped data for read */
|
||||
+ void *mmraddr; /* memory mapped register space */
|
||||
+ wait_queue_head_t wq;
|
||||
+ spinlock_t lock;
|
||||
+ int state;
|
||||
+};
|
||||
+
|
||||
+#define to_spiflash(_mtd) container_of(_mtd, struct spiflash_priv, mtd)
|
||||
+
|
||||
+enum {
|
||||
+ FL_READY,
|
||||
+ FL_READING,
|
||||
+ FL_ERASING,
|
||||
+ FL_WRITING
|
||||
+};
|
||||
+
|
||||
+/***************************************************************************************************/
|
||||
+
|
||||
+static u32
|
||||
+spiflash_read_reg(struct spiflash_priv *priv, int reg)
|
||||
+{
|
||||
+ return ar231x_read_reg((u32) priv->mmraddr + reg);
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+spiflash_write_reg(struct spiflash_priv *priv, int reg, u32 data)
|
||||
+{
|
||||
+ ar231x_write_reg((u32) priv->mmraddr + reg, data);
|
||||
+}
|
||||
+
|
||||
+static u32
|
||||
+spiflash_wait_busy(struct spiflash_priv *priv)
|
||||
+{
|
||||
+ u32 reg;
|
||||
+
|
||||
+ busy_wait(priv, (reg = spiflash_read_reg(priv, SPI_FLASH_CTL)) &
|
||||
+ SPI_CTL_BUSY, 0);
|
||||
+ return reg;
|
||||
+}
|
||||
+
|
||||
+static u32
|
||||
+spiflash_sendcmd (struct spiflash_priv *priv, int opcode, u32 addr)
|
||||
+{
|
||||
+ const struct opcodes *op;
|
||||
+ u32 reg, mask;
|
||||
+
|
||||
+ op = &stm_opcodes[opcode];
|
||||
+ reg = spiflash_wait_busy(priv);
|
||||
+ spiflash_write_reg(priv, SPI_FLASH_OPCODE,
|
||||
+ ((u32) op->code) | (addr << 8));
|
||||
+
|
||||
+ reg &= ~SPI_CTL_TX_RX_CNT_MASK;
|
||||
+ reg |= SPI_CTL_START | op->tx_cnt | (op->rx_cnt << 4);
|
||||
+
|
||||
+ spiflash_write_reg(priv, SPI_FLASH_CTL, reg);
|
||||
+ spiflash_wait_busy(priv);
|
||||
+
|
||||
+ if (!op->rx_cnt)
|
||||
+ return 0;
|
||||
+
|
||||
+ reg = spiflash_read_reg(priv, SPI_FLASH_DATA);
|
||||
+
|
||||
+ switch (op->rx_cnt) {
|
||||
+ case 1:
|
||||
+ mask = 0x000000ff;
|
||||
+ break;
|
||||
+ case 2:
|
||||
+ mask = 0x0000ffff;
|
||||
+ break;
|
||||
+ case 3:
|
||||
+ mask = 0x00ffffff;
|
||||
+ break;
|
||||
+ default:
|
||||
+ mask = 0xffffffff;
|
||||
+ break;
|
||||
+ }
|
||||
+ reg &= mask;
|
||||
+
|
||||
+ return reg;
|
||||
+}
|
||||
+
|
||||
+
|
||||
+/*
|
||||
+ * Probe SPI flash device
|
||||
+ * Function returns 0 for failure.
|
||||
+ * and flashconfig_tbl array index for success.
|
||||
+ */
|
||||
+static int
|
||||
+spiflash_probe_chip (struct spiflash_priv *priv)
|
||||
+{
|
||||
+ u32 sig;
|
||||
+ int flash_size;
|
||||
+
|
||||
+ /* Read the signature on the flash device */
|
||||
+ spin_lock_bh(&priv->lock);
|
||||
+ sig = spiflash_sendcmd(priv, SPI_RD_SIG, 0);
|
||||
+ spin_unlock_bh(&priv->lock);
|
||||
+
|
||||
+ switch (sig) {
|
||||
+ case STM_8MBIT_SIGNATURE:
|
||||
+ flash_size = FLASH_1MB;
|
||||
+ break;
|
||||
+ case STM_16MBIT_SIGNATURE:
|
||||
+ flash_size = FLASH_2MB;
|
||||
+ break;
|
||||
+ case STM_32MBIT_SIGNATURE:
|
||||
+ flash_size = FLASH_4MB;
|
||||
+ break;
|
||||
+ case STM_64MBIT_SIGNATURE:
|
||||
+ flash_size = FLASH_8MB;
|
||||
+ break;
|
||||
+ case STM_128MBIT_SIGNATURE:
|
||||
+ flash_size = FLASH_16MB;
|
||||
+ break;
|
||||
+ default:
|
||||
+ printk (KERN_WARNING SPIFLASH "Read of flash device signature failed!\n");
|
||||
+ return 0;
|
||||
+ }
|
||||
+
|
||||
+ return flash_size;
|
||||
+}
|
||||
+
|
||||
+
|
||||
+/* wait until the flash chip is ready and grab a lock */
|
||||
+static int spiflash_wait_ready(struct spiflash_priv *priv, int state)
|
||||
+{
|
||||
+ DECLARE_WAITQUEUE(wait, current);
|
||||
+
|
||||
+retry:
|
||||
+ spin_lock_bh(&priv->lock);
|
||||
+ if (priv->state != FL_READY) {
|
||||
+ set_current_state(TASK_UNINTERRUPTIBLE);
|
||||
+ add_wait_queue(&priv->wq, &wait);
|
||||
+ spin_unlock_bh(&priv->lock);
|
||||
+ schedule();
|
||||
+ remove_wait_queue(&priv->wq, &wait);
|
||||
+
|
||||
+ if(signal_pending(current))
|
||||
+ return 0;
|
||||
+
|
||||
+ goto retry;
|
||||
+ }
|
||||
+ priv->state = state;
|
||||
+
|
||||
+ return 1;
|
||||
+}
|
||||
+
|
||||
+static inline void spiflash_done(struct spiflash_priv *priv)
|
||||
+{
|
||||
+ priv->state = FL_READY;
|
||||
+ spin_unlock_bh(&priv->lock);
|
||||
+ wake_up(&priv->wq);
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+spiflash_wait_complete(struct spiflash_priv *priv, unsigned int timeout)
|
||||
+{
|
||||
+ busy_wait(priv, spiflash_sendcmd(priv, SPI_RD_STATUS, 0) &
|
||||
+ SPI_STATUS_WIP, timeout);
|
||||
+ spiflash_done(priv);
|
||||
+}
|
||||
+
|
||||
+
|
||||
+
|
||||
+static int
|
||||
+spiflash_erase (struct mtd_info *mtd, struct erase_info *instr)
|
||||
+{
|
||||
+ struct spiflash_priv *priv = to_spiflash(mtd);
|
||||
+ const struct opcodes *op;
|
||||
+ u32 temp, reg;
|
||||
+
|
||||
+ if (instr->addr + instr->len > mtd->size)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ if (!spiflash_wait_ready(priv, FL_ERASING))
|
||||
+ return -EINTR;
|
||||
+
|
||||
+ spiflash_sendcmd(priv, SPI_WRITE_ENABLE, 0);
|
||||
+ reg = spiflash_wait_busy(priv);
|
||||
+
|
||||
+ op = &stm_opcodes[SPI_SECTOR_ERASE];
|
||||
+ temp = ((u32)instr->addr << 8) | (u32)(op->code);
|
||||
+ spiflash_write_reg(priv, SPI_FLASH_OPCODE, temp);
|
||||
+
|
||||
+ reg &= ~SPI_CTL_TX_RX_CNT_MASK;
|
||||
+ reg |= op->tx_cnt | SPI_CTL_START;
|
||||
+ spiflash_write_reg(priv, SPI_FLASH_CTL, reg);
|
||||
+
|
||||
+ spiflash_wait_complete(priv, 20);
|
||||
+
|
||||
+ instr->state = MTD_ERASE_DONE;
|
||||
+ mtd_erase_callback(instr);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+spiflash_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
|
||||
+{
|
||||
+ struct spiflash_priv *priv = to_spiflash(mtd);
|
||||
+ u8 *read_addr;
|
||||
+
|
||||
+ if (!len)
|
||||
+ return 0;
|
||||
+
|
||||
+ if (from + len > mtd->size)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ *retlen = len;
|
||||
+
|
||||
+ if (!spiflash_wait_ready(priv, FL_READING))
|
||||
+ return -EINTR;
|
||||
+
|
||||
+ read_addr = (u8 *)(priv->readaddr + from);
|
||||
+ memcpy_fromio(buf, read_addr, len);
|
||||
+ spiflash_done(priv);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+spiflash_write (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u8 *buf)
|
||||
+{
|
||||
+ struct spiflash_priv *priv = to_spiflash(mtd);
|
||||
+ u32 opcode, bytes_left;
|
||||
+
|
||||
+ *retlen = 0;
|
||||
+
|
||||
+ if (!len)
|
||||
+ return 0;
|
||||
+
|
||||
+ if (to + len > mtd->size)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ bytes_left = len;
|
||||
+
|
||||
+ do {
|
||||
+ u32 read_len, reg, page_offset, spi_data = 0;
|
||||
+
|
||||
+ read_len = min(bytes_left, sizeof(u32));
|
||||
+
|
||||
+ /* 32-bit writes cannot span across a page boundary
|
||||
+ * (256 bytes). This types of writes require two page
|
||||
+ * program operations to handle it correctly. The STM part
|
||||
+ * will write the overflow data to the beginning of the
|
||||
+ * current page as opposed to the subsequent page.
|
||||
+ */
|
||||
+ page_offset = (to & (STM_PAGE_SIZE - 1)) + read_len;
|
||||
+
|
||||
+ if (page_offset > STM_PAGE_SIZE)
|
||||
+ read_len -= (page_offset - STM_PAGE_SIZE);
|
||||
+
|
||||
+ if (!spiflash_wait_ready(priv, FL_WRITING))
|
||||
+ return -EINTR;
|
||||
+
|
||||
+ spiflash_sendcmd(priv, SPI_WRITE_ENABLE, 0);
|
||||
+ spi_data = 0;
|
||||
+ switch (read_len) {
|
||||
+ case 4:
|
||||
+ spi_data |= buf[3] << 24;
|
||||
+ /* fall through */
|
||||
+ case 3:
|
||||
+ spi_data |= buf[2] << 16;
|
||||
+ /* fall through */
|
||||
+ case 2:
|
||||
+ spi_data |= buf[1] << 8;
|
||||
+ /* fall through */
|
||||
+ case 1:
|
||||
+ spi_data |= buf[0] & 0xff;
|
||||
+ break;
|
||||
+ default:
|
||||
+ break;
|
||||
+ }
|
||||
+
|
||||
+ spiflash_write_reg(priv, SPI_FLASH_DATA, spi_data);
|
||||
+ opcode = stm_opcodes[SPI_PAGE_PROGRAM].code |
|
||||
+ (to & 0x00ffffff) << 8;
|
||||
+ spiflash_write_reg(priv, SPI_FLASH_OPCODE, opcode);
|
||||
+
|
||||
+ reg = spiflash_read_reg(priv, SPI_FLASH_CTL);
|
||||
+ reg &= ~SPI_CTL_TX_RX_CNT_MASK;
|
||||
+ reg |= (read_len + 4) | SPI_CTL_START;
|
||||
+ spiflash_write_reg(priv, SPI_FLASH_CTL, reg);
|
||||
+
|
||||
+ spiflash_wait_complete(priv, 1);
|
||||
+
|
||||
+ bytes_left -= read_len;
|
||||
+ to += read_len;
|
||||
+ buf += read_len;
|
||||
+
|
||||
+ *retlen += read_len;
|
||||
+ } while (bytes_left != 0);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+
|
||||
+#if defined CONFIG_MTD_REDBOOT_PARTS || CONFIG_MTD_MYLOADER_PARTS
|
||||
+static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", "MyLoader", NULL };
|
||||
+#endif
|
||||
+
|
||||
+
|
||||
+static int
|
||||
+spiflash_probe(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct spiflash_priv *priv;
|
||||
+ struct mtd_info *mtd;
|
||||
+ int index;
|
||||
+ int result = 0;
|
||||
+
|
||||
+ priv = kzalloc(sizeof(struct spiflash_priv), GFP_KERNEL);
|
||||
+ spin_lock_init(&priv->lock);
|
||||
+ init_waitqueue_head(&priv->wq);
|
||||
+ priv->state = FL_READY;
|
||||
+ mtd = &priv->mtd;
|
||||
+
|
||||
+ priv->mmraddr = ioremap_nocache(SPI_FLASH_MMR, SPI_FLASH_MMR_SIZE);
|
||||
+ if (!priv->mmraddr) {
|
||||
+ printk(KERN_WARNING SPIFLASH "Failed to map flash device\n");
|
||||
+ goto error;
|
||||
+ }
|
||||
+
|
||||
+ index = spiflash_probe_chip(priv);
|
||||
+ if (!index) {
|
||||
+ printk (KERN_WARNING SPIFLASH "Found no serial flash device\n");
|
||||
+ goto error;
|
||||
+ }
|
||||
+
|
||||
+ priv->readaddr = ioremap_nocache(SPI_FLASH_READ, flashconfig_tbl[index].byte_cnt);
|
||||
+ if (!priv->readaddr) {
|
||||
+ printk (KERN_WARNING SPIFLASH "Failed to map flash device\n");
|
||||
+ goto error;
|
||||
+ }
|
||||
+
|
||||
+ platform_set_drvdata(pdev, priv);
|
||||
+ mtd->name = "spiflash";
|
||||
+ mtd->type = MTD_NORFLASH;
|
||||
+ mtd->flags = (MTD_CAP_NORFLASH|MTD_WRITEABLE);
|
||||
+ mtd->size = flashconfig_tbl[index].byte_cnt;
|
||||
+ mtd->erasesize = flashconfig_tbl[index].sector_size;
|
||||
+ mtd->writesize = 1;
|
||||
+ mtd->numeraseregions = 0;
|
||||
+ mtd->eraseregions = NULL;
|
||||
+ mtd->_erase = spiflash_erase;
|
||||
+ mtd->_read = spiflash_read;
|
||||
+ mtd->_write = spiflash_write;
|
||||
+ mtd->owner = THIS_MODULE;
|
||||
+
|
||||
+#if defined CONFIG_MTD_REDBOOT_PARTS || CONFIG_MTD_MYLOADER_PARTS
|
||||
+ /* parse redboot partitions */
|
||||
+
|
||||
+ result = mtd_device_parse_register(mtd, part_probe_types,
|
||||
+ NULL, NULL, 0);
|
||||
+#endif
|
||||
+
|
||||
+ return result;
|
||||
+
|
||||
+error:
|
||||
+ if (priv->mmraddr)
|
||||
+ iounmap(priv->mmraddr);
|
||||
+ kfree(priv);
|
||||
+ return -ENXIO;
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+spiflash_remove (struct platform_device *pdev)
|
||||
+{
|
||||
+ struct spiflash_priv *priv = platform_get_drvdata(pdev);
|
||||
+ struct mtd_info *mtd = &priv->mtd;
|
||||
+
|
||||
+ mtd_device_unregister(mtd);
|
||||
+ iounmap(priv->mmraddr);
|
||||
+ iounmap(priv->readaddr);
|
||||
+ kfree(priv);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+struct platform_driver spiflash_driver = {
|
||||
+ .driver.name = "spiflash",
|
||||
+ .probe = spiflash_probe,
|
||||
+ .remove = spiflash_remove,
|
||||
+};
|
||||
+
|
||||
+int __init
|
||||
+spiflash_init (void)
|
||||
+{
|
||||
+ return platform_driver_register(&spiflash_driver);
|
||||
+}
|
||||
+
|
||||
+void __exit
|
||||
+spiflash_exit (void)
|
||||
+{
|
||||
+ return platform_driver_unregister(&spiflash_driver);
|
||||
+}
|
||||
+
|
||||
+module_init (spiflash_init);
|
||||
+module_exit (spiflash_exit);
|
||||
+
|
||||
+MODULE_LICENSE("GPL");
|
||||
+MODULE_AUTHOR("OpenWrt.org, Atheros Communications Inc");
|
||||
+MODULE_DESCRIPTION("MTD driver for SPI Flash on Atheros SOC");
|
||||
+
|
||||
--- /dev/null
|
||||
+++ b/arch/mips/include/asm/mach-ar231x/ar2315_spiflash.h
|
||||
@@ -0,0 +1,116 @@
|
||||
+/*
|
||||
+ * SPI Flash Memory support header file.
|
||||
+ *
|
||||
+ * Copyright (c) 2005, Atheros Communications Inc.
|
||||
+ * Copyright (C) 2006 FON Technology, SL.
|
||||
+ * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
|
||||
+ * Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
|
||||
+ *
|
||||
+ * This code is free software; you can redistribute it and/or modify
|
||||
+ * it under the terms of the GNU General Public License version 2 as
|
||||
+ * published by the Free Software Foundation.
|
||||
+ *
|
||||
+ */
|
||||
+#ifndef __AR2315_SPIFLASH_H
|
||||
+#define __AR2315_SPIFLASH_H
|
||||
+
|
||||
+#define STM_PAGE_SIZE 256
|
||||
+
|
||||
+#define SFI_WRITE_BUFFER_SIZE 4
|
||||
+#define SFI_FLASH_ADDR_MASK 0x00ffffff
|
||||
+
|
||||
+#define STM_8MBIT_SIGNATURE 0x13
|
||||
+#define STM_M25P80_BYTE_COUNT 1048576
|
||||
+#define STM_M25P80_SECTOR_COUNT 16
|
||||
+#define STM_M25P80_SECTOR_SIZE 0x10000
|
||||
+
|
||||
+#define STM_16MBIT_SIGNATURE 0x14
|
||||
+#define STM_M25P16_BYTE_COUNT 2097152
|
||||
+#define STM_M25P16_SECTOR_COUNT 32
|
||||
+#define STM_M25P16_SECTOR_SIZE 0x10000
|
||||
+
|
||||
+#define STM_32MBIT_SIGNATURE 0x15
|
||||
+#define STM_M25P32_BYTE_COUNT 4194304
|
||||
+#define STM_M25P32_SECTOR_COUNT 64
|
||||
+#define STM_M25P32_SECTOR_SIZE 0x10000
|
||||
+
|
||||
+#define STM_64MBIT_SIGNATURE 0x16
|
||||
+#define STM_M25P64_BYTE_COUNT 8388608
|
||||
+#define STM_M25P64_SECTOR_COUNT 128
|
||||
+#define STM_M25P64_SECTOR_SIZE 0x10000
|
||||
+
|
||||
+#define STM_128MBIT_SIGNATURE 0x17
|
||||
+#define STM_M25P128_BYTE_COUNT 16777216
|
||||
+#define STM_M25P128_SECTOR_COUNT 256
|
||||
+#define STM_M25P128_SECTOR_SIZE 0x10000
|
||||
+
|
||||
+#define STM_1MB_BYTE_COUNT STM_M25P80_BYTE_COUNT
|
||||
+#define STM_1MB_SECTOR_COUNT STM_M25P80_SECTOR_COUNT
|
||||
+#define STM_1MB_SECTOR_SIZE STM_M25P80_SECTOR_SIZE
|
||||
+#define STM_2MB_BYTE_COUNT STM_M25P16_BYTE_COUNT
|
||||
+#define STM_2MB_SECTOR_COUNT STM_M25P16_SECTOR_COUNT
|
||||
+#define STM_2MB_SECTOR_SIZE STM_M25P16_SECTOR_SIZE
|
||||
+#define STM_4MB_BYTE_COUNT STM_M25P32_BYTE_COUNT
|
||||
+#define STM_4MB_SECTOR_COUNT STM_M25P32_SECTOR_COUNT
|
||||
+#define STM_4MB_SECTOR_SIZE STM_M25P32_SECTOR_SIZE
|
||||
+#define STM_8MB_BYTE_COUNT STM_M25P64_BYTE_COUNT
|
||||
+#define STM_8MB_SECTOR_COUNT STM_M25P64_SECTOR_COUNT
|
||||
+#define STM_8MB_SECTOR_SIZE STM_M25P64_SECTOR_SIZE
|
||||
+#define STM_16MB_BYTE_COUNT STM_M25P128_BYTE_COUNT
|
||||
+#define STM_16MB_SECTOR_COUNT STM_M25P128_SECTOR_COUNT
|
||||
+#define STM_16MB_SECTOR_SIZE STM_M25P128_SECTOR_SIZE
|
||||
+
|
||||
+/*
|
||||
+ * ST Microelectronics Opcodes for Serial Flash
|
||||
+ */
|
||||
+
|
||||
+#define STM_OP_WR_ENABLE 0x06 /* Write Enable */
|
||||
+#define STM_OP_WR_DISABLE 0x04 /* Write Disable */
|
||||
+#define STM_OP_RD_STATUS 0x05 /* Read Status */
|
||||
+#define STM_OP_WR_STATUS 0x01 /* Write Status */
|
||||
+#define STM_OP_RD_DATA 0x03 /* Read Data */
|
||||
+#define STM_OP_FAST_RD_DATA 0x0b /* Fast Read Data */
|
||||
+#define STM_OP_PAGE_PGRM 0x02 /* Page Program */
|
||||
+#define STM_OP_SECTOR_ERASE 0xd8 /* Sector Erase */
|
||||
+#define STM_OP_BULK_ERASE 0xc7 /* Bulk Erase */
|
||||
+#define STM_OP_DEEP_PWRDOWN 0xb9 /* Deep Power-Down Mode */
|
||||
+#define STM_OP_RD_SIG 0xab /* Read Electronic Signature */
|
||||
+
|
||||
+#define STM_STATUS_WIP 0x01 /* Write-In-Progress */
|
||||
+#define STM_STATUS_WEL 0x02 /* Write Enable Latch */
|
||||
+#define STM_STATUS_BP0 0x04 /* Block Protect 0 */
|
||||
+#define STM_STATUS_BP1 0x08 /* Block Protect 1 */
|
||||
+#define STM_STATUS_BP2 0x10 /* Block Protect 2 */
|
||||
+#define STM_STATUS_SRWD 0x80 /* Status Register Write Disable */
|
||||
+
|
||||
+/*
|
||||
+ * SPI Flash Interface Registers
|
||||
+ */
|
||||
+#define AR531XPLUS_SPI_READ 0x08000000
|
||||
+#define AR531XPLUS_SPI_MMR 0x11300000
|
||||
+#define AR531XPLUS_SPI_MMR_SIZE 12
|
||||
+
|
||||
+#define AR531XPLUS_SPI_CTL 0x00
|
||||
+#define AR531XPLUS_SPI_OPCODE 0x04
|
||||
+#define AR531XPLUS_SPI_DATA 0x08
|
||||
+
|
||||
+#define SPI_FLASH_READ AR531XPLUS_SPI_READ
|
||||
+#define SPI_FLASH_MMR AR531XPLUS_SPI_MMR
|
||||
+#define SPI_FLASH_MMR_SIZE AR531XPLUS_SPI_MMR_SIZE
|
||||
+#define SPI_FLASH_CTL AR531XPLUS_SPI_CTL
|
||||
+#define SPI_FLASH_OPCODE AR531XPLUS_SPI_OPCODE
|
||||
+#define SPI_FLASH_DATA AR531XPLUS_SPI_DATA
|
||||
+
|
||||
+#define SPI_CTL_START 0x00000100
|
||||
+#define SPI_CTL_BUSY 0x00010000
|
||||
+#define SPI_CTL_TXCNT_MASK 0x0000000f
|
||||
+#define SPI_CTL_RXCNT_MASK 0x000000f0
|
||||
+#define SPI_CTL_TX_RX_CNT_MASK 0x000000ff
|
||||
+#define SPI_CTL_SIZE_MASK 0x00060000
|
||||
+
|
||||
+#define SPI_CTL_CLK_SEL_MASK 0x03000000
|
||||
+#define SPI_OPCODE_MASK 0x000000ff
|
||||
+
|
||||
+#define SPI_STATUS_WIP STM_STATUS_WIP
|
||||
+
|
||||
+#endif
|
|
@ -1,227 +0,0 @@
|
|||
--- /dev/null
|
||||
+++ b/drivers/watchdog/ar2315-wtd.c
|
||||
@@ -0,0 +1,199 @@
|
||||
+/*
|
||||
+ * This program is free software; you can redistribute it and/or modify
|
||||
+ * it under the terms of the GNU General Public License as published by
|
||||
+ * the Free Software Foundation; either version 2 of the License, or
|
||||
+ * (at your option) any later version.
|
||||
+ *
|
||||
+ * This program is distributed in the hope that it will be useful,
|
||||
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+ * GNU General Public License for more details.
|
||||
+ *
|
||||
+ * You should have received a copy of the GNU General Public License
|
||||
+ * along with this program; if not, write to the Free Software
|
||||
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
+ *
|
||||
+ * Copyright (C) 2008 John Crispin <blogic@openwrt.org>
|
||||
+ * Based on EP93xx and ifxmips wdt driver
|
||||
+ */
|
||||
+
|
||||
+#include <linux/interrupt.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/moduleparam.h>
|
||||
+#include <linux/types.h>
|
||||
+#include <linux/miscdevice.h>
|
||||
+#include <linux/watchdog.h>
|
||||
+#include <linux/fs.h>
|
||||
+#include <linux/ioport.h>
|
||||
+#include <linux/notifier.h>
|
||||
+#include <linux/reboot.h>
|
||||
+#include <linux/init.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+
|
||||
+#include <asm/io.h>
|
||||
+#include <asm/uaccess.h>
|
||||
+#include <asm/addrspace.h>
|
||||
+#include <ar231x_platform.h>
|
||||
+#include <ar2315_regs.h>
|
||||
+#include <ar231x.h>
|
||||
+
|
||||
+#define CLOCK_RATE 40000000
|
||||
+#define HEARTBEAT(x) (x < 1 || x > 90)?(20):(x)
|
||||
+
|
||||
+static int wdt_timeout = 20;
|
||||
+static int started = 0;
|
||||
+static int in_use = 0;
|
||||
+
|
||||
+static void
|
||||
+ar2315_wdt_enable(void)
|
||||
+{
|
||||
+ ar231x_write_reg(AR2315_WD, wdt_timeout * CLOCK_RATE);
|
||||
+ ar231x_write_reg(AR2315_ISR, 0x80);
|
||||
+}
|
||||
+
|
||||
+static ssize_t
|
||||
+ar2315_wdt_write(struct file *file, const char __user *data, size_t len, loff_t *ppos)
|
||||
+{
|
||||
+ if(len)
|
||||
+ ar2315_wdt_enable();
|
||||
+ return len;
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+ar2315_wdt_open(struct inode *inode, struct file *file)
|
||||
+{
|
||||
+ if(in_use)
|
||||
+ return -EBUSY;
|
||||
+ ar2315_wdt_enable();
|
||||
+ in_use = started = 1;
|
||||
+ return nonseekable_open(inode, file);
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+ar2315_wdt_release(struct inode *inode, struct file *file)
|
||||
+{
|
||||
+ in_use = 0;
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static irqreturn_t
|
||||
+ar2315_wdt_interrupt(int irq, void *dev_id)
|
||||
+{
|
||||
+ if(started)
|
||||
+ {
|
||||
+ printk(KERN_CRIT "watchdog expired, rebooting system\n");
|
||||
+ emergency_restart();
|
||||
+ } else {
|
||||
+ ar231x_write_reg(AR2315_WDC, 0);
|
||||
+ ar231x_write_reg(AR2315_WD, 0);
|
||||
+ ar231x_write_reg(AR2315_ISR, 0x80);
|
||||
+ }
|
||||
+ return IRQ_HANDLED;
|
||||
+}
|
||||
+
|
||||
+static struct watchdog_info ident = {
|
||||
+ .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
|
||||
+ .identity = "ar2315 Watchdog",
|
||||
+};
|
||||
+
|
||||
+static long
|
||||
+ar2315_wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
|
||||
+{
|
||||
+ int new_wdt_timeout;
|
||||
+ int ret = -ENOIOCTLCMD;
|
||||
+
|
||||
+ switch(cmd)
|
||||
+ {
|
||||
+ case WDIOC_GETSUPPORT:
|
||||
+ ret = copy_to_user((struct watchdog_info __user *)arg, &ident, sizeof(ident)) ? -EFAULT : 0;
|
||||
+ break;
|
||||
+
|
||||
+ case WDIOC_KEEPALIVE:
|
||||
+ ar2315_wdt_enable();
|
||||
+ ret = 0;
|
||||
+ break;
|
||||
+
|
||||
+ case WDIOC_SETTIMEOUT:
|
||||
+ if((ret = get_user(new_wdt_timeout, (int __user *)arg)))
|
||||
+ break;
|
||||
+ wdt_timeout = HEARTBEAT(new_wdt_timeout);
|
||||
+ ar2315_wdt_enable();
|
||||
+ break;
|
||||
+
|
||||
+ case WDIOC_GETTIMEOUT:
|
||||
+ ret = put_user(wdt_timeout, (int __user *)arg);
|
||||
+ break;
|
||||
+ }
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static struct file_operations ar2315_wdt_fops = {
|
||||
+ .owner = THIS_MODULE,
|
||||
+ .llseek = no_llseek,
|
||||
+ .write = ar2315_wdt_write,
|
||||
+ .unlocked_ioctl = ar2315_wdt_ioctl,
|
||||
+ .open = ar2315_wdt_open,
|
||||
+ .release = ar2315_wdt_release,
|
||||
+};
|
||||
+
|
||||
+static struct miscdevice ar2315_wdt_miscdev = {
|
||||
+ .minor = WATCHDOG_MINOR,
|
||||
+ .name = "watchdog",
|
||||
+ .fops = &ar2315_wdt_fops,
|
||||
+};
|
||||
+
|
||||
+static int
|
||||
+ar2315_wdt_probe(struct platform_device *dev)
|
||||
+{
|
||||
+ int ret = 0;
|
||||
+
|
||||
+ ar2315_wdt_enable();
|
||||
+ ret = request_irq(AR531X_MISC_IRQ_WATCHDOG, ar2315_wdt_interrupt, IRQF_DISABLED, "ar2315_wdt", NULL);
|
||||
+ if(ret)
|
||||
+ {
|
||||
+ printk(KERN_ERR "ar2315wdt: failed to register inetrrupt\n");
|
||||
+ goto out;
|
||||
+ }
|
||||
+
|
||||
+ ret = misc_register(&ar2315_wdt_miscdev);
|
||||
+ if(ret)
|
||||
+ printk(KERN_ERR "ar2315wdt: failed to register miscdev\n");
|
||||
+
|
||||
+out:
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+ar2315_wdt_remove(struct platform_device *dev)
|
||||
+{
|
||||
+ misc_deregister(&ar2315_wdt_miscdev);
|
||||
+ free_irq(AR531X_MISC_IRQ_WATCHDOG, NULL);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static struct platform_driver ar2315_wdt_driver = {
|
||||
+ .probe = ar2315_wdt_probe,
|
||||
+ .remove = ar2315_wdt_remove,
|
||||
+ .driver = {
|
||||
+ .name = "ar2315_wdt",
|
||||
+ .owner = THIS_MODULE,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static int __init
|
||||
+init_ar2315_wdt(void)
|
||||
+{
|
||||
+ int ret = platform_driver_register(&ar2315_wdt_driver);
|
||||
+ if(ret)
|
||||
+ printk(KERN_INFO "ar2315_wdt: error registering platfom driver!");
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static void __exit
|
||||
+exit_ar2315_wdt(void)
|
||||
+{
|
||||
+ platform_driver_unregister(&ar2315_wdt_driver);
|
||||
+}
|
||||
+
|
||||
+module_init(init_ar2315_wdt);
|
||||
+module_exit(exit_ar2315_wdt);
|
||||
--- a/drivers/watchdog/Kconfig
|
||||
+++ b/drivers/watchdog/Kconfig
|
||||
@@ -1077,6 +1077,12 @@ config LANTIQ_WDT
|
||||
help
|
||||
Hardware driver for the Lantiq SoC Watchdog Timer.
|
||||
|
||||
+config ATHEROS_WDT
|
||||
+ tristate "Atheros wisoc Watchdog Timer"
|
||||
+ depends on ATHEROS_AR231X
|
||||
+ help
|
||||
+ Hardware driver for the Atheros wisoc Watchdog Timer.
|
||||
+
|
||||
# PARISC Architecture
|
||||
|
||||
# POWERPC Architecture
|
||||
--- a/drivers/watchdog/Makefile
|
||||
+++ b/drivers/watchdog/Makefile
|
||||
@@ -128,6 +128,7 @@ obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o
|
||||
obj-$(CONFIG_PNX833X_WDT) += pnx833x_wdt.o
|
||||
obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
|
||||
obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
|
||||
+obj-$(CONFIG_ATHEROS_WDT) += ar2315-wtd.o
|
||||
obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
|
||||
obj-$(CONFIG_OCTEON_WDT) += octeon-wdt.o
|
||||
octeon-wdt-y := octeon-wdt-main.o octeon-wdt-nmi.o
|
|
@ -1,60 +0,0 @@
|
|||
--- a/drivers/mtd/redboot.c
|
||||
+++ b/drivers/mtd/redboot.c
|
||||
@@ -30,6 +30,8 @@
|
||||
#include <linux/mtd/partitions.h>
|
||||
#include <linux/module.h>
|
||||
|
||||
+#define BOARD_CONFIG_PART "boardconfig"
|
||||
+
|
||||
struct fis_image_desc {
|
||||
unsigned char name[16]; // Null terminated name
|
||||
uint32_t flash_base; // Address within FLASH of image
|
||||
@@ -60,6 +62,7 @@ static int parse_redboot_partitions(stru
|
||||
struct mtd_partition **pparts,
|
||||
struct mtd_part_parser_data *data)
|
||||
{
|
||||
+ unsigned long max_offset = 0;
|
||||
int nrparts = 0;
|
||||
struct fis_image_desc *buf;
|
||||
struct mtd_partition *parts;
|
||||
@@ -225,14 +228,14 @@ static int parse_redboot_partitions(stru
|
||||
}
|
||||
}
|
||||
#endif
|
||||
- parts = kzalloc(sizeof(*parts)*nrparts + nulllen + namelen, GFP_KERNEL);
|
||||
+ parts = kzalloc(sizeof(*parts) * (nrparts + 1) + nulllen + namelen + sizeof(BOARD_CONFIG_PART), GFP_KERNEL);
|
||||
|
||||
if (!parts) {
|
||||
ret = -ENOMEM;
|
||||
goto out;
|
||||
}
|
||||
|
||||
- nullname = (char *)&parts[nrparts];
|
||||
+ nullname = (char *)&parts[nrparts + 1];
|
||||
#ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
|
||||
if (nulllen > 0) {
|
||||
strcpy(nullname, nullstring);
|
||||
@@ -251,6 +254,8 @@ static int parse_redboot_partitions(stru
|
||||
}
|
||||
#endif
|
||||
for ( ; i<nrparts; i++) {
|
||||
+ if(max_offset < buf[i].flash_base + buf[i].size)
|
||||
+ max_offset = buf[i].flash_base + buf[i].size;
|
||||
parts[i].size = fl->img->size;
|
||||
parts[i].offset = fl->img->flash_base;
|
||||
parts[i].name = names;
|
||||
@@ -284,6 +289,14 @@ static int parse_redboot_partitions(stru
|
||||
fl = fl->next;
|
||||
kfree(tmp_fl);
|
||||
}
|
||||
+ if(master->size - max_offset >= master->erasesize)
|
||||
+ {
|
||||
+ parts[nrparts].size = master->size - max_offset;
|
||||
+ parts[nrparts].offset = max_offset;
|
||||
+ parts[nrparts].name = names;
|
||||
+ strcpy(names, BOARD_CONFIG_PART);
|
||||
+ nrparts++;
|
||||
+ }
|
||||
ret = nrparts;
|
||||
*pparts = parts;
|
||||
out:
|
|
@ -1,44 +0,0 @@
|
|||
--- a/drivers/mtd/redboot.c
|
||||
+++ b/drivers/mtd/redboot.c
|
||||
@@ -79,12 +79,18 @@ static int parse_redboot_partitions(stru
|
||||
static char nullstring[] = "unallocated";
|
||||
#endif
|
||||
|
||||
+ buf = vmalloc(master->erasesize);
|
||||
+ if (!buf)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ restart:
|
||||
if ( directory < 0 ) {
|
||||
offset = master->size + directory * master->erasesize;
|
||||
while (mtd_block_isbad(master, offset)) {
|
||||
if (!offset) {
|
||||
nogood:
|
||||
printk(KERN_NOTICE "Failed to find a non-bad block to check for RedBoot partition table\n");
|
||||
+ vfree(buf);
|
||||
return -EIO;
|
||||
}
|
||||
offset -= master->erasesize;
|
||||
@@ -97,10 +103,6 @@ static int parse_redboot_partitions(stru
|
||||
goto nogood;
|
||||
}
|
||||
}
|
||||
- buf = vmalloc(master->erasesize);
|
||||
-
|
||||
- if (!buf)
|
||||
- return -ENOMEM;
|
||||
|
||||
printk(KERN_NOTICE "Searching for RedBoot partition table in %s at offset 0x%lx\n",
|
||||
master->name, offset);
|
||||
@@ -173,6 +175,11 @@ static int parse_redboot_partitions(stru
|
||||
}
|
||||
if (i == numslots) {
|
||||
/* Didn't find it */
|
||||
+ if (offset + master->erasesize < master->size) {
|
||||
+ /* not at the end of the flash yet, maybe next block :) */
|
||||
+ directory++;
|
||||
+ goto restart;
|
||||
+ }
|
||||
printk(KERN_NOTICE "No RedBoot partition table detected in %s\n",
|
||||
master->name);
|
||||
ret = 0;
|
|
@ -1,72 +0,0 @@
|
|||
--- a/drivers/mtd/redboot.c
|
||||
+++ b/drivers/mtd/redboot.c
|
||||
@@ -58,6 +58,22 @@ static inline int redboot_checksum(struc
|
||||
return 1;
|
||||
}
|
||||
|
||||
+static uint32_t mtd_get_offset_erasesize(struct mtd_info *mtd, uint64_t offset)
|
||||
+{
|
||||
+ struct mtd_erase_region_info *regions = mtd->eraseregions;
|
||||
+ int i;
|
||||
+
|
||||
+ for (i = 0; i < mtd->numeraseregions; i++) {
|
||||
+ if (regions[i].offset +
|
||||
+ regions[i].numblocks * regions[i].erasesize <= offset)
|
||||
+ continue;
|
||||
+
|
||||
+ return regions[i].erasesize;
|
||||
+ }
|
||||
+
|
||||
+ return mtd->erasesize;
|
||||
+}
|
||||
+
|
||||
static int parse_redboot_partitions(struct mtd_info *master,
|
||||
struct mtd_partition **pparts,
|
||||
struct mtd_part_parser_data *data)
|
||||
@@ -74,6 +90,7 @@ static int parse_redboot_partitions(stru
|
||||
int namelen = 0;
|
||||
int nulllen = 0;
|
||||
int numslots;
|
||||
+ int first_slot;
|
||||
unsigned long offset;
|
||||
#ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
|
||||
static char nullstring[] = "unallocated";
|
||||
@@ -186,7 +203,10 @@ static int parse_redboot_partitions(stru
|
||||
goto out;
|
||||
}
|
||||
|
||||
- for (i = 0; i < numslots; i++) {
|
||||
+ first_slot = (buf[i].flash_base & (master->erasesize - 1)) /
|
||||
+ sizeof(struct fis_image_desc);
|
||||
+
|
||||
+ for (i = first_slot; i < first_slot + numslots; i++) {
|
||||
struct fis_list *new_fl, **prev;
|
||||
|
||||
if (buf[i].name[0] == 0xff) {
|
||||
@@ -261,12 +281,13 @@ static int parse_redboot_partitions(stru
|
||||
}
|
||||
#endif
|
||||
for ( ; i<nrparts; i++) {
|
||||
- if(max_offset < buf[i].flash_base + buf[i].size)
|
||||
- max_offset = buf[i].flash_base + buf[i].size;
|
||||
parts[i].size = fl->img->size;
|
||||
parts[i].offset = fl->img->flash_base;
|
||||
parts[i].name = names;
|
||||
|
||||
+ if (max_offset < parts[i].offset + parts[i].size)
|
||||
+ max_offset = parts[i].offset + parts[i].size;
|
||||
+
|
||||
strcpy(names, fl->img->name);
|
||||
#ifdef CONFIG_MTD_REDBOOT_PARTS_READONLY
|
||||
if (!memcmp(names, "RedBoot", 8) ||
|
||||
@@ -296,7 +317,9 @@ static int parse_redboot_partitions(stru
|
||||
fl = fl->next;
|
||||
kfree(tmp_fl);
|
||||
}
|
||||
- if(master->size - max_offset >= master->erasesize)
|
||||
+
|
||||
+ if (master->size - max_offset >=
|
||||
+ mtd_get_offset_erasesize(master, max_offset))
|
||||
{
|
||||
parts[nrparts].size = master->size - max_offset;
|
||||
parts[nrparts].offset = max_offset;
|
|
@ -1,72 +0,0 @@
|
|||
--- a/arch/mips/ar231x/Makefile
|
||||
+++ b/arch/mips/ar231x/Makefile
|
||||
@@ -8,7 +8,7 @@
|
||||
# Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
|
||||
#
|
||||
|
||||
-obj-y += board.o prom.o devices.o
|
||||
+obj-y += board.o prom.o devices.o reset.o
|
||||
|
||||
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
|
||||
|
||||
--- /dev/null
|
||||
+++ b/arch/mips/ar231x/reset.c
|
||||
@@ -0,0 +1,58 @@
|
||||
+#include <linux/init.h>
|
||||
+#include <linux/slab.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <linux/gpio_keys.h>
|
||||
+#include <linux/input.h>
|
||||
+#include <ar231x_platform.h>
|
||||
+#include <ar231x.h>
|
||||
+#include "devices.h"
|
||||
+
|
||||
+static int __init
|
||||
+ar231x_init_reset(void)
|
||||
+{
|
||||
+ struct platform_device *pdev;
|
||||
+ struct gpio_keys_platform_data pdata;
|
||||
+ struct gpio_keys_button *p;
|
||||
+ int err;
|
||||
+
|
||||
+ if (ar231x_board.config->resetConfigGpio == 0xffff)
|
||||
+ return -ENODEV;
|
||||
+
|
||||
+ p = kzalloc(sizeof(*p), GFP_KERNEL);
|
||||
+ if (!p)
|
||||
+ goto err;
|
||||
+
|
||||
+ p->desc = "reset";
|
||||
+ p->type = EV_KEY;
|
||||
+ p->code = KEY_RESTART;
|
||||
+ p->debounce_interval = 60;
|
||||
+ p->gpio = ar231x_board.config->resetConfigGpio;
|
||||
+
|
||||
+ memset(&pdata, 0, sizeof(pdata));
|
||||
+ pdata.poll_interval = 20;
|
||||
+ pdata.buttons = p;
|
||||
+ pdata.nbuttons = 1;
|
||||
+
|
||||
+ pdev = platform_device_alloc("gpio-keys-polled", 0);
|
||||
+ if (!pdev)
|
||||
+ goto err_free;
|
||||
+
|
||||
+ err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
|
||||
+ if (err)
|
||||
+ goto err_put_pdev;
|
||||
+
|
||||
+ err = platform_device_add(pdev);
|
||||
+ if (err)
|
||||
+ goto err_put_pdev;
|
||||
+
|
||||
+ return 0;
|
||||
+
|
||||
+err_put_pdev:
|
||||
+ platform_device_put(pdev);
|
||||
+err_free:
|
||||
+ kfree(p);
|
||||
+err:
|
||||
+ return -ENOMEM;
|
||||
+}
|
||||
+
|
||||
+module_init(ar231x_init_reset);
|
|
@ -1,86 +0,0 @@
|
|||
--- a/drivers/net/ethernet/ar231x/ar231x.c
|
||||
+++ b/drivers/net/ethernet/ar231x/ar231x.c
|
||||
@@ -150,6 +150,7 @@ static int ar231x_mdiobus_write(struct m
|
||||
static int ar231x_mdiobus_reset(struct mii_bus *bus);
|
||||
static int ar231x_mdiobus_probe (struct net_device *dev);
|
||||
static void ar231x_adjust_link(struct net_device *dev);
|
||||
+static bool no_phy = false;
|
||||
|
||||
#ifndef ERR
|
||||
#define ERR(fmt, args...) printk("%s: " fmt, __func__, ##args)
|
||||
@@ -182,6 +183,30 @@ static const struct net_device_ops ar231
|
||||
#endif
|
||||
};
|
||||
|
||||
+static int get_phy_id(struct mii_bus *bus, int addr, u32 *phy_id)
|
||||
+{
|
||||
+ int phy_reg;
|
||||
+
|
||||
+ /* Grab the bits from PHYIR1, and put them
|
||||
+ * in the upper half */
|
||||
+ phy_reg = mdiobus_read(bus, addr, MII_PHYSID1);
|
||||
+
|
||||
+ if (phy_reg < 0)
|
||||
+ return -EIO;
|
||||
+
|
||||
+ *phy_id = (phy_reg & 0xffff) << 16;
|
||||
+
|
||||
+ /* Grab the bits from PHYIR2, and put them in the lower half */
|
||||
+ phy_reg = mdiobus_read(bus, addr, MII_PHYSID2);
|
||||
+
|
||||
+ if (phy_reg < 0)
|
||||
+ return -EIO;
|
||||
+
|
||||
+ *phy_id |= (phy_reg & 0xffff);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
int ar231x_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct net_device *dev;
|
||||
@@ -299,6 +324,21 @@ int ar231x_probe(struct platform_device
|
||||
|
||||
mdiobus_register(sp->mii_bus);
|
||||
|
||||
+ /* Workaround for Micrel switch, which is only available on
|
||||
+ * one PHY and cannot be configured through MDIO */
|
||||
+ if (!no_phy) {
|
||||
+ u32 phy_id = 0;
|
||||
+ get_phy_id(sp->mii_bus, 1, &phy_id);
|
||||
+ if (phy_id == 0x00221450)
|
||||
+ no_phy = true;
|
||||
+ }
|
||||
+ if (no_phy) {
|
||||
+ sp->link = 1;
|
||||
+ netif_carrier_on(dev);
|
||||
+ return 0;
|
||||
+ }
|
||||
+ no_phy = true;
|
||||
+
|
||||
if (ar231x_mdiobus_probe(dev) != 0) {
|
||||
printk(KERN_ERR "%s: mdiobus_probe failed\n", dev->name);
|
||||
rx_tasklet_cleanup(dev);
|
||||
@@ -355,8 +395,10 @@ static int ar231x_remove(struct platform
|
||||
rx_tasklet_cleanup(dev);
|
||||
ar231x_init_cleanup(dev);
|
||||
unregister_netdev(dev);
|
||||
- mdiobus_unregister(sp->mii_bus);
|
||||
- mdiobus_free(sp->mii_bus);
|
||||
+ if (sp->mii_bus) {
|
||||
+ mdiobus_unregister(sp->mii_bus);
|
||||
+ mdiobus_free(sp->mii_bus);
|
||||
+ }
|
||||
kfree(dev);
|
||||
return 0;
|
||||
}
|
||||
@@ -1132,6 +1174,9 @@ static int ar231x_ioctl(struct net_devic
|
||||
struct ar231x_private *sp = netdev_priv(dev);
|
||||
int ret;
|
||||
|
||||
+ if (!sp->phy_dev)
|
||||
+ return -ENODEV;
|
||||
+
|
||||
switch (cmd) {
|
||||
|
||||
case SIOCETHTOOL:
|
|
@ -1,172 +0,0 @@
|
|||
CONFIG_ADM6996_PHY=y
|
||||
CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
|
||||
CONFIG_ARCH_DISCARD_MEMBLOCK=y
|
||||
CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
|
||||
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
|
||||
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
|
||||
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
|
||||
CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
|
||||
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
||||
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
|
||||
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
|
||||
CONFIG_B53=y
|
||||
# CONFIG_B53_MMAP_DRIVER is not set
|
||||
CONFIG_B53_PHY_DRIVER=y
|
||||
CONFIG_B53_PHY_FIXUP=y
|
||||
# CONFIG_B53_SRAB_DRIVER is not set
|
||||
CONFIG_BCM47XX=y
|
||||
CONFIG_BCM47XX_BCMA=y
|
||||
CONFIG_BCM47XX_SSB=y
|
||||
CONFIG_BCM47XX_WDT=y
|
||||
CONFIG_BCMA=y
|
||||
CONFIG_BCMA_BLOCKIO=y
|
||||
CONFIG_BCMA_DEBUG=y
|
||||
CONFIG_BCMA_DRIVER_GMAC_CMN=y
|
||||
CONFIG_BCMA_DRIVER_GPIO=y
|
||||
CONFIG_BCMA_DRIVER_MIPS=y
|
||||
CONFIG_BCMA_DRIVER_PCI_HOSTMODE=y
|
||||
CONFIG_BCMA_HOST_PCI=y
|
||||
CONFIG_BCMA_HOST_PCI_POSSIBLE=y
|
||||
CONFIG_BCMA_HOST_SOC=y
|
||||
CONFIG_BCMA_NFLASH=y
|
||||
CONFIG_BCMA_SFLASH=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
CONFIG_CEVT_R4K=y
|
||||
CONFIG_CLONE_BACKWARDS=y
|
||||
CONFIG_CMDLINE="noinitrd console=ttyS0,115200"
|
||||
CONFIG_CMDLINE_BOOL=y
|
||||
# CONFIG_CMDLINE_OVERRIDE is not set
|
||||
# CONFIG_CPU_BMIPS is not set
|
||||
CONFIG_CPU_GENERIC_DUMP_TLB=y
|
||||
CONFIG_CPU_HAS_PREFETCH=y
|
||||
CONFIG_CPU_HAS_SYNC=y
|
||||
CONFIG_CPU_LITTLE_ENDIAN=y
|
||||
CONFIG_CPU_MIPS32=y
|
||||
CONFIG_CPU_MIPS32_R1=y
|
||||
# CONFIG_CPU_MIPS32_R2 is not set
|
||||
CONFIG_CPU_MIPSR1=y
|
||||
CONFIG_CPU_MIPSR2_IRQ_VI=y
|
||||
CONFIG_CPU_R4K_CACHE_TLB=y
|
||||
CONFIG_CPU_R4K_FPU=y
|
||||
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
|
||||
CONFIG_CPU_SUPPORTS_HIGHMEM=y
|
||||
CONFIG_CSRC_R4K=y
|
||||
CONFIG_DMA_NONCOHERENT=y
|
||||
# CONFIG_EARLY_PRINTK is not set
|
||||
CONFIG_FIXED_PHY=y
|
||||
CONFIG_GENERIC_ATOMIC64=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
|
||||
CONFIG_GENERIC_CMOS_UPDATE=y
|
||||
CONFIG_GENERIC_IO=y
|
||||
CONFIG_GENERIC_IRQ_SHOW=y
|
||||
CONFIG_GENERIC_NET_UTILS=y
|
||||
CONFIG_GENERIC_PCI_IOMAP=y
|
||||
CONFIG_GENERIC_SMP_IDLE_THREAD=y
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_GPIO_DEVRES=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_GPIO_WDT=y
|
||||
CONFIG_HARDWARE_WATCHPOINTS=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT=y
|
||||
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
|
||||
CONFIG_HAVE_ARCH_JUMP_LABEL=y
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
CONFIG_HAVE_ARCH_TRACEHOOK=y
|
||||
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
|
||||
CONFIG_HAVE_CC_STACKPROTECTOR=y
|
||||
CONFIG_HAVE_CONTEXT_TRACKING=y
|
||||
CONFIG_HAVE_C_RECORDMCOUNT=y
|
||||
CONFIG_HAVE_DEBUG_KMEMLEAK=y
|
||||
CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
|
||||
CONFIG_HAVE_DMA_API_DEBUG=y
|
||||
CONFIG_HAVE_DMA_ATTRS=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
||||
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
|
||||
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
|
||||
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
|
||||
CONFIG_HAVE_IDE=y
|
||||
CONFIG_HAVE_MEMBLOCK=y
|
||||
CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
|
||||
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
|
||||
CONFIG_HAVE_NET_DSA=y
|
||||
CONFIG_HAVE_OPROFILE=y
|
||||
CONFIG_HAVE_PERF_EVENTS=y
|
||||
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
|
||||
CONFIG_HW_HAS_PCI=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
CONFIG_HZ_PERIODIC=y
|
||||
CONFIG_IMAGE_CMDLINE_HACK=y
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
CONFIG_IRQ_CPU=y
|
||||
CONFIG_IRQ_DOMAIN=y
|
||||
CONFIG_IRQ_FORCED_THREADING=y
|
||||
CONFIG_IRQ_WORK=y
|
||||
CONFIG_LEDS_GPIO_REGISTER=y
|
||||
CONFIG_MDIO_BOARDINFO=y
|
||||
CONFIG_MIPS=y
|
||||
# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
|
||||
CONFIG_MIPS_L1_CACHE_SHIFT=5
|
||||
# CONFIG_MIPS_MACHINE is not set
|
||||
CONFIG_MIPS_MT_DISABLED=y
|
||||
CONFIG_MIPS_O32_FP64_SUPPORT=y
|
||||
# CONFIG_MLX5_CORE is not set
|
||||
CONFIG_MODULES_USE_ELF_REL=y
|
||||
CONFIG_MTD_BCM47XXSFLASH=y
|
||||
CONFIG_MTD_BCM47XX_PARTS=y
|
||||
CONFIG_MTD_NAND=y
|
||||
CONFIG_MTD_NAND_BCM47XXNFLASH=y
|
||||
CONFIG_MTD_NAND_ECC=y
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
# CONFIG_MTD_SM_COMMON is not set
|
||||
CONFIG_NEED_DMA_MAP_STATE=y
|
||||
CONFIG_NEED_PER_CPU_KM=y
|
||||
CONFIG_NET_RX_BUSY_POLL=y
|
||||
CONFIG_NO_EXCEPT_FILL=y
|
||||
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
|
||||
CONFIG_PAGEFLAGS_EXTENDED=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
|
||||
CONFIG_PCI_DOMAINS=y
|
||||
CONFIG_PERF_USE_VMALLOC=y
|
||||
CONFIG_PHYLIB=y
|
||||
# CONFIG_PREEMPT_RCU is not set
|
||||
# CONFIG_RCU_STALL_COMMON is not set
|
||||
# CONFIG_SCSI_DMA is not set
|
||||
CONFIG_SERIAL_8250_EXTENDED=y
|
||||
CONFIG_SERIAL_8250_SHARE_IRQ=y
|
||||
CONFIG_SSB=y
|
||||
CONFIG_SSB_B43_PCI_BRIDGE=y
|
||||
CONFIG_SSB_BLOCKIO=y
|
||||
CONFIG_SSB_DEBUG=y
|
||||
CONFIG_SSB_DRIVER_EXTIF=y
|
||||
CONFIG_SSB_DRIVER_GIGE=y
|
||||
CONFIG_SSB_DRIVER_GPIO=y
|
||||
CONFIG_SSB_DRIVER_MIPS=y
|
||||
CONFIG_SSB_DRIVER_PCICORE=y
|
||||
CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
|
||||
CONFIG_SSB_EMBEDDED=y
|
||||
CONFIG_SSB_PCICORE_HOSTMODE=y
|
||||
CONFIG_SSB_PCIHOST=y
|
||||
CONFIG_SSB_PCIHOST_POSSIBLE=y
|
||||
CONFIG_SSB_SERIAL=y
|
||||
CONFIG_SSB_SFLASH=y
|
||||
CONFIG_SSB_SPROM=y
|
||||
CONFIG_SWCONFIG=y
|
||||
CONFIG_SYS_HAS_CPU_BMIPS=y
|
||||
CONFIG_SYS_HAS_CPU_BMIPS32_3300=y
|
||||
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
|
||||
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
|
||||
CONFIG_SYS_HAS_EARLY_PRINTK=y
|
||||
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
|
||||
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
|
||||
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
|
||||
CONFIG_TICK_CPU_ACCOUNTING=y
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_WATCHDOG_CORE=y
|
||||
# CONFIG_ZBUD is not set
|
||||
CONFIG_ZONE_DMA_FLAG=0
|
|
@ -1,34 +0,0 @@
|
|||
--- a/drivers/mtd/bcm47xxpart.c
|
||||
+++ b/drivers/mtd/bcm47xxpart.c
|
||||
@@ -68,6 +68,7 @@ static int bcm47xxpart_parse(struct mtd_
|
||||
int trx_part = -1;
|
||||
int last_trx_part = -1;
|
||||
int possible_nvram_sizes[] = { 0x8000, 0xF000, 0x10000, };
|
||||
+ bool found_nvram = false;
|
||||
|
||||
if (blocksize <= 0x10000)
|
||||
blocksize = 0x10000;
|
||||
@@ -229,12 +230,23 @@ static int bcm47xxpart_parse(struct mtd_
|
||||
if (buf[0] == NVRAM_HEADER) {
|
||||
bcm47xxpart_add_part(&parts[curr_part++], "nvram",
|
||||
master->size - blocksize, 0);
|
||||
+ found_nvram = true;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
kfree(buf);
|
||||
|
||||
+ if (!found_nvram) {
|
||||
+ pr_err("can not find a nvram partition reserve last block\n");
|
||||
+ bcm47xxpart_add_part(&parts[curr_part++], "nvram_guess",
|
||||
+ master->size - blocksize * 2, MTD_WRITEABLE);
|
||||
+ for (i = 0; i < curr_part; i++) {
|
||||
+ if (parts[i].size + parts[i].offset == master->size)
|
||||
+ parts[i].offset -= blocksize * 2;
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
/*
|
||||
* Assume that partitions end at the beginning of the one they are
|
||||
* followed by.
|
|
@ -1,78 +0,0 @@
|
|||
From 1f3e1c682a0b5273e3ee8799b54319971f426e6a Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
|
||||
Date: Wed, 29 Jan 2014 18:06:52 +0100
|
||||
Subject: [RFC V2][PATCH] MIPS: BCM47XX: Add new file for device specific workarounds
|
||||
|
||||
---
|
||||
V2: Drop pr_debug for devices we don't need workarounds for. It was too
|
||||
load and not useful at all.
|
||||
---
|
||||
arch/mips/bcm47xx/Makefile | 2 +-
|
||||
arch/mips/bcm47xx/bcm47xx_private.h | 3 +++
|
||||
arch/mips/bcm47xx/setup.c | 1 +
|
||||
arch/mips/bcm47xx/workarounds.c | 25 +++++++++++++++++++++++++
|
||||
4 files changed, 30 insertions(+), 1 deletion(-)
|
||||
create mode 100644 arch/mips/bcm47xx/workarounds.c
|
||||
|
||||
--- a/arch/mips/bcm47xx/Makefile
|
||||
+++ b/arch/mips/bcm47xx/Makefile
|
||||
@@ -4,4 +4,4 @@
|
||||
#
|
||||
|
||||
obj-y += irq.o nvram.o prom.o serial.o setup.o time.o sprom.o
|
||||
-obj-y += board.o buttons.o leds.o
|
||||
+obj-y += board.o buttons.o leds.o workarounds.o
|
||||
--- a/arch/mips/bcm47xx/bcm47xx_private.h
|
||||
+++ b/arch/mips/bcm47xx/bcm47xx_private.h
|
||||
@@ -9,4 +9,7 @@ int __init bcm47xx_buttons_register(void
|
||||
/* leds.c */
|
||||
void __init bcm47xx_leds_register(void);
|
||||
|
||||
+/* workarounds.c */
|
||||
+void __init bcm47xx_workarounds(void);
|
||||
+
|
||||
#endif
|
||||
--- a/arch/mips/bcm47xx/setup.c
|
||||
+++ b/arch/mips/bcm47xx/setup.c
|
||||
@@ -282,6 +282,7 @@ static int __init bcm47xx_register_bus_c
|
||||
}
|
||||
bcm47xx_buttons_register();
|
||||
bcm47xx_leds_register();
|
||||
+ bcm47xx_workarounds();
|
||||
|
||||
fixed_phy_add(PHY_POLL, 0, &bcm47xx_fixed_phy_status);
|
||||
return 0;
|
||||
--- /dev/null
|
||||
+++ b/arch/mips/bcm47xx/workarounds.c
|
||||
@@ -0,0 +1,31 @@
|
||||
+#include "bcm47xx_private.h"
|
||||
+
|
||||
+#include <linux/gpio.h>
|
||||
+#include <bcm47xx_board.h>
|
||||
+#include <bcm47xx.h>
|
||||
+
|
||||
+static void __init bcm47xx_workarounds_netgear_wnr3500l(void)
|
||||
+{
|
||||
+ const int usb_power = 12;
|
||||
+ int err;
|
||||
+
|
||||
+ err = gpio_request_one(usb_power, GPIOF_OUT_INIT_HIGH, "usb_power");
|
||||
+ if (err)
|
||||
+ pr_err("Failed to request USB power gpio: %d\n", err);
|
||||
+ else
|
||||
+ gpio_free(usb_power);
|
||||
+}
|
||||
+
|
||||
+void __init bcm47xx_workarounds(void)
|
||||
+{
|
||||
+ enum bcm47xx_board board = bcm47xx_board_get();
|
||||
+
|
||||
+ switch (board) {
|
||||
+ case BCM47XX_BOARD_NETGEAR_WNR3500L:
|
||||
+ bcm47xx_workarounds_netgear_wnr3500l();
|
||||
+ break;
|
||||
+ default:
|
||||
+ /* No workaround(s) needed */
|
||||
+ break;
|
||||
+ }
|
||||
+}
|
|
@ -1,39 +0,0 @@
|
|||
From b09189336f6d974c554aed03b4651e9f68ce0abd Mon Sep 17 00:00:00 2001
|
||||
From: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
Date: Sun, 23 Feb 2014 16:38:29 +0100
|
||||
Subject: [PATCH 3/6] MIPS: BCM47XX: detect some more Linksys devices
|
||||
|
||||
The Linksys WRT54G/GS/GL family uses the same boardtype numbers, and
|
||||
the same gpio configuration. The boardtype numbers are changing with
|
||||
the hardware versions, but these hardware numbers are different or each
|
||||
model.
|
||||
Detect them all as one device, this also worked in OpenWrt.
|
||||
---
|
||||
arch/mips/bcm47xx/board.c | 4 +++-
|
||||
arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h | 2 +-
|
||||
2 files changed, 4 insertions(+), 2 deletions(-)
|
||||
|
||||
--- a/arch/mips/bcm47xx/board.c
|
||||
+++ b/arch/mips/bcm47xx/board.c
|
||||
@@ -176,7 +176,9 @@ struct bcm47xx_board_type_list3 bcm47xx_
|
||||
{{BCM47XX_BOARD_PHICOMM_M1, "Phicomm M1"}, "0x0590", "80", "0x1104"},
|
||||
{{BCM47XX_BOARD_ZTE_H218N, "ZTE H218N"}, "0x053d", "1234", "0x1305"},
|
||||
{{BCM47XX_BOARD_NETGEAR_WNR3500L, "Netgear WNR3500L"}, "0x04CF", "3500", "02"},
|
||||
- {{BCM47XX_BOARD_LINKSYS_WRT54GSV1, "Linksys WRT54GS V1"}, "0x0101", "42", "0x10"},
|
||||
+ {{BCM47XX_BOARD_LINKSYS_WRT54G, "Linksys WRT54G/GS/GL"}, "0x0101", "42", "0x10"},
|
||||
+ {{BCM47XX_BOARD_LINKSYS_WRT54G, "Linksys WRT54G/GS/GL"}, "0x0467", "42", "0x10"},
|
||||
+ {{BCM47XX_BOARD_LINKSYS_WRT54G, "Linksys WRT54G/GS/GL"}, "0x0708", "42", "0x10"},
|
||||
{ {0}, NULL},
|
||||
};
|
||||
|
||||
--- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h
|
||||
@@ -66,7 +66,7 @@ enum bcm47xx_board {
|
||||
BCM47XX_BOARD_LINKSYS_WRT310NV1,
|
||||
BCM47XX_BOARD_LINKSYS_WRT310NV2,
|
||||
BCM47XX_BOARD_LINKSYS_WRT54G3GV2,
|
||||
- BCM47XX_BOARD_LINKSYS_WRT54GSV1,
|
||||
+ BCM47XX_BOARD_LINKSYS_WRT54G,
|
||||
BCM47XX_BOARD_LINKSYS_WRT610NV1,
|
||||
BCM47XX_BOARD_LINKSYS_WRT610NV2,
|
||||
BCM47XX_BOARD_LINKSYS_WRTSL54GS,
|
|
@ -1,133 +0,0 @@
|
|||
From e3d15471f1be2bd2fd4db82907ad4b2d74ec2636 Mon Sep 17 00:00:00 2001
|
||||
From: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
Date: Fri, 10 Jan 2014 23:55:28 +0100
|
||||
Subject: [PATCH 4/6] MIPS: BCM47XX: add button and led configuration for some
|
||||
Linksys devices
|
||||
|
||||
This adds led and button GPIO configuration for Linksys wrt54g3gv2,
|
||||
wrt54gsv1 and wrtsl54gs. This is based on OpenWrt broadcom-diag code.
|
||||
|
||||
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
---
|
||||
arch/mips/bcm47xx/buttons.c | 27 +++++++++++++++++++++++++++
|
||||
arch/mips/bcm47xx/leds.c | 33 +++++++++++++++++++++++++++++++++
|
||||
2 files changed, 60 insertions(+)
|
||||
|
||||
--- a/arch/mips/bcm47xx/buttons.c
|
||||
+++ b/arch/mips/bcm47xx/buttons.c
|
||||
@@ -259,6 +259,18 @@ bcm47xx_buttons_linksys_wrt310nv1[] __in
|
||||
};
|
||||
|
||||
static const struct gpio_keys_button
|
||||
+bcm47xx_buttons_linksys_wrt54g3gv2[] __initconst = {
|
||||
+ BCM47XX_GPIO_KEY(5, KEY_WIMAX),
|
||||
+ BCM47XX_GPIO_KEY(6, KEY_RESTART),
|
||||
+};
|
||||
+
|
||||
+static const struct gpio_keys_button
|
||||
+bcm47xx_buttons_linksys_wrt54gsv1[] __initconst = {
|
||||
+ BCM47XX_GPIO_KEY(4, KEY_WPS_BUTTON),
|
||||
+ BCM47XX_GPIO_KEY(6, KEY_RESTART),
|
||||
+};
|
||||
+
|
||||
+static const struct gpio_keys_button
|
||||
bcm47xx_buttons_linksys_wrt610nv1[] __initconst = {
|
||||
BCM47XX_GPIO_KEY(6, KEY_RESTART),
|
||||
BCM47XX_GPIO_KEY(8, KEY_WPS_BUTTON),
|
||||
@@ -270,6 +282,12 @@ bcm47xx_buttons_linksys_wrt610nv2[] __in
|
||||
BCM47XX_GPIO_KEY(6, KEY_RESTART),
|
||||
};
|
||||
|
||||
+static const struct gpio_keys_button
|
||||
+bcm47xx_buttons_linksys_wrtsl54gs[] __initconst = {
|
||||
+ BCM47XX_GPIO_KEY(4, KEY_WPS_BUTTON),
|
||||
+ BCM47XX_GPIO_KEY(6, KEY_RESTART),
|
||||
+};
|
||||
+
|
||||
/* Motorola */
|
||||
|
||||
static const struct gpio_keys_button
|
||||
@@ -479,12 +497,21 @@ int __init bcm47xx_buttons_register(void
|
||||
case BCM47XX_BOARD_LINKSYS_WRT310NV1:
|
||||
err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt310nv1);
|
||||
break;
|
||||
+ case BCM47XX_BOARD_LINKSYS_WRT54G:
|
||||
+ err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt54gsv1);
|
||||
+ break;
|
||||
+ case BCM47XX_BOARD_LINKSYS_WRT54G3GV2:
|
||||
+ err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt54g3gv2);
|
||||
+ break;
|
||||
case BCM47XX_BOARD_LINKSYS_WRT610NV1:
|
||||
err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt610nv1);
|
||||
break;
|
||||
case BCM47XX_BOARD_LINKSYS_WRT610NV2:
|
||||
err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt610nv2);
|
||||
break;
|
||||
+ case BCM47XX_BOARD_LINKSYS_WRTSL54GS:
|
||||
+ err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrtsl54gs);
|
||||
+ break;
|
||||
|
||||
case BCM47XX_BOARD_MOTOROLA_WE800G:
|
||||
err = bcm47xx_copy_bdata(bcm47xx_buttons_motorola_we800g);
|
||||
--- a/arch/mips/bcm47xx/leds.c
|
||||
+++ b/arch/mips/bcm47xx/leds.c
|
||||
@@ -292,6 +292,21 @@ bcm47xx_leds_linksys_wrt310nv1[] __initc
|
||||
};
|
||||
|
||||
static const struct gpio_led
|
||||
+bcm47xx_leds_linksys_wrt54gsv1[] __initconst = {
|
||||
+ BCM47XX_GPIO_LED(0, "unk", "dmz", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+ BCM47XX_GPIO_LED(1, "unk", "power", 0, LEDS_GPIO_DEFSTATE_ON),
|
||||
+ BCM47XX_GPIO_LED(5, "white", "wps", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+ BCM47XX_GPIO_LED(7, "orange", "wps", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+};
|
||||
+
|
||||
+static const struct gpio_led
|
||||
+bcm47xx_leds_linksys_wrt54g3gv2[] __initconst = {
|
||||
+ BCM47XX_GPIO_LED(1, "unk", "power", 0, LEDS_GPIO_DEFSTATE_ON),
|
||||
+ BCM47XX_GPIO_LED(2, "green", "3g", 0, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+ BCM47XX_GPIO_LED(3, "blue", "3g", 0, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+};
|
||||
+
|
||||
+static const struct gpio_led
|
||||
bcm47xx_leds_linksys_wrt610nv1[] __initconst = {
|
||||
BCM47XX_GPIO_LED(0, "unk", "usb", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
BCM47XX_GPIO_LED(1, "unk", "power", 0, LEDS_GPIO_DEFSTATE_OFF),
|
||||
@@ -308,6 +323,15 @@ bcm47xx_leds_linksys_wrt610nv2[] __initc
|
||||
BCM47XX_GPIO_LED(7, "unk", "usb", 0, LEDS_GPIO_DEFSTATE_OFF),
|
||||
};
|
||||
|
||||
+static const struct gpio_led
|
||||
+bcm47xx_leds_linksys_wrtsl54gs[] __initconst = {
|
||||
+ BCM47XX_GPIO_LED(0, "unk", "wlan", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+ BCM47XX_GPIO_LED(1, "unk", "power", 0, LEDS_GPIO_DEFSTATE_ON),
|
||||
+ BCM47XX_GPIO_LED(2, "white", "wps", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+ BCM47XX_GPIO_LED(3, "orange", "wps", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+ BCM47XX_GPIO_LED(7, "unk", "dmz", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+};
|
||||
+
|
||||
/* Motorola */
|
||||
|
||||
static const struct gpio_led
|
||||
@@ -502,12 +526,21 @@ void __init bcm47xx_leds_register(void)
|
||||
case BCM47XX_BOARD_LINKSYS_WRT310NV1:
|
||||
bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt310nv1);
|
||||
break;
|
||||
+ case BCM47XX_BOARD_LINKSYS_WRT54G:
|
||||
+ bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt54gsv1);
|
||||
+ break;
|
||||
+ case BCM47XX_BOARD_LINKSYS_WRT54G3GV2:
|
||||
+ bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt54g3gv2);
|
||||
+ break;
|
||||
case BCM47XX_BOARD_LINKSYS_WRT610NV1:
|
||||
bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt610nv1);
|
||||
break;
|
||||
case BCM47XX_BOARD_LINKSYS_WRT610NV2:
|
||||
bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt610nv2);
|
||||
break;
|
||||
+ case BCM47XX_BOARD_LINKSYS_WRTSL54GS:
|
||||
+ bcm47xx_set_pdata(bcm47xx_leds_linksys_wrtsl54gs);
|
||||
+ break;
|
||||
|
||||
case BCM47XX_BOARD_MOTOROLA_WE800G:
|
||||
bcm47xx_set_pdata(bcm47xx_leds_motorola_we800g);
|
|
@ -1,89 +0,0 @@
|
|||
From c546fa49901252cbc1e4046d7188858b2f9e130f Mon Sep 17 00:00:00 2001
|
||||
From: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
Date: Fri, 10 Jan 2014 23:55:43 +0100
|
||||
Subject: [PATCH 2/2] MIPS: BCM47XX: add detection and GPIO config for Siemens
|
||||
SE505v2
|
||||
|
||||
This adds board detection for the Siemens SE505v2 and the led gpio
|
||||
configuration. This board does not have any buttons.
|
||||
This is based on OpenWrt broadcom-diag and Manuel Munz's nvram dump.
|
||||
|
||||
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
---
|
||||
arch/mips/bcm47xx/board.c | 17 +++++++++++++++++
|
||||
arch/mips/bcm47xx/leds.c | 12 ++++++++++++
|
||||
arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h | 2 ++
|
||||
3 files changed, 31 insertions(+)
|
||||
|
||||
--- a/arch/mips/bcm47xx/board.c
|
||||
+++ b/arch/mips/bcm47xx/board.c
|
||||
@@ -182,6 +182,13 @@ struct bcm47xx_board_type_list3 bcm47xx_
|
||||
{ {0}, NULL},
|
||||
};
|
||||
|
||||
+/* boardtype, boardrev */
|
||||
+static const
|
||||
+struct bcm47xx_board_type_list2 bcm47xx_board_list_board_type_rev[] __initconst = {
|
||||
+ {{BCM47XX_BOARD_SIEMENS_SE505V2, "Siemens SE505 V2"}, "0x0101", "0x10"},
|
||||
+ { {0}, NULL},
|
||||
+};
|
||||
+
|
||||
static const
|
||||
struct bcm47xx_board_type bcm47xx_board_unknown[] __initconst = {
|
||||
{BCM47XX_BOARD_UNKNOWN, "Unknown Board"},
|
||||
@@ -275,6 +282,16 @@ static __init const struct bcm47xx_board
|
||||
return &e3->board;
|
||||
}
|
||||
}
|
||||
+
|
||||
+ if (bcm47xx_nvram_getenv("boardtype", buf1, sizeof(buf1)) >= 0 &&
|
||||
+ bcm47xx_nvram_getenv("boardrev", buf2, sizeof(buf2)) >= 0 &&
|
||||
+ bcm47xx_nvram_getenv("boardnum", buf3, sizeof(buf3)) == -ENOENT) {
|
||||
+ for (e2 = bcm47xx_board_list_board_type_rev; e2->value1; e2++) {
|
||||
+ if (!strcmp(buf1, e2->value1) &&
|
||||
+ !strcmp(buf2, e2->value2))
|
||||
+ return &e2->board;
|
||||
+ }
|
||||
+ }
|
||||
return bcm47xx_board_unknown;
|
||||
}
|
||||
|
||||
--- a/arch/mips/bcm47xx/leds.c
|
||||
+++ b/arch/mips/bcm47xx/leds.c
|
||||
@@ -383,6 +383,14 @@ bcm47xx_leds_netgear_wnr834bv2[] __initc
|
||||
BCM47XX_GPIO_LED(7, "unk", "connected", 0, LEDS_GPIO_DEFSTATE_OFF),
|
||||
};
|
||||
|
||||
+/* Siemens */
|
||||
+static const struct gpio_led
|
||||
+bcm47xx_leds_siemens_se505v2[] __initconst = {
|
||||
+ BCM47XX_GPIO_LED(0, "unk", "dmz", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+ BCM47XX_GPIO_LED(3, "unk", "wlan", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+ BCM47XX_GPIO_LED(5, "unk", "power", 1, LEDS_GPIO_DEFSTATE_ON),
|
||||
+};
|
||||
+
|
||||
/* SimpleTech */
|
||||
|
||||
static const struct gpio_led
|
||||
@@ -562,6 +570,10 @@ void __init bcm47xx_leds_register(void)
|
||||
bcm47xx_set_pdata(bcm47xx_leds_netgear_wnr834bv2);
|
||||
break;
|
||||
|
||||
+ case BCM47XX_BOARD_SIEMENS_SE505V2:
|
||||
+ bcm47xx_set_pdata(bcm47xx_leds_siemens_se505v2);
|
||||
+ break;
|
||||
+
|
||||
case BCM47XX_BOARD_SIMPLETECH_SIMPLESHARE:
|
||||
bcm47xx_set_pdata(bcm47xx_leds_simpletech_simpleshare);
|
||||
break;
|
||||
--- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h
|
||||
@@ -94,6 +94,8 @@ enum bcm47xx_board {
|
||||
|
||||
BCM47XX_BOARD_PHICOMM_M1,
|
||||
|
||||
+ BCM47XX_BOARD_SIEMENS_SE505V2,
|
||||
+
|
||||
BCM47XX_BOARD_SIMPLETECH_SIMPLESHARE,
|
||||
|
||||
BCM47XX_BOARD_ZTE_H218N,
|
|
@ -1,77 +0,0 @@
|
|||
From 44927df87162ae9beb6e7b934b0e75818b88e350 Mon Sep 17 00:00:00 2001
|
||||
From: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
Date: Thu, 2 Jan 2014 19:10:05 +0100
|
||||
Subject: [PATCH] MIPS: BCM47XX: add Belkin F7Dxxxx board detection
|
||||
|
||||
From: Cody P Schafer <devel@codyps.com>
|
||||
|
||||
Add a few Belkin F7Dxxxx entries, with F7D4401 sourced from online
|
||||
documentation and the "F7D7302" being observed. F7D3301, F7D3302, and
|
||||
F7D4302 are reasonable guesses which are unlikely to cause
|
||||
mis-detection.
|
||||
|
||||
Signed-off-by: Cody P Schafer <devel@codyps.com>
|
||||
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
---
|
||||
arch/mips/bcm47xx/board.c | 4 ++++
|
||||
arch/mips/bcm47xx/buttons.c | 4 ++++
|
||||
arch/mips/bcm47xx/leds.c | 4 ++++
|
||||
arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h | 4 ++++
|
||||
4 files changed, 16 insertions(+)
|
||||
|
||||
--- a/arch/mips/bcm47xx/board.c
|
||||
+++ b/arch/mips/bcm47xx/board.c
|
||||
@@ -72,7 +72,11 @@ struct bcm47xx_board_type_list1 bcm47xx_
|
||||
{{BCM47XX_BOARD_ASUS_WL500W, "Asus WL500W"}, "WL500gW-"},
|
||||
{{BCM47XX_BOARD_ASUS_WL520GC, "Asus WL520GC"}, "WL520GC-"},
|
||||
{{BCM47XX_BOARD_ASUS_WL520GU, "Asus WL520GU"}, "WL520GU-"},
|
||||
+ {{BCM47XX_BOARD_BELKIN_F7D3301, "Belkin F7D3301"}, "F7D3301"},
|
||||
+ {{BCM47XX_BOARD_BELKIN_F7D3302, "Belkin F7D3302"}, "F7D3302"},
|
||||
{{BCM47XX_BOARD_BELKIN_F7D4301, "Belkin F7D4301"}, "F7D4301"},
|
||||
+ {{BCM47XX_BOARD_BELKIN_F7D4302, "Belkin F7D4302"}, "F7D4302"},
|
||||
+ {{BCM47XX_BOARD_BELKIN_F7D4401, "Belkin F7D4401"}, "F7D4401"},
|
||||
{ {0}, NULL},
|
||||
};
|
||||
|
||||
--- a/arch/mips/bcm47xx/buttons.c
|
||||
+++ b/arch/mips/bcm47xx/buttons.c
|
||||
@@ -420,7 +420,11 @@ int __init bcm47xx_buttons_register(void
|
||||
err = bcm47xx_copy_bdata(bcm47xx_buttons_asus_wlhdd);
|
||||
break;
|
||||
|
||||
+ case BCM47XX_BOARD_BELKIN_F7D3301:
|
||||
+ case BCM47XX_BOARD_BELKIN_F7D3302:
|
||||
case BCM47XX_BOARD_BELKIN_F7D4301:
|
||||
+ case BCM47XX_BOARD_BELKIN_F7D4302:
|
||||
+ case BCM47XX_BOARD_BELKIN_F7D4401:
|
||||
err = bcm47xx_copy_bdata(bcm47xx_buttons_belkin_f7d4301);
|
||||
break;
|
||||
|
||||
--- a/arch/mips/bcm47xx/leds.c
|
||||
+++ b/arch/mips/bcm47xx/leds.c
|
||||
@@ -457,7 +457,11 @@ void __init bcm47xx_leds_register(void)
|
||||
bcm47xx_set_pdata(bcm47xx_leds_asus_wlhdd);
|
||||
break;
|
||||
|
||||
+ case BCM47XX_BOARD_BELKIN_F7D3301:
|
||||
+ case BCM47XX_BOARD_BELKIN_F7D3302:
|
||||
case BCM47XX_BOARD_BELKIN_F7D4301:
|
||||
+ case BCM47XX_BOARD_BELKIN_F7D4302:
|
||||
+ case BCM47XX_BOARD_BELKIN_F7D4401:
|
||||
bcm47xx_set_pdata(bcm47xx_leds_belkin_f7d4301);
|
||||
break;
|
||||
|
||||
--- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h
|
||||
@@ -27,7 +27,11 @@ enum bcm47xx_board {
|
||||
BCM47XX_BOARD_ASUS_WL700GE,
|
||||
BCM47XX_BOARD_ASUS_WLHDD,
|
||||
|
||||
+ BCM47XX_BOARD_BELKIN_F7D3301,
|
||||
+ BCM47XX_BOARD_BELKIN_F7D3302,
|
||||
BCM47XX_BOARD_BELKIN_F7D4301,
|
||||
+ BCM47XX_BOARD_BELKIN_F7D4302,
|
||||
+ BCM47XX_BOARD_BELKIN_F7D4401,
|
||||
|
||||
BCM47XX_BOARD_BUFFALO_WBR2_G54,
|
||||
BCM47XX_BOARD_BUFFALO_WHR2_A54G54,
|
|
@ -1,107 +0,0 @@
|
|||
From 9fff5375229a4ba3a200747e079c46fa19b90797 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
|
||||
Date: Fri, 20 Jun 2014 07:26:20 +0200
|
||||
Subject: [3.17][PATCH 1/2] MIPS: BCM47XX: Distinguish WRT54G series devices by
|
||||
boardtype
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
Catalin reported that GPIOs used by bcm47xx don't match layout of his
|
||||
WRT54GS V1.0 board. It seems we need to distinguish these 54G* devices.
|
||||
|
||||
Reported-by: Catalin Patulea <cat@vv.carleton.ca>
|
||||
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
|
||||
---
|
||||
arch/mips/bcm47xx/board.c | 6 +++---
|
||||
arch/mips/bcm47xx/buttons.c | 10 ++++++----
|
||||
arch/mips/bcm47xx/leds.c | 10 ++++++----
|
||||
arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h | 4 +++-
|
||||
4 files changed, 18 insertions(+), 12 deletions(-)
|
||||
|
||||
--- a/arch/mips/bcm47xx/board.c
|
||||
+++ b/arch/mips/bcm47xx/board.c
|
||||
@@ -180,9 +180,9 @@ struct bcm47xx_board_type_list3 bcm47xx_
|
||||
{{BCM47XX_BOARD_PHICOMM_M1, "Phicomm M1"}, "0x0590", "80", "0x1104"},
|
||||
{{BCM47XX_BOARD_ZTE_H218N, "ZTE H218N"}, "0x053d", "1234", "0x1305"},
|
||||
{{BCM47XX_BOARD_NETGEAR_WNR3500L, "Netgear WNR3500L"}, "0x04CF", "3500", "02"},
|
||||
- {{BCM47XX_BOARD_LINKSYS_WRT54G, "Linksys WRT54G/GS/GL"}, "0x0101", "42", "0x10"},
|
||||
- {{BCM47XX_BOARD_LINKSYS_WRT54G, "Linksys WRT54G/GS/GL"}, "0x0467", "42", "0x10"},
|
||||
- {{BCM47XX_BOARD_LINKSYS_WRT54G, "Linksys WRT54G/GS/GL"}, "0x0708", "42", "0x10"},
|
||||
+ {{BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0101, "Linksys WRT54G/GS/GL"}, "0x0101", "42", "0x10"},
|
||||
+ {{BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0467, "Linksys WRT54G/GS/GL"}, "0x0467", "42", "0x10"},
|
||||
+ {{BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0708, "Linksys WRT54G/GS/GL"}, "0x0708", "42", "0x10"},
|
||||
{ {0}, NULL},
|
||||
};
|
||||
|
||||
--- a/arch/mips/bcm47xx/buttons.c
|
||||
+++ b/arch/mips/bcm47xx/buttons.c
|
||||
@@ -265,7 +265,7 @@ bcm47xx_buttons_linksys_wrt54g3gv2[] __i
|
||||
};
|
||||
|
||||
static const struct gpio_keys_button
|
||||
-bcm47xx_buttons_linksys_wrt54gsv1[] __initconst = {
|
||||
+bcm47xx_buttons_linksys_wrt54g_generic[] __initconst = {
|
||||
BCM47XX_GPIO_KEY(4, KEY_WPS_BUTTON),
|
||||
BCM47XX_GPIO_KEY(6, KEY_RESTART),
|
||||
};
|
||||
@@ -501,12 +501,14 @@ int __init bcm47xx_buttons_register(void
|
||||
case BCM47XX_BOARD_LINKSYS_WRT310NV1:
|
||||
err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt310nv1);
|
||||
break;
|
||||
- case BCM47XX_BOARD_LINKSYS_WRT54G:
|
||||
- err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt54gsv1);
|
||||
- break;
|
||||
case BCM47XX_BOARD_LINKSYS_WRT54G3GV2:
|
||||
err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt54g3gv2);
|
||||
break;
|
||||
+ case BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0101:
|
||||
+ case BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0467:
|
||||
+ case BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0708:
|
||||
+ err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt54g_generic);
|
||||
+ break;
|
||||
case BCM47XX_BOARD_LINKSYS_WRT610NV1:
|
||||
err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt610nv1);
|
||||
break;
|
||||
--- a/arch/mips/bcm47xx/leds.c
|
||||
+++ b/arch/mips/bcm47xx/leds.c
|
||||
@@ -292,7 +292,7 @@ bcm47xx_leds_linksys_wrt310nv1[] __initc
|
||||
};
|
||||
|
||||
static const struct gpio_led
|
||||
-bcm47xx_leds_linksys_wrt54gsv1[] __initconst = {
|
||||
+bcm47xx_leds_linksys_wrt54g_generic[] __initconst = {
|
||||
BCM47XX_GPIO_LED(0, "unk", "dmz", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
BCM47XX_GPIO_LED(1, "unk", "power", 0, LEDS_GPIO_DEFSTATE_ON),
|
||||
BCM47XX_GPIO_LED(5, "white", "wps", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
@@ -538,12 +538,14 @@ void __init bcm47xx_leds_register(void)
|
||||
case BCM47XX_BOARD_LINKSYS_WRT310NV1:
|
||||
bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt310nv1);
|
||||
break;
|
||||
- case BCM47XX_BOARD_LINKSYS_WRT54G:
|
||||
- bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt54gsv1);
|
||||
- break;
|
||||
case BCM47XX_BOARD_LINKSYS_WRT54G3GV2:
|
||||
bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt54g3gv2);
|
||||
break;
|
||||
+ case BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0101:
|
||||
+ case BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0467:
|
||||
+ case BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0708:
|
||||
+ bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt54g_generic);
|
||||
+ break;
|
||||
case BCM47XX_BOARD_LINKSYS_WRT610NV1:
|
||||
bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt610nv1);
|
||||
break;
|
||||
--- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h
|
||||
@@ -70,7 +70,9 @@ enum bcm47xx_board {
|
||||
BCM47XX_BOARD_LINKSYS_WRT310NV1,
|
||||
BCM47XX_BOARD_LINKSYS_WRT310NV2,
|
||||
BCM47XX_BOARD_LINKSYS_WRT54G3GV2,
|
||||
- BCM47XX_BOARD_LINKSYS_WRT54G,
|
||||
+ BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0101,
|
||||
+ BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0467,
|
||||
+ BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0708,
|
||||
BCM47XX_BOARD_LINKSYS_WRT610NV1,
|
||||
BCM47XX_BOARD_LINKSYS_WRT610NV2,
|
||||
BCM47XX_BOARD_LINKSYS_WRTSL54GS,
|
|
@ -1,40 +0,0 @@
|
|||
From d12264ddf6c29ddab9889cd87a1e60d2209f9922 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
|
||||
Date: Fri, 20 Jun 2014 07:53:14 +0200
|
||||
Subject: [3.17][PATCH 2/2] MIPS: BCM47XX: Fix LEDs on WRT54GS V1.0
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
Reported-by: Catalin Patulea <cat@vv.carleton.ca>
|
||||
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
|
||||
---
|
||||
arch/mips/bcm47xx/leds.c | 10 ++++++++++
|
||||
1 file changed, 10 insertions(+)
|
||||
|
||||
--- a/arch/mips/bcm47xx/leds.c
|
||||
+++ b/arch/mips/bcm47xx/leds.c
|
||||
@@ -306,6 +306,14 @@ bcm47xx_leds_linksys_wrt54g3gv2[] __init
|
||||
BCM47XX_GPIO_LED(3, "blue", "3g", 0, LEDS_GPIO_DEFSTATE_OFF),
|
||||
};
|
||||
|
||||
+/* Verified on: WRT54GS V1.0 */
|
||||
+static const struct gpio_led
|
||||
+bcm47xx_leds_linksys_wrt54g_type_0101[] __initconst = {
|
||||
+ BCM47XX_GPIO_LED(0, "green", "wlan", 0, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+ BCM47XX_GPIO_LED(1, "green", "power", 0, LEDS_GPIO_DEFSTATE_ON),
|
||||
+ BCM47XX_GPIO_LED(7, "green", "dmz", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+};
|
||||
+
|
||||
static const struct gpio_led
|
||||
bcm47xx_leds_linksys_wrt610nv1[] __initconst = {
|
||||
BCM47XX_GPIO_LED(0, "unk", "usb", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
@@ -542,6 +550,8 @@ void __init bcm47xx_leds_register(void)
|
||||
bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt54g3gv2);
|
||||
break;
|
||||
case BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0101:
|
||||
+ bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt54g_type_0101);
|
||||
+ break;
|
||||
case BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0467:
|
||||
case BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0708:
|
||||
bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt54g_generic);
|
|
@ -1,143 +0,0 @@
|
|||
--- a/arch/mips/bcm47xx/leds.c
|
||||
+++ b/arch/mips/bcm47xx/leds.c
|
||||
@@ -35,6 +35,15 @@ bcm47xx_leds_asus_rtn12[] __initconst =
|
||||
};
|
||||
|
||||
static const struct gpio_led
|
||||
+bcm47xx_leds_asus_rtn15u[] __initconst = {
|
||||
+ /* TODO: Add "wlan" LED */
|
||||
+ BCM47XX_GPIO_LED(3, "blue", "wan", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+ BCM47XX_GPIO_LED(4, "blue", "lan", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+ BCM47XX_GPIO_LED(6, "blue", "power", 1, LEDS_GPIO_DEFSTATE_ON),
|
||||
+ BCM47XX_GPIO_LED(9, "blue", "usb", 0, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+};
|
||||
+
|
||||
+static const struct gpio_led
|
||||
bcm47xx_leds_asus_rtn16[] __initconst = {
|
||||
BCM47XX_GPIO_LED(1, "blue", "power", 1, LEDS_GPIO_DEFSTATE_ON),
|
||||
BCM47XX_GPIO_LED(7, "blue", "wlan", 0, LEDS_GPIO_DEFSTATE_OFF),
|
||||
@@ -42,8 +51,8 @@ bcm47xx_leds_asus_rtn16[] __initconst =
|
||||
|
||||
static const struct gpio_led
|
||||
bcm47xx_leds_asus_rtn66u[] __initconst = {
|
||||
- BCM47XX_GPIO_LED(12, "unk", "power", 1, LEDS_GPIO_DEFSTATE_ON),
|
||||
- BCM47XX_GPIO_LED(15, "unk", "usb", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+ BCM47XX_GPIO_LED(12, "blue", "power", 1, LEDS_GPIO_DEFSTATE_ON),
|
||||
+ BCM47XX_GPIO_LED(15, "blue", "usb", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
};
|
||||
|
||||
static const struct gpio_led
|
||||
@@ -216,8 +225,8 @@ bcm47xx_leds_linksys_e1000v1[] __initcon
|
||||
|
||||
static const struct gpio_led
|
||||
bcm47xx_leds_linksys_e1000v21[] __initconst = {
|
||||
- BCM47XX_GPIO_LED(5, "unk", "wlan", 0, LEDS_GPIO_DEFSTATE_OFF),
|
||||
- BCM47XX_GPIO_LED(6, "unk", "power", 1, LEDS_GPIO_DEFSTATE_ON),
|
||||
+ BCM47XX_GPIO_LED(5, "blue", "wlan", 0, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+ BCM47XX_GPIO_LED(6, "blue", "power", 1, LEDS_GPIO_DEFSTATE_ON),
|
||||
BCM47XX_GPIO_LED(7, "amber", "wps", 0, LEDS_GPIO_DEFSTATE_OFF),
|
||||
BCM47XX_GPIO_LED(8, "blue", "wps", 0, LEDS_GPIO_DEFSTATE_OFF),
|
||||
};
|
||||
@@ -314,6 +323,16 @@ bcm47xx_leds_linksys_wrt54g_type_0101[]
|
||||
BCM47XX_GPIO_LED(7, "green", "dmz", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
};
|
||||
|
||||
+/* Verified on: WRT54GL V1.1 */
|
||||
+static const struct gpio_led
|
||||
+bcm47xx_leds_linksys_wrt54g_type_0467[] __initconst = {
|
||||
+ BCM47XX_GPIO_LED(0, "green", "wlan", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+ BCM47XX_GPIO_LED(1, "green", "power", 0, LEDS_GPIO_DEFSTATE_ON),
|
||||
+ BCM47XX_GPIO_LED(2, "white", "wps", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+ BCM47XX_GPIO_LED(3, "orange", "wps", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+ BCM47XX_GPIO_LED(7, "green", "dmz", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+};
|
||||
+
|
||||
static const struct gpio_led
|
||||
bcm47xx_leds_linksys_wrt610nv1[] __initconst = {
|
||||
BCM47XX_GPIO_LED(0, "unk", "usb", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
@@ -333,11 +352,10 @@ bcm47xx_leds_linksys_wrt610nv2[] __initc
|
||||
|
||||
static const struct gpio_led
|
||||
bcm47xx_leds_linksys_wrtsl54gs[] __initconst = {
|
||||
- BCM47XX_GPIO_LED(0, "unk", "wlan", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
- BCM47XX_GPIO_LED(1, "unk", "power", 0, LEDS_GPIO_DEFSTATE_ON),
|
||||
- BCM47XX_GPIO_LED(2, "white", "wps", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
- BCM47XX_GPIO_LED(3, "orange", "wps", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
- BCM47XX_GPIO_LED(7, "unk", "dmz", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+ BCM47XX_GPIO_LED(0, "green", "dmz", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+ BCM47XX_GPIO_LED(1, "green", "power", 0, LEDS_GPIO_DEFSTATE_ON),
|
||||
+ BCM47XX_GPIO_LED(5, "white", "wps", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+ BCM47XX_GPIO_LED(7, "orange", "wps", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
};
|
||||
|
||||
/* Motorola */
|
||||
@@ -385,6 +403,15 @@ bcm47xx_leds_netgear_wndr4500v1[] __init
|
||||
};
|
||||
|
||||
static const struct gpio_led
|
||||
+bcm47xx_leds_netgear_wnr3500lv1[] __initconst = {
|
||||
+ BCM47XX_GPIO_LED(0, "blue", "wlan", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+ BCM47XX_GPIO_LED(1, "green", "wps", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+ BCM47XX_GPIO_LED(2, "green", "wan", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+ BCM47XX_GPIO_LED(3, "green", "power", 0, LEDS_GPIO_DEFSTATE_ON),
|
||||
+ BCM47XX_GPIO_LED(7, "amber", "power", 0, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+};
|
||||
+
|
||||
+static const struct gpio_led
|
||||
bcm47xx_leds_netgear_wnr834bv2[] __initconst = {
|
||||
BCM47XX_GPIO_LED(2, "green", "power", 0, LEDS_GPIO_DEFSTATE_ON),
|
||||
BCM47XX_GPIO_LED(3, "amber", "power", 0, LEDS_GPIO_DEFSTATE_OFF),
|
||||
@@ -425,6 +452,9 @@ void __init bcm47xx_leds_register(void)
|
||||
case BCM47XX_BOARD_ASUS_RTN12:
|
||||
bcm47xx_set_pdata(bcm47xx_leds_asus_rtn12);
|
||||
break;
|
||||
+ case BCM47XX_BOARD_ASUS_RTN15U:
|
||||
+ bcm47xx_set_pdata(bcm47xx_leds_asus_rtn15u);
|
||||
+ break;
|
||||
case BCM47XX_BOARD_ASUS_RTN16:
|
||||
bcm47xx_set_pdata(bcm47xx_leds_asus_rtn16);
|
||||
break;
|
||||
@@ -553,6 +583,8 @@ void __init bcm47xx_leds_register(void)
|
||||
bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt54g_type_0101);
|
||||
break;
|
||||
case BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0467:
|
||||
+ bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt54g_type_0467);
|
||||
+ break;
|
||||
case BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0708:
|
||||
bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt54g_generic);
|
||||
break;
|
||||
@@ -582,6 +614,9 @@ void __init bcm47xx_leds_register(void)
|
||||
case BCM47XX_BOARD_NETGEAR_WNDR4500V1:
|
||||
bcm47xx_set_pdata(bcm47xx_leds_netgear_wndr4500v1);
|
||||
break;
|
||||
+ case BCM47XX_BOARD_NETGEAR_WNR3500L:
|
||||
+ bcm47xx_set_pdata(bcm47xx_leds_netgear_wnr3500lv1);
|
||||
+ break;
|
||||
case BCM47XX_BOARD_NETGEAR_WNR834BV2:
|
||||
bcm47xx_set_pdata(bcm47xx_leds_netgear_wnr834bv2);
|
||||
break;
|
||||
--- a/arch/mips/bcm47xx/buttons.c
|
||||
+++ b/arch/mips/bcm47xx/buttons.c
|
||||
@@ -329,6 +329,12 @@ bcm47xx_buttons_netgear_wndr4500v1[] __i
|
||||
};
|
||||
|
||||
static const struct gpio_keys_button
|
||||
+bcm47xx_buttons_netgear_wnr3500lv1[] __initconst = {
|
||||
+ BCM47XX_GPIO_KEY(4, KEY_RESTART),
|
||||
+ BCM47XX_GPIO_KEY(6, KEY_WPS_BUTTON),
|
||||
+};
|
||||
+
|
||||
+static const struct gpio_keys_button
|
||||
bcm47xx_buttons_netgear_wnr834bv2[] __initconst = {
|
||||
BCM47XX_GPIO_KEY(6, KEY_RESTART),
|
||||
};
|
||||
@@ -538,6 +544,9 @@ int __init bcm47xx_buttons_register(void
|
||||
case BCM47XX_BOARD_NETGEAR_WNDR4500V1:
|
||||
err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wndr4500v1);
|
||||
break;
|
||||
+ case BCM47XX_BOARD_NETGEAR_WNR3500L:
|
||||
+ err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wnr3500lv1);
|
||||
+ break;
|
||||
case BCM47XX_BOARD_NETGEAR_WNR834BV2:
|
||||
err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wnr834bv2);
|
||||
break;
|
|
@ -1,22 +0,0 @@
|
|||
From 3d0704e7d371ea3ea5c8fe5bd796f5f15d44da59 Mon Sep 17 00:00:00 2001
|
||||
From: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
Date: Sat, 12 Jul 2014 18:01:32 +0200
|
||||
Subject: [PATCH 3/5] MIPS: BCM47XX: fix detection of Asus RT-N10D
|
||||
|
||||
Sometimes we do not have a productid, but only a hardware_version.
|
||||
|
||||
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
---
|
||||
arch/mips/bcm47xx/board.c | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
--- a/arch/mips/bcm47xx/board.c
|
||||
+++ b/arch/mips/bcm47xx/board.c
|
||||
@@ -58,6 +58,7 @@ struct bcm47xx_board_type_list1 bcm47xx_
|
||||
static const
|
||||
struct bcm47xx_board_type_list1 bcm47xx_board_list_hardware_version[] __initconst = {
|
||||
{{BCM47XX_BOARD_ASUS_RTN10U, "Asus RT-N10U"}, "RTN10U"},
|
||||
+ {{BCM47XX_BOARD_ASUS_RTN10D, "Asus RT-N10D"}, "RTN10D"},
|
||||
{{BCM47XX_BOARD_ASUS_RTN12, "Asus RT-N12"}, "RT-N12"},
|
||||
{{BCM47XX_BOARD_ASUS_RTN12B1, "Asus RT-N12B1"}, "RTN12B1"},
|
||||
{{BCM47XX_BOARD_ASUS_RTN12C1, "Asus RT-N12C1"}, "RTN12C1"},
|
|
@ -1,23 +0,0 @@
|
|||
From 9ccf31da4cac8fdb58d3d47f21b9fc7d2857026d Mon Sep 17 00:00:00 2001
|
||||
From: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
Date: Mon, 14 Jul 2014 23:15:32 +0200
|
||||
Subject: [PATCH 4/5] MIPS: BCM47XX: fix name of Dell TrueMobile 2300
|
||||
|
||||
This looks like a copy and paste error in the initial version.
|
||||
|
||||
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
---
|
||||
arch/mips/bcm47xx/board.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
--- a/arch/mips/bcm47xx/board.c
|
||||
+++ b/arch/mips/bcm47xx/board.c
|
||||
@@ -99,7 +99,7 @@ struct bcm47xx_board_type_list1 bcm47xx_
|
||||
/* ModelId */
|
||||
static const
|
||||
struct bcm47xx_board_type_list1 bcm47xx_board_list_ModelId[] __initconst = {
|
||||
- {{BCM47XX_BOARD_DELL_TM2300, "Dell WX-5565"}, "WX-5565"},
|
||||
+ {{BCM47XX_BOARD_DELL_TM2300, "Dell TrueMobile 2300"}, "WX-5565"},
|
||||
{{BCM47XX_BOARD_MOTOROLA_WE800G, "Motorola WE800G"}, "WE800G"},
|
||||
{{BCM47XX_BOARD_MOTOROLA_WR850GP, "Motorola WR850GP"}, "WR850GP"},
|
||||
{{BCM47XX_BOARD_MOTOROLA_WR850GV2V3, "Motorola WR850G"}, "WR850G"},
|
|
@ -1,165 +0,0 @@
|
|||
From 35661c37bde151764e8526e77d4e02ca77e19160 Mon Sep 17 00:00:00 2001
|
||||
From: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
Date: Mon, 14 Jul 2014 23:32:10 +0200
|
||||
Subject: [PATCH 5/5] MIPS: BCM47XX: add some more devices
|
||||
|
||||
This adds Microsoft MN-700 and Asus WL500G.
|
||||
|
||||
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
---
|
||||
arch/mips/bcm47xx/board.c | 17 +++++++++++++++++
|
||||
arch/mips/bcm47xx/buttons.c | 19 +++++++++++++++++++
|
||||
arch/mips/bcm47xx/leds.c | 19 +++++++++++++++++++
|
||||
arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h | 3 +++
|
||||
4 files changed, 58 insertions(+)
|
||||
|
||||
--- a/arch/mips/bcm47xx/board.c
|
||||
+++ b/arch/mips/bcm47xx/board.c
|
||||
@@ -81,6 +81,14 @@ struct bcm47xx_board_type_list1 bcm47xx_
|
||||
{ {0}, NULL},
|
||||
};
|
||||
|
||||
+/* hardware_version, boardnum */
|
||||
+static const
|
||||
+struct bcm47xx_board_type_list2 bcm47xx_board_list_hw_version_num[] __initconst = {
|
||||
+ {{BCM47XX_BOARD_MICROSOFT_MN700, "Microsoft MN-700"}, "WL500-", "mn700"},
|
||||
+ {{BCM47XX_BOARD_ASUS_WL500G, "Asus WL500G"}, "WL500-", "asusX"},
|
||||
+ { {0}, NULL},
|
||||
+};
|
||||
+
|
||||
/* productid */
|
||||
static const
|
||||
struct bcm47xx_board_type_list1 bcm47xx_board_list_productid[] __initconst = {
|
||||
@@ -238,6 +246,15 @@ static __init const struct bcm47xx_board
|
||||
}
|
||||
}
|
||||
|
||||
+ if (bcm47xx_nvram_getenv("hardware_version", buf1, sizeof(buf1)) >= 0 &&
|
||||
+ bcm47xx_nvram_getenv("boardtype", buf2, sizeof(buf2)) >= 0) {
|
||||
+ for (e2 = bcm47xx_board_list_boot_hw; e2->value1; e2++) {
|
||||
+ if (!strstarts(buf1, e2->value1) &&
|
||||
+ !strcmp(buf2, e2->value2))
|
||||
+ return &e2->board;
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
if (bcm47xx_nvram_getenv("productid", buf1, sizeof(buf1)) >= 0) {
|
||||
for (e1 = bcm47xx_board_list_productid; e1->value1; e1++) {
|
||||
if (!strcmp(buf1, e1->value1))
|
||||
--- a/arch/mips/bcm47xx/buttons.c
|
||||
+++ b/arch/mips/bcm47xx/buttons.c
|
||||
@@ -56,6 +56,11 @@ bcm47xx_buttons_asus_wl330ge[] __initcon
|
||||
};
|
||||
|
||||
static const struct gpio_keys_button
|
||||
+bcm47xx_buttons_asus_wl500g[] __initconst = {
|
||||
+ BCM47XX_GPIO_KEY(6, KEY_RESTART),
|
||||
+};
|
||||
+
|
||||
+static const struct gpio_keys_button
|
||||
bcm47xx_buttons_asus_wl500gd[] __initconst = {
|
||||
BCM47XX_GPIO_KEY(6, KEY_RESTART),
|
||||
};
|
||||
@@ -288,6 +293,13 @@ bcm47xx_buttons_linksys_wrtsl54gs[] __in
|
||||
BCM47XX_GPIO_KEY(6, KEY_RESTART),
|
||||
};
|
||||
|
||||
+/* Microsoft */
|
||||
+
|
||||
+static const struct gpio_keys_button
|
||||
+bcm47xx_buttons_microsoft_nm700[] __initconst = {
|
||||
+ BCM47XX_GPIO_KEY(7, KEY_RESTART),
|
||||
+};
|
||||
+
|
||||
/* Motorola */
|
||||
|
||||
static const struct gpio_keys_button
|
||||
@@ -401,6 +413,9 @@ int __init bcm47xx_buttons_register(void
|
||||
case BCM47XX_BOARD_ASUS_WL330GE:
|
||||
err = bcm47xx_copy_bdata(bcm47xx_buttons_asus_wl330ge);
|
||||
break;
|
||||
+ case BCM47XX_BOARD_ASUS_WL500G:
|
||||
+ err = bcm47xx_copy_bdata(bcm47xx_buttons_asus_wl500g);
|
||||
+ break;
|
||||
case BCM47XX_BOARD_ASUS_WL500GD:
|
||||
err = bcm47xx_copy_bdata(bcm47xx_buttons_asus_wl500gd);
|
||||
break;
|
||||
@@ -525,6 +540,10 @@ int __init bcm47xx_buttons_register(void
|
||||
err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrtsl54gs);
|
||||
break;
|
||||
|
||||
+ case BCM47XX_BOARD_MICROSOFT_MN700:
|
||||
+ err = bcm47xx_copy_bdata(bcm47xx_buttons_microsoft_nm700);
|
||||
+ break;
|
||||
+
|
||||
case BCM47XX_BOARD_MOTOROLA_WE800G:
|
||||
err = bcm47xx_copy_bdata(bcm47xx_buttons_motorola_we800g);
|
||||
break;
|
||||
--- a/arch/mips/bcm47xx/leds.c
|
||||
+++ b/arch/mips/bcm47xx/leds.c
|
||||
@@ -73,6 +73,11 @@ bcm47xx_leds_asus_wl330ge[] __initconst
|
||||
};
|
||||
|
||||
static const struct gpio_led
|
||||
+bcm47xx_leds_asus_wl500g[] __initconst = {
|
||||
+ BCM47XX_GPIO_LED(0, "unk", "power", 1, LEDS_GPIO_DEFSTATE_ON),
|
||||
+};
|
||||
+
|
||||
+static const struct gpio_led
|
||||
bcm47xx_leds_asus_wl500gd[] __initconst = {
|
||||
BCM47XX_GPIO_LED(0, "unk", "power", 1, LEDS_GPIO_DEFSTATE_ON),
|
||||
};
|
||||
@@ -358,6 +363,13 @@ bcm47xx_leds_linksys_wrtsl54gs[] __initc
|
||||
BCM47XX_GPIO_LED(7, "orange", "wps", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
};
|
||||
|
||||
+/* Microsoft */
|
||||
+
|
||||
+static const struct gpio_led
|
||||
+bcm47xx_leds_microsoft_nm700[] __initconst = {
|
||||
+ BCM47XX_GPIO_LED(6, "unk", "power", 0, LEDS_GPIO_DEFSTATE_ON),
|
||||
+};
|
||||
+
|
||||
/* Motorola */
|
||||
|
||||
static const struct gpio_led
|
||||
@@ -470,6 +482,9 @@ void __init bcm47xx_leds_register(void)
|
||||
case BCM47XX_BOARD_ASUS_WL330GE:
|
||||
bcm47xx_set_pdata(bcm47xx_leds_asus_wl330ge);
|
||||
break;
|
||||
+ case BCM47XX_BOARD_ASUS_WL500G:
|
||||
+ bcm47xx_set_pdata(bcm47xx_leds_asus_wl500g);
|
||||
+ break;
|
||||
case BCM47XX_BOARD_ASUS_WL500GD:
|
||||
bcm47xx_set_pdata(bcm47xx_leds_asus_wl500gd);
|
||||
break;
|
||||
@@ -598,6 +613,10 @@ void __init bcm47xx_leds_register(void)
|
||||
bcm47xx_set_pdata(bcm47xx_leds_linksys_wrtsl54gs);
|
||||
break;
|
||||
|
||||
+ case BCM47XX_BOARD_MICROSOFT_MN700:
|
||||
+ bcm47xx_set_pdata(bcm47xx_leds_microsoft_nm700);
|
||||
+ break;
|
||||
+
|
||||
case BCM47XX_BOARD_MOTOROLA_WE800G:
|
||||
bcm47xx_set_pdata(bcm47xx_leds_motorola_we800g);
|
||||
break;
|
||||
--- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h
|
||||
@@ -18,6 +18,7 @@ enum bcm47xx_board {
|
||||
BCM47XX_BOARD_ASUS_WL300G,
|
||||
BCM47XX_BOARD_ASUS_WL320GE,
|
||||
BCM47XX_BOARD_ASUS_WL330GE,
|
||||
+ BCM47XX_BOARD_ASUS_WL500G,
|
||||
BCM47XX_BOARD_ASUS_WL500GD,
|
||||
BCM47XX_BOARD_ASUS_WL500GPV1,
|
||||
BCM47XX_BOARD_ASUS_WL500GPV2,
|
||||
@@ -77,6 +78,8 @@ enum bcm47xx_board {
|
||||
BCM47XX_BOARD_LINKSYS_WRT610NV2,
|
||||
BCM47XX_BOARD_LINKSYS_WRTSL54GS,
|
||||
|
||||
+ BCM47XX_BOARD_MICROSOFT_MN700,
|
||||
+
|
||||
BCM47XX_BOARD_MOTOROLA_WE800G,
|
||||
BCM47XX_BOARD_MOTOROLA_WR850GP,
|
||||
BCM47XX_BOARD_MOTOROLA_WR850GV2V3,
|
|
@ -1,373 +0,0 @@
|
|||
--- a/arch/mips/include/asm/r4kcache.h
|
||||
+++ b/arch/mips/include/asm/r4kcache.h
|
||||
@@ -18,6 +18,20 @@
|
||||
#include <asm/cpu-type.h>
|
||||
#include <asm/mipsmtregs.h>
|
||||
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+#include <asm/paccess.h>
|
||||
+#include <linux/ssb/ssb.h>
|
||||
+#define BCM4710_DUMMY_RREG() ((void) *((u8 *) KSEG1ADDR(SSB_ENUM_BASE)))
|
||||
+
|
||||
+#define BCM4710_FILL_TLB(addr) (*(volatile unsigned long *)(addr))
|
||||
+#define BCM4710_PROTECTED_FILL_TLB(addr) ({ unsigned long x; get_dbe(x, (volatile unsigned long *)(addr)); })
|
||||
+#else
|
||||
+#define BCM4710_DUMMY_RREG()
|
||||
+
|
||||
+#define BCM4710_FILL_TLB(addr)
|
||||
+#define BCM4710_PROTECTED_FILL_TLB(addr)
|
||||
+#endif
|
||||
+
|
||||
/*
|
||||
* This macro return a properly sign-extended address suitable as base address
|
||||
* for indexed cache operations. Two issues here:
|
||||
@@ -151,6 +165,7 @@ static inline void flush_icache_line_ind
|
||||
static inline void flush_dcache_line_indexed(unsigned long addr)
|
||||
{
|
||||
__dflush_prologue
|
||||
+ BCM4710_DUMMY_RREG();
|
||||
cache_op(Index_Writeback_Inv_D, addr);
|
||||
__dflush_epilogue
|
||||
}
|
||||
@@ -178,6 +193,7 @@ static inline void flush_icache_line(uns
|
||||
static inline void flush_dcache_line(unsigned long addr)
|
||||
{
|
||||
__dflush_prologue
|
||||
+ BCM4710_DUMMY_RREG();
|
||||
cache_op(Hit_Writeback_Inv_D, addr);
|
||||
__dflush_epilogue
|
||||
}
|
||||
@@ -185,6 +201,7 @@ static inline void flush_dcache_line(uns
|
||||
static inline void invalidate_dcache_line(unsigned long addr)
|
||||
{
|
||||
__dflush_prologue
|
||||
+ BCM4710_DUMMY_RREG();
|
||||
cache_op(Hit_Invalidate_D, addr);
|
||||
__dflush_epilogue
|
||||
}
|
||||
@@ -223,6 +240,7 @@ static inline void protected_flush_icach
|
||||
break;
|
||||
|
||||
default:
|
||||
+ BCM4710_DUMMY_RREG();
|
||||
protected_cache_op(Hit_Invalidate_I, addr);
|
||||
break;
|
||||
}
|
||||
@@ -236,6 +254,7 @@ static inline void protected_flush_icach
|
||||
*/
|
||||
static inline void protected_writeback_dcache_line(unsigned long addr)
|
||||
{
|
||||
+ BCM4710_DUMMY_RREG();
|
||||
protected_cache_op(Hit_Writeback_Inv_D, addr);
|
||||
}
|
||||
|
||||
@@ -356,8 +375,51 @@ static inline void invalidate_tcache_pag
|
||||
: "r" (base), \
|
||||
"i" (op));
|
||||
|
||||
+static inline void blast_dcache(void)
|
||||
+{
|
||||
+ unsigned long start = KSEG0;
|
||||
+ unsigned long dcache_size = current_cpu_data.dcache.waysize * current_cpu_data.dcache.ways;
|
||||
+ unsigned long end = (start + dcache_size);
|
||||
+
|
||||
+ do {
|
||||
+ BCM4710_DUMMY_RREG();
|
||||
+ cache_op(Index_Writeback_Inv_D, start);
|
||||
+ start += current_cpu_data.dcache.linesz;
|
||||
+ } while(start < end);
|
||||
+}
|
||||
+
|
||||
+static inline void blast_dcache_page(unsigned long page)
|
||||
+{
|
||||
+ unsigned long start = page;
|
||||
+ unsigned long end = start + PAGE_SIZE;
|
||||
+
|
||||
+ BCM4710_FILL_TLB(start);
|
||||
+ do {
|
||||
+ BCM4710_DUMMY_RREG();
|
||||
+ cache_op(Hit_Writeback_Inv_D, start);
|
||||
+ start += current_cpu_data.dcache.linesz;
|
||||
+ } while(start < end);
|
||||
+}
|
||||
+
|
||||
+static inline void blast_dcache_page_indexed(unsigned long page)
|
||||
+{
|
||||
+ unsigned long start = page;
|
||||
+ unsigned long end = start + PAGE_SIZE;
|
||||
+ unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit;
|
||||
+ unsigned long ws_end = current_cpu_data.dcache.ways <<
|
||||
+ current_cpu_data.dcache.waybit;
|
||||
+ unsigned long ws, addr;
|
||||
+ for (ws = 0; ws < ws_end; ws += ws_inc) {
|
||||
+ start = page + ws;
|
||||
+ for (addr = start; addr < end; addr += current_cpu_data.dcache.linesz) {
|
||||
+ BCM4710_DUMMY_RREG();
|
||||
+ cache_op(Index_Writeback_Inv_D, addr);
|
||||
+ }
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
/* build blast_xxx, blast_xxx_page, blast_xxx_page_indexed */
|
||||
-#define __BUILD_BLAST_CACHE(pfx, desc, indexop, hitop, lsize, extra) \
|
||||
+#define __BUILD_BLAST_CACHE(pfx, desc, indexop, hitop, lsize, extra, war) \
|
||||
static inline void extra##blast_##pfx##cache##lsize(void) \
|
||||
{ \
|
||||
unsigned long start = INDEX_BASE; \
|
||||
@@ -369,6 +431,7 @@ static inline void extra##blast_##pfx##c
|
||||
\
|
||||
__##pfx##flush_prologue \
|
||||
\
|
||||
+ war \
|
||||
for (ws = 0; ws < ws_end; ws += ws_inc) \
|
||||
for (addr = start; addr < end; addr += lsize * 32) \
|
||||
cache##lsize##_unroll32(addr|ws, indexop); \
|
||||
@@ -383,6 +446,7 @@ static inline void extra##blast_##pfx##c
|
||||
\
|
||||
__##pfx##flush_prologue \
|
||||
\
|
||||
+ war \
|
||||
do { \
|
||||
cache##lsize##_unroll32(start, hitop); \
|
||||
start += lsize * 32; \
|
||||
@@ -401,6 +465,8 @@ static inline void extra##blast_##pfx##c
|
||||
current_cpu_data.desc.waybit; \
|
||||
unsigned long ws, addr; \
|
||||
\
|
||||
+ war \
|
||||
+ \
|
||||
__##pfx##flush_prologue \
|
||||
\
|
||||
for (ws = 0; ws < ws_end; ws += ws_inc) \
|
||||
@@ -410,37 +476,40 @@ static inline void extra##blast_##pfx##c
|
||||
__##pfx##flush_epilogue \
|
||||
}
|
||||
|
||||
-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16, )
|
||||
-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16, )
|
||||
-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16, )
|
||||
-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32, )
|
||||
-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32, )
|
||||
-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I_Loongson2, 32, loongson2_)
|
||||
-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32, )
|
||||
-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64, )
|
||||
-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64, )
|
||||
-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64, )
|
||||
-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128, )
|
||||
-
|
||||
-__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16, )
|
||||
-__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32, )
|
||||
-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16, )
|
||||
-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32, )
|
||||
-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64, )
|
||||
-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128, )
|
||||
+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16, , )
|
||||
+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16, , BCM4710_FILL_TLB(start);)
|
||||
+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16, , )
|
||||
+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32, , )
|
||||
+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32, , BCM4710_FILL_TLB(start);)
|
||||
+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I_Loongson2, 32, loongson2_, BCM4710_FILL_TLB(start);)
|
||||
+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32, , )
|
||||
+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64, , )
|
||||
+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64, , BCM4710_FILL_TLB(start);)
|
||||
+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64, , )
|
||||
+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128, , )
|
||||
+
|
||||
+__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16, , )
|
||||
+__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32, , )
|
||||
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16, , )
|
||||
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32, , )
|
||||
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64, , )
|
||||
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128, , )
|
||||
+
|
||||
|
||||
/* build blast_xxx_range, protected_blast_xxx_range */
|
||||
-#define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot, extra) \
|
||||
+#define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot, extra, war, war2) \
|
||||
static inline void prot##extra##blast_##pfx##cache##_range(unsigned long start, \
|
||||
unsigned long end) \
|
||||
{ \
|
||||
unsigned long lsize = cpu_##desc##_line_size(); \
|
||||
unsigned long addr = start & ~(lsize - 1); \
|
||||
unsigned long aend = (end - 1) & ~(lsize - 1); \
|
||||
+ war \
|
||||
\
|
||||
__##pfx##flush_prologue \
|
||||
\
|
||||
while (1) { \
|
||||
+ war2 \
|
||||
prot##cache_op(hitop, addr); \
|
||||
if (addr == aend) \
|
||||
break; \
|
||||
@@ -450,15 +519,15 @@ static inline void prot##extra##blast_##
|
||||
__##pfx##flush_epilogue \
|
||||
}
|
||||
|
||||
-__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_, )
|
||||
-__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_, )
|
||||
-__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_, )
|
||||
+__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_, , BCM4710_PROTECTED_FILL_TLB(addr); BCM4710_PROTECTED_FILL_TLB(aend);, BCM4710_DUMMY_RREG();)
|
||||
+__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_, , , )
|
||||
+__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_, , , )
|
||||
__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I_Loongson2, \
|
||||
- protected_, loongson2_)
|
||||
-__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, , )
|
||||
-__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, , )
|
||||
+ protected_, loongson2_, , )
|
||||
+__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, , , BCM4710_FILL_TLB(addr); BCM4710_FILL_TLB(aend);, BCM4710_DUMMY_RREG();)
|
||||
+__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, , , , )
|
||||
/* blast_inv_dcache_range */
|
||||
-__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, , )
|
||||
-__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, , )
|
||||
+__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, , , , BCM4710_DUMMY_RREG();)
|
||||
+__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, , , , )
|
||||
|
||||
#endif /* _ASM_R4KCACHE_H */
|
||||
--- a/arch/mips/include/asm/stackframe.h
|
||||
+++ b/arch/mips/include/asm/stackframe.h
|
||||
@@ -436,6 +436,10 @@
|
||||
.macro RESTORE_SP_AND_RET
|
||||
LONG_L sp, PT_R29(sp)
|
||||
.set mips3
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+ nop
|
||||
+ nop
|
||||
+#endif
|
||||
eret
|
||||
.set mips0
|
||||
.endm
|
||||
--- a/arch/mips/kernel/genex.S
|
||||
+++ b/arch/mips/kernel/genex.S
|
||||
@@ -46,6 +46,10 @@
|
||||
NESTED(except_vec3_generic, 0, sp)
|
||||
.set push
|
||||
.set noat
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+ nop
|
||||
+ nop
|
||||
+#endif
|
||||
#if R5432_CP0_INTERRUPT_WAR
|
||||
mfc0 k0, CP0_INDEX
|
||||
#endif
|
||||
--- a/arch/mips/mm/c-r4k.c
|
||||
+++ b/arch/mips/mm/c-r4k.c
|
||||
@@ -37,6 +37,9 @@
|
||||
#include <asm/traps.h>
|
||||
#include <asm/dma-coherence.h>
|
||||
|
||||
+/* For enabling BCM4710 cache workarounds */
|
||||
+int bcm4710 = 0;
|
||||
+
|
||||
/*
|
||||
* Special Variant of smp_call_function for use by cache functions:
|
||||
*
|
||||
@@ -113,6 +116,9 @@ static void r4k_blast_dcache_page_setup(
|
||||
{
|
||||
unsigned long dc_lsize = cpu_dcache_line_size();
|
||||
|
||||
+ if (bcm4710)
|
||||
+ r4k_blast_dcache_page = blast_dcache_page;
|
||||
+ else
|
||||
if (dc_lsize == 0)
|
||||
r4k_blast_dcache_page = (void *)cache_noop;
|
||||
else if (dc_lsize == 16)
|
||||
@@ -129,6 +135,9 @@ static void r4k_blast_dcache_page_indexe
|
||||
{
|
||||
unsigned long dc_lsize = cpu_dcache_line_size();
|
||||
|
||||
+ if (bcm4710)
|
||||
+ r4k_blast_dcache_page_indexed = blast_dcache_page_indexed;
|
||||
+ else
|
||||
if (dc_lsize == 0)
|
||||
r4k_blast_dcache_page_indexed = (void *)cache_noop;
|
||||
else if (dc_lsize == 16)
|
||||
@@ -146,6 +155,9 @@ static void r4k_blast_dcache_setup(void)
|
||||
{
|
||||
unsigned long dc_lsize = cpu_dcache_line_size();
|
||||
|
||||
+ if (bcm4710)
|
||||
+ r4k_blast_dcache = blast_dcache;
|
||||
+ else
|
||||
if (dc_lsize == 0)
|
||||
r4k_blast_dcache = (void *)cache_noop;
|
||||
else if (dc_lsize == 16)
|
||||
@@ -703,6 +715,8 @@ static void local_r4k_flush_cache_sigtra
|
||||
unsigned long addr = (unsigned long) arg;
|
||||
|
||||
R4600_HIT_CACHEOP_WAR_IMPL;
|
||||
+ BCM4710_PROTECTED_FILL_TLB(addr);
|
||||
+ BCM4710_PROTECTED_FILL_TLB(addr + 4);
|
||||
if (dc_lsize)
|
||||
protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
|
||||
if (!cpu_icache_snoops_remote_store && scache_size)
|
||||
@@ -1403,6 +1417,17 @@ static void coherency_setup(void)
|
||||
* silly idea of putting something else there ...
|
||||
*/
|
||||
switch (current_cpu_type()) {
|
||||
+ case CPU_BMIPS3300:
|
||||
+ {
|
||||
+ u32 cm;
|
||||
+ cm = read_c0_diag();
|
||||
+ /* Enable icache */
|
||||
+ cm |= (1 << 31);
|
||||
+ /* Enable dcache */
|
||||
+ cm |= (1 << 30);
|
||||
+ write_c0_diag(cm);
|
||||
+ }
|
||||
+ break;
|
||||
case CPU_R4000PC:
|
||||
case CPU_R4000SC:
|
||||
case CPU_R4000MC:
|
||||
@@ -1449,6 +1474,15 @@ void r4k_cache_init(void)
|
||||
extern void build_copy_page(void);
|
||||
struct cpuinfo_mips *c = ¤t_cpu_data;
|
||||
|
||||
+ /* Check if special workarounds are required */
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+ if (current_cpu_data.cputype == CPU_BMIPS32 && (current_cpu_data.processor_id & 0xff) == 0) {
|
||||
+ printk("Enabling BCM4710A0 cache workarounds.\n");
|
||||
+ bcm4710 = 1;
|
||||
+ } else
|
||||
+#endif
|
||||
+ bcm4710 = 0;
|
||||
+
|
||||
probe_pcache();
|
||||
setup_scache();
|
||||
|
||||
@@ -1514,6 +1548,14 @@ void r4k_cache_init(void)
|
||||
*/
|
||||
local_r4k___flush_cache_all(NULL);
|
||||
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+ {
|
||||
+ static void (*_coherency_setup)(void);
|
||||
+ _coherency_setup = (void (*)(void)) KSEG1ADDR(coherency_setup);
|
||||
+ _coherency_setup();
|
||||
+ }
|
||||
+#else
|
||||
coherency_setup();
|
||||
+#endif
|
||||
board_cache_error_setup = r4k_cache_error_setup;
|
||||
}
|
||||
--- a/arch/mips/mm/tlbex.c
|
||||
+++ b/arch/mips/mm/tlbex.c
|
||||
@@ -1277,6 +1277,9 @@ static void build_r4000_tlb_refill_handl
|
||||
/* No need for uasm_i_nop */
|
||||
}
|
||||
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+ uasm_i_nop(&p);
|
||||
+#endif
|
||||
#ifdef CONFIG_64BIT
|
||||
build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */
|
||||
#else
|
||||
@@ -1835,6 +1838,9 @@ build_r4000_tlbchange_handler_head(u32 *
|
||||
{
|
||||
struct work_registers wr = build_get_work_registers(p);
|
||||
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+ uasm_i_nop(p);
|
||||
+#endif
|
||||
#ifdef CONFIG_64BIT
|
||||
build_get_pmde64(p, l, r, wr.r1, wr.r2); /* get pmd in ptr */
|
||||
#else
|
|
@ -1,70 +0,0 @@
|
|||
--- a/arch/mips/include/asm/cpu-features.h
|
||||
+++ b/arch/mips/include/asm/cpu-features.h
|
||||
@@ -133,6 +133,9 @@
|
||||
#ifndef cpu_has_local_ebase
|
||||
#define cpu_has_local_ebase 1
|
||||
#endif
|
||||
+#ifndef cpu_use_kmap_coherent
|
||||
+#define cpu_use_kmap_coherent 1
|
||||
+#endif
|
||||
|
||||
/*
|
||||
* I-Cache snoops remote store. This only matters on SMP. Some multiprocessors
|
||||
--- a/arch/mips/include/asm/mach-bcm47xx/cpu-feature-overrides.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm47xx/cpu-feature-overrides.h
|
||||
@@ -79,4 +79,6 @@
|
||||
#define cpu_scache_line_size() 0
|
||||
#define cpu_has_vz 0
|
||||
|
||||
+#define cpu_use_kmap_coherent 0
|
||||
+
|
||||
#endif /* __ASM_MACH_BCM47XX_CPU_FEATURE_OVERRIDES_H */
|
||||
--- a/arch/mips/mm/c-r4k.c
|
||||
+++ b/arch/mips/mm/c-r4k.c
|
||||
@@ -523,7 +523,7 @@ static inline void local_r4k_flush_cache
|
||||
*/
|
||||
map_coherent = (cpu_has_dc_aliases &&
|
||||
page_mapped(page) && !Page_dcache_dirty(page));
|
||||
- if (map_coherent)
|
||||
+ if (map_coherent && cpu_use_kmap_coherent)
|
||||
vaddr = kmap_coherent(page, addr);
|
||||
else
|
||||
vaddr = kmap_atomic(page);
|
||||
@@ -546,7 +546,7 @@ static inline void local_r4k_flush_cache
|
||||
}
|
||||
|
||||
if (vaddr) {
|
||||
- if (map_coherent)
|
||||
+ if (map_coherent && cpu_use_kmap_coherent)
|
||||
kunmap_coherent();
|
||||
else
|
||||
kunmap_atomic(vaddr);
|
||||
--- a/arch/mips/mm/init.c
|
||||
+++ b/arch/mips/mm/init.c
|
||||
@@ -200,7 +200,7 @@ void copy_user_highpage(struct page *to,
|
||||
void *vfrom, *vto;
|
||||
|
||||
vto = kmap_atomic(to);
|
||||
- if (cpu_has_dc_aliases &&
|
||||
+ if (cpu_has_dc_aliases && cpu_use_kmap_coherent &&
|
||||
page_mapped(from) && !Page_dcache_dirty(from)) {
|
||||
vfrom = kmap_coherent(from, vaddr);
|
||||
copy_page(vto, vfrom);
|
||||
@@ -222,7 +222,7 @@ void copy_to_user_page(struct vm_area_st
|
||||
struct page *page, unsigned long vaddr, void *dst, const void *src,
|
||||
unsigned long len)
|
||||
{
|
||||
- if (cpu_has_dc_aliases &&
|
||||
+ if (cpu_has_dc_aliases && cpu_use_kmap_coherent &&
|
||||
page_mapped(page) && !Page_dcache_dirty(page)) {
|
||||
void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
|
||||
memcpy(vto, src, len);
|
||||
@@ -240,7 +240,7 @@ void copy_from_user_page(struct vm_area_
|
||||
struct page *page, unsigned long vaddr, void *dst, const void *src,
|
||||
unsigned long len)
|
||||
{
|
||||
- if (cpu_has_dc_aliases &&
|
||||
+ if (cpu_has_dc_aliases && cpu_use_kmap_coherent &&
|
||||
page_mapped(page) && !Page_dcache_dirty(page)) {
|
||||
void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
|
||||
memcpy(dst, vfrom, len);
|
|
@ -1,68 +0,0 @@
|
|||
--- a/arch/mips/bcm47xx/sprom.c
|
||||
+++ b/arch/mips/bcm47xx/sprom.c
|
||||
@@ -28,6 +28,7 @@
|
||||
|
||||
#include <bcm47xx.h>
|
||||
#include <bcm47xx_nvram.h>
|
||||
+#include <linux/if_ether.h>
|
||||
|
||||
static void create_key(const char *prefix, const char *postfix,
|
||||
const char *name, char *buf, int len)
|
||||
@@ -631,6 +632,33 @@ static void bcm47xx_fill_sprom_path_r45(
|
||||
}
|
||||
}
|
||||
|
||||
+static bool bcm47xx_is_valid_mac(u8 *mac)
|
||||
+{
|
||||
+ return mac && !(mac[0] == 0x00 && mac[1] == 0x90 && mac[2] == 0x4c);
|
||||
+}
|
||||
+
|
||||
+static int bcm47xx_increase_mac_addr(u8 *mac, u8 num)
|
||||
+{
|
||||
+ u8 *oui = mac + ETH_ALEN/2 - 1;
|
||||
+ u8 *p = mac + ETH_ALEN - 1;
|
||||
+
|
||||
+ do {
|
||||
+ (*p) += num;
|
||||
+ if (*p > num)
|
||||
+ break;
|
||||
+ p--;
|
||||
+ num = 1;
|
||||
+ } while (p != oui);
|
||||
+
|
||||
+ if (p == oui) {
|
||||
+ pr_err("unable to fetch mac address\n");
|
||||
+ return -ENOENT;
|
||||
+ }
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int mac_addr_used = 2;
|
||||
+
|
||||
static void bcm47xx_fill_sprom_ethernet(struct ssb_sprom *sprom,
|
||||
const char *prefix, bool fallback)
|
||||
{
|
||||
@@ -648,6 +676,23 @@ static void bcm47xx_fill_sprom_ethernet(
|
||||
|
||||
nvram_read_macaddr(prefix, "macaddr", sprom->il0mac, fallback);
|
||||
nvram_read_macaddr(prefix, "il0macaddr", sprom->il0mac, fallback);
|
||||
+
|
||||
+ /* The address prefix 00:90:4C is used by Broadcom in their initial
|
||||
+ configuration. When a mac address with the prefix 00:90:4C is used
|
||||
+ all devices from the same series are sharing the same mac address.
|
||||
+ To prevent mac address collisions we replace them with a mac address
|
||||
+ based on the base address. */
|
||||
+ if (!bcm47xx_is_valid_mac(sprom->il0mac)) {
|
||||
+ u8 mac[6];
|
||||
+ nvram_read_macaddr(NULL, "et0macaddr", mac, false);
|
||||
+ if (bcm47xx_is_valid_mac(mac)) {
|
||||
+ int err = bcm47xx_increase_mac_addr(mac, mac_addr_used);
|
||||
+ if (!err) {
|
||||
+ memcpy(sprom->il0mac, mac, ETH_ALEN);
|
||||
+ mac_addr_used++;
|
||||
+ }
|
||||
+ }
|
||||
+ }
|
||||
}
|
||||
|
||||
static void bcm47xx_fill_board_data(struct ssb_sprom *sprom, const char *prefix,
|
|
@ -1,17 +0,0 @@
|
|||
--- a/arch/mips/bcm47xx/setup.c
|
||||
+++ b/arch/mips/bcm47xx/setup.c
|
||||
@@ -59,12 +59,12 @@ static void bcm47xx_machine_restart(char
|
||||
switch (bcm47xx_bus_type) {
|
||||
#ifdef CONFIG_BCM47XX_SSB
|
||||
case BCM47XX_BUS_TYPE_SSB:
|
||||
- ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1);
|
||||
+ ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 3);
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_BCM47XX_BCMA
|
||||
case BCM47XX_BUS_TYPE_BCMA:
|
||||
- bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 1);
|
||||
+ bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 3);
|
||||
break;
|
||||
#endif
|
||||
}
|
|
@ -1,122 +0,0 @@
|
|||
From b36f694256f41bc71571f467646d015dda128d14 Mon Sep 17 00:00:00 2001
|
||||
From: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
Date: Sat, 9 Nov 2013 17:03:59 +0100
|
||||
Subject: [PATCH 210/210] b44: register adm switch
|
||||
|
||||
---
|
||||
drivers/net/ethernet/broadcom/b44.c | 57 +++++++++++++++++++++++++++++++++++
|
||||
drivers/net/ethernet/broadcom/b44.h | 3 ++
|
||||
2 files changed, 60 insertions(+)
|
||||
|
||||
--- a/drivers/net/ethernet/broadcom/b44.c
|
||||
+++ b/drivers/net/ethernet/broadcom/b44.c
|
||||
@@ -31,6 +31,8 @@
|
||||
#include <linux/ssb/ssb.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/phy.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <linux/platform_data/adm6996-gpio.h>
|
||||
|
||||
#include <asm/uaccess.h>
|
||||
#include <asm/io.h>
|
||||
@@ -2239,6 +2241,70 @@ static void b44_adjust_link(struct net_d
|
||||
}
|
||||
}
|
||||
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+static int b44_register_adm_switch(struct b44 *bp)
|
||||
+{
|
||||
+ int gpio;
|
||||
+ struct platform_device *pdev;
|
||||
+ struct adm6996_gpio_platform_data adm_data = {0};
|
||||
+ struct platform_device_info info = {0};
|
||||
+
|
||||
+ adm_data.model = ADM6996L;
|
||||
+ gpio = bcm47xx_nvram_gpio_pin("adm_eecs");
|
||||
+ if (gpio >= 0)
|
||||
+ adm_data.eecs = gpio;
|
||||
+ else
|
||||
+ adm_data.eecs = 2;
|
||||
+
|
||||
+ gpio = bcm47xx_nvram_gpio_pin("adm_eesk");
|
||||
+ if (gpio >= 0)
|
||||
+ adm_data.eesk = gpio;
|
||||
+ else
|
||||
+ adm_data.eesk = 3;
|
||||
+
|
||||
+ gpio = bcm47xx_nvram_gpio_pin("adm_eedi");
|
||||
+ if (gpio >= 0)
|
||||
+ adm_data.eedi = gpio;
|
||||
+ else
|
||||
+ adm_data.eedi = 4;
|
||||
+
|
||||
+ gpio = bcm47xx_nvram_gpio_pin("adm_rc");
|
||||
+ if (gpio >= 0)
|
||||
+ adm_data.eerc = gpio;
|
||||
+ else
|
||||
+ adm_data.eerc = 5;
|
||||
+
|
||||
+ info.parent = bp->sdev->dev;
|
||||
+ info.name = "adm6996_gpio";
|
||||
+ info.id = -1;
|
||||
+ info.data = &adm_data;
|
||||
+ info.size_data = sizeof(adm_data);
|
||||
+
|
||||
+ if (!bp->adm_switch) {
|
||||
+ pdev = platform_device_register_full(&info);
|
||||
+ if (IS_ERR(pdev))
|
||||
+ return PTR_ERR(pdev);
|
||||
+
|
||||
+ bp->adm_switch = pdev;
|
||||
+ }
|
||||
+ return 0;
|
||||
+}
|
||||
+static void b44_unregister_adm_switch(struct b44 *bp)
|
||||
+{
|
||||
+ if (bp->adm_switch)
|
||||
+ platform_device_unregister(bp->adm_switch);
|
||||
+}
|
||||
+#else
|
||||
+static int b44_register_adm_switch(struct b44 *bp)
|
||||
+{
|
||||
+ return 0;
|
||||
+}
|
||||
+static void b44_unregister_adm_switch(struct b44 *bp)
|
||||
+{
|
||||
+
|
||||
+}
|
||||
+#endif /* CONFIG_BCM47XX */
|
||||
+
|
||||
static int b44_register_phy_one(struct b44 *bp)
|
||||
{
|
||||
struct mii_bus *mii_bus;
|
||||
@@ -2282,6 +2348,9 @@ static int b44_register_phy_one(struct b
|
||||
if (!bp->mii_bus->phy_map[bp->phy_addr] &&
|
||||
(sprom->boardflags_lo & (B44_BOARDFLAG_ROBO | B44_BOARDFLAG_ADM))) {
|
||||
|
||||
+ if (sprom->boardflags_lo & B44_BOARDFLAG_ADM)
|
||||
+ b44_register_adm_switch(bp);
|
||||
+
|
||||
dev_info(sdev->dev,
|
||||
"could not find PHY at %i, use fixed one\n",
|
||||
bp->phy_addr);
|
||||
@@ -2476,6 +2545,7 @@ static void b44_remove_one(struct ssb_de
|
||||
unregister_netdev(dev);
|
||||
if (bp->flags & B44_FLAG_EXTERNAL_PHY)
|
||||
b44_unregister_phy_one(bp);
|
||||
+ b44_unregister_adm_switch(bp);
|
||||
ssb_device_disable(sdev, 0);
|
||||
ssb_bus_may_powerdown(sdev->bus);
|
||||
free_netdev(dev);
|
||||
--- a/drivers/net/ethernet/broadcom/b44.h
|
||||
+++ b/drivers/net/ethernet/broadcom/b44.h
|
||||
@@ -404,6 +404,9 @@ struct b44 {
|
||||
struct mii_bus *mii_bus;
|
||||
int old_link;
|
||||
struct mii_if_info mii_if;
|
||||
+
|
||||
+ /* platform device for associated switch */
|
||||
+ struct platform_device *adm_switch;
|
||||
};
|
||||
|
||||
#endif /* _B44_H */
|
|
@ -1,54 +0,0 @@
|
|||
--- a/drivers/net/ethernet/broadcom/b44.c
|
||||
+++ b/drivers/net/ethernet/broadcom/b44.c
|
||||
@@ -431,10 +431,34 @@ static void b44_wap54g10_workaround(stru
|
||||
error:
|
||||
pr_warning("PHY: cannot reset MII transceiver isolate bit\n");
|
||||
}
|
||||
+
|
||||
+static void b44_bcm47xx_workarounds(struct b44 *bp)
|
||||
+{
|
||||
+ char buf[20];
|
||||
+ struct ssb_device *sdev = bp->sdev;
|
||||
+
|
||||
+ /* Toshiba WRC-1000, Siemens SE505 v1, Askey RT-210W, RT-220W */
|
||||
+ if (sdev->bus->sprom.board_num == 100) {
|
||||
+ bp->phy_addr = B44_PHY_ADDR_NO_LOCAL_PHY;
|
||||
+ } else {
|
||||
+ /* WL-HDD */
|
||||
+ if (bcm47xx_nvram_getenv("hardware_version", buf, sizeof(buf)) >= 0 &&
|
||||
+ !strncmp(buf, "WL300-", strlen("WL300-"))) {
|
||||
+ if (sdev->bus->sprom.et0phyaddr == 0 &&
|
||||
+ sdev->bus->sprom.et1phyaddr == 1)
|
||||
+ bp->phy_addr = B44_PHY_ADDR_NO_LOCAL_PHY;
|
||||
+ }
|
||||
+ }
|
||||
+ return;
|
||||
+}
|
||||
#else
|
||||
static inline void b44_wap54g10_workaround(struct b44 *bp)
|
||||
{
|
||||
}
|
||||
+
|
||||
+static inline void b44_bcm47xx_workarounds(struct b44 *bp)
|
||||
+{
|
||||
+}
|
||||
#endif
|
||||
|
||||
static int b44_setup_phy(struct b44 *bp)
|
||||
@@ -443,6 +467,7 @@ static int b44_setup_phy(struct b44 *bp)
|
||||
int err;
|
||||
|
||||
b44_wap54g10_workaround(bp);
|
||||
+ b44_bcm47xx_workarounds(bp);
|
||||
|
||||
if (bp->flags & B44_FLAG_EXTERNAL_PHY)
|
||||
return 0;
|
||||
@@ -2169,6 +2194,8 @@ static int b44_get_invariants(struct b44
|
||||
* valid PHY address. */
|
||||
bp->phy_addr &= 0x1F;
|
||||
|
||||
+ b44_bcm47xx_workarounds(bp);
|
||||
+
|
||||
memcpy(bp->dev->dev_addr, addr, ETH_ALEN);
|
||||
|
||||
if (!is_valid_ether_addr(&bp->dev->dev_addr[0])){
|
|
@ -1,25 +0,0 @@
|
|||
This prevents the options from being delete with make kernel_oldconfig.
|
||||
---
|
||||
drivers/ssb/Kconfig | 2 ++
|
||||
1 file changed, 2 insertions(+)
|
||||
|
||||
--- a/drivers/bcma/Kconfig
|
||||
+++ b/drivers/bcma/Kconfig
|
||||
@@ -38,6 +38,7 @@ config BCMA_DRIVER_PCI_HOSTMODE
|
||||
config BCMA_HOST_SOC
|
||||
bool "Support for BCMA in a SoC"
|
||||
depends on BCMA
|
||||
+ select USB_HCD_BCMA if USB_EHCI_HCD || USB_OHCI_HCD
|
||||
help
|
||||
Host interface for a Broadcom AIX bus directly mapped into
|
||||
the memory. This only works with the Broadcom SoCs from the
|
||||
--- a/drivers/ssb/Kconfig
|
||||
+++ b/drivers/ssb/Kconfig
|
||||
@@ -146,6 +146,7 @@ config SSB_SFLASH
|
||||
config SSB_EMBEDDED
|
||||
bool
|
||||
depends on SSB_DRIVER_MIPS && SSB_PCICORE_HOSTMODE
|
||||
+ select USB_HCD_SSB if USB_EHCI_HCD || USB_OHCI_HCD
|
||||
default y
|
||||
|
||||
config SSB_DRIVER_EXTIF
|
|
@ -1,11 +0,0 @@
|
|||
--- a/arch/mips/include/asm/cacheflush.h
|
||||
+++ b/arch/mips/include/asm/cacheflush.h
|
||||
@@ -32,7 +32,7 @@
|
||||
extern void (*flush_cache_all)(void);
|
||||
extern void (*__flush_cache_all)(void);
|
||||
extern void (*flush_cache_mm)(struct mm_struct *mm);
|
||||
-#define flush_cache_dup_mm(mm) do { (void) (mm); } while (0)
|
||||
+#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
|
||||
extern void (*flush_cache_range)(struct vm_area_struct *vma,
|
||||
unsigned long start, unsigned long end);
|
||||
extern void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, unsigned long pfn);
|
|
@ -1,66 +0,0 @@
|
|||
--- a/arch/mips/include/asm/page.h
|
||||
+++ b/arch/mips/include/asm/page.h
|
||||
@@ -71,6 +71,7 @@ static inline unsigned int page_size_ftl
|
||||
#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
|
||||
|
||||
#include <linux/pfn.h>
|
||||
+#include <asm/cpu-features.h>
|
||||
|
||||
extern void build_clear_page(void);
|
||||
extern void build_copy_page(void);
|
||||
@@ -105,13 +106,16 @@ static inline void clear_user_page(void
|
||||
flush_data_cache_page((unsigned long)addr);
|
||||
}
|
||||
|
||||
-extern void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
|
||||
- struct page *to);
|
||||
-struct vm_area_struct;
|
||||
-extern void copy_user_highpage(struct page *to, struct page *from,
|
||||
- unsigned long vaddr, struct vm_area_struct *vma);
|
||||
+static inline void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
|
||||
+ struct page *to)
|
||||
+{
|
||||
+ extern void (*flush_data_cache_page)(unsigned long addr);
|
||||
|
||||
-#define __HAVE_ARCH_COPY_USER_HIGHPAGE
|
||||
+ copy_page(vto, vfrom);
|
||||
+ if (!cpu_has_ic_fills_f_dc ||
|
||||
+ pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
|
||||
+ flush_data_cache_page((unsigned long)vto);
|
||||
+}
|
||||
|
||||
/*
|
||||
* These are used to make use of C type-checking..
|
||||
--- a/arch/mips/mm/init.c
|
||||
+++ b/arch/mips/mm/init.c
|
||||
@@ -194,30 +194,6 @@ void kunmap_coherent(void)
|
||||
pagefault_enable();
|
||||
}
|
||||
|
||||
-void copy_user_highpage(struct page *to, struct page *from,
|
||||
- unsigned long vaddr, struct vm_area_struct *vma)
|
||||
-{
|
||||
- void *vfrom, *vto;
|
||||
-
|
||||
- vto = kmap_atomic(to);
|
||||
- if (cpu_has_dc_aliases && cpu_use_kmap_coherent &&
|
||||
- page_mapped(from) && !Page_dcache_dirty(from)) {
|
||||
- vfrom = kmap_coherent(from, vaddr);
|
||||
- copy_page(vto, vfrom);
|
||||
- kunmap_coherent();
|
||||
- } else {
|
||||
- vfrom = kmap_atomic(from);
|
||||
- copy_page(vto, vfrom);
|
||||
- kunmap_atomic(vfrom);
|
||||
- }
|
||||
- if ((!cpu_has_ic_fills_f_dc) ||
|
||||
- pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
|
||||
- flush_data_cache_page((unsigned long)vto);
|
||||
- kunmap_atomic(vto);
|
||||
- /* Make sure this page is cleared on other CPU's too before using it */
|
||||
- smp_wmb();
|
||||
-}
|
||||
-
|
||||
void copy_to_user_page(struct vm_area_struct *vma,
|
||||
struct page *page, unsigned long vaddr, void *dst, const void *src,
|
||||
unsigned long len)
|
|
@ -1,14 +0,0 @@
|
|||
--- a/include/linux/ide.h
|
||||
+++ b/include/linux/ide.h
|
||||
@@ -191,7 +191,11 @@ static inline void ide_std_init_ports(st
|
||||
hw->io_ports.ctl_addr = ctl_addr;
|
||||
}
|
||||
|
||||
+#if defined CONFIG_BCM47XX
|
||||
+# define MAX_HWIFS 2
|
||||
+#else
|
||||
#define MAX_HWIFS 10
|
||||
+#endif
|
||||
|
||||
/*
|
||||
* Now for the data we need to maintain per-drive: ide_drive_t
|
|
@ -1,17 +0,0 @@
|
|||
When the Ethernet controller is powered down and someone wants to
|
||||
access the mdio bus like the witch driver (b53) the system crashed if
|
||||
PCI_D3hot was set before. This patch deactivates this power sawing mode
|
||||
when a switch driver is in use.
|
||||
|
||||
--- a/drivers/net/ethernet/broadcom/tg3.c
|
||||
+++ b/drivers/net/ethernet/broadcom/tg3.c
|
||||
@@ -4269,7 +4269,8 @@ static int tg3_power_down_prepare(struct
|
||||
static void tg3_power_down(struct tg3 *tp)
|
||||
{
|
||||
pci_wake_from_d3(tp->pdev, tg3_flag(tp, WOL_ENABLE));
|
||||
- pci_set_power_state(tp->pdev, PCI_D3hot);
|
||||
+ if (!tg3_flag(tp, ROBOSWITCH))
|
||||
+ pci_set_power_state(tp->pdev, PCI_D3hot);
|
||||
}
|
||||
|
||||
static void tg3_aux_stat_to_speed_duplex(struct tg3 *tp, u32 val, u16 *speed, u8 *duplex)
|
|
@ -1,296 +0,0 @@
|
|||
The Netgear wgt634u uses a different format for storing the
|
||||
configuration. This patch is needed to read out the correct
|
||||
configuration. The cfe_env.c file uses a different method way to read
|
||||
out the configuration than the in kernel cfe config reader.
|
||||
|
||||
--- a/arch/mips/bcm47xx/Makefile
|
||||
+++ b/arch/mips/bcm47xx/Makefile
|
||||
@@ -5,3 +5,4 @@
|
||||
|
||||
obj-y += irq.o nvram.o prom.o serial.o setup.o time.o sprom.o
|
||||
obj-y += board.o buttons.o leds.o workarounds.o
|
||||
+obj-y += cfe_env.o
|
||||
--- /dev/null
|
||||
+++ b/arch/mips/bcm47xx/cfe_env.c
|
||||
@@ -0,0 +1,229 @@
|
||||
+/*
|
||||
+ * CFE environment variable access
|
||||
+ *
|
||||
+ * Copyright 2001-2003, Broadcom Corporation
|
||||
+ * Copyright 2006, Felix Fietkau <nbd@openwrt.org>
|
||||
+ *
|
||||
+ * This program is free software; you can redistribute it and/or modify it
|
||||
+ * under the terms of the GNU General Public License as published by the
|
||||
+ * Free Software Foundation; either version 2 of the License, or (at your
|
||||
+ * option) any later version.
|
||||
+ */
|
||||
+
|
||||
+#include <linux/init.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/string.h>
|
||||
+#include <asm/io.h>
|
||||
+#include <asm/uaccess.h>
|
||||
+
|
||||
+#define NVRAM_SIZE (0x1ff0)
|
||||
+static char _nvdata[NVRAM_SIZE];
|
||||
+static char _valuestr[256];
|
||||
+
|
||||
+/*
|
||||
+ * TLV types. These codes are used in the "type-length-value"
|
||||
+ * encoding of the items stored in the NVRAM device (flash or EEPROM)
|
||||
+ *
|
||||
+ * The layout of the flash/nvram is as follows:
|
||||
+ *
|
||||
+ * <type> <length> <data ...> <type> <length> <data ...> <type_end>
|
||||
+ *
|
||||
+ * The type code of "ENV_TLV_TYPE_END" marks the end of the list.
|
||||
+ * The "length" field marks the length of the data section, not
|
||||
+ * including the type and length fields.
|
||||
+ *
|
||||
+ * Environment variables are stored as follows:
|
||||
+ *
|
||||
+ * <type_env> <length> <flags> <name> = <value>
|
||||
+ *
|
||||
+ * If bit 0 (low bit) is set, the length is an 8-bit value.
|
||||
+ * If bit 0 (low bit) is clear, the length is a 16-bit value
|
||||
+ *
|
||||
+ * Bit 7 set indicates "user" TLVs. In this case, bit 0 still
|
||||
+ * indicates the size of the length field.
|
||||
+ *
|
||||
+ * Flags are from the constants below:
|
||||
+ *
|
||||
+ */
|
||||
+#define ENV_LENGTH_16BITS 0x00 /* for low bit */
|
||||
+#define ENV_LENGTH_8BITS 0x01
|
||||
+
|
||||
+#define ENV_TYPE_USER 0x80
|
||||
+
|
||||
+#define ENV_CODE_SYS(n,l) (((n)<<1)|(l))
|
||||
+#define ENV_CODE_USER(n,l) ((((n)<<1)|(l)) | ENV_TYPE_USER)
|
||||
+
|
||||
+/*
|
||||
+ * The actual TLV types we support
|
||||
+ */
|
||||
+
|
||||
+#define ENV_TLV_TYPE_END 0x00
|
||||
+#define ENV_TLV_TYPE_ENV ENV_CODE_SYS(0,ENV_LENGTH_8BITS)
|
||||
+
|
||||
+/*
|
||||
+ * Environment variable flags
|
||||
+ */
|
||||
+
|
||||
+#define ENV_FLG_NORMAL 0x00 /* normal read/write */
|
||||
+#define ENV_FLG_BUILTIN 0x01 /* builtin - not stored in flash */
|
||||
+#define ENV_FLG_READONLY 0x02 /* read-only - cannot be changed */
|
||||
+
|
||||
+#define ENV_FLG_MASK 0xFF /* mask of attributes we keep */
|
||||
+#define ENV_FLG_ADMIN 0x100 /* lets us internally override permissions */
|
||||
+
|
||||
+
|
||||
+/* *********************************************************************
|
||||
+ * _nvram_read(buffer,offset,length)
|
||||
+ *
|
||||
+ * Read data from the NVRAM device
|
||||
+ *
|
||||
+ * Input parameters:
|
||||
+ * buffer - destination buffer
|
||||
+ * offset - offset of data to read
|
||||
+ * length - number of bytes to read
|
||||
+ *
|
||||
+ * Return value:
|
||||
+ * number of bytes read, or <0 if error occured
|
||||
+ ********************************************************************* */
|
||||
+static int
|
||||
+_nvram_read(unsigned char *nv_buf, unsigned char *buffer, int offset, int length)
|
||||
+{
|
||||
+ int i;
|
||||
+ if (offset > NVRAM_SIZE)
|
||||
+ return -1;
|
||||
+
|
||||
+ for ( i = 0; i < length; i++) {
|
||||
+ buffer[i] = ((volatile unsigned char*)nv_buf)[offset + i];
|
||||
+ }
|
||||
+ return length;
|
||||
+}
|
||||
+
|
||||
+
|
||||
+static char*
|
||||
+_strnchr(const char *dest,int c,size_t cnt)
|
||||
+{
|
||||
+ while (*dest && (cnt > 0)) {
|
||||
+ if (*dest == c) return (char *) dest;
|
||||
+ dest++;
|
||||
+ cnt--;
|
||||
+ }
|
||||
+ return NULL;
|
||||
+}
|
||||
+
|
||||
+
|
||||
+
|
||||
+/*
|
||||
+ * Core support API: Externally visible.
|
||||
+ */
|
||||
+
|
||||
+/*
|
||||
+ * Get the value of an NVRAM variable
|
||||
+ * @param name name of variable to get
|
||||
+ * @return value of variable or NULL if undefined
|
||||
+ */
|
||||
+
|
||||
+char*
|
||||
+cfe_env_get(unsigned char *nv_buf, char* name)
|
||||
+{
|
||||
+ int size;
|
||||
+ unsigned char *buffer;
|
||||
+ unsigned char *ptr;
|
||||
+ unsigned char *envval;
|
||||
+ unsigned int reclen;
|
||||
+ unsigned int rectype;
|
||||
+ int offset;
|
||||
+ int flg;
|
||||
+
|
||||
+ if (!strcmp(name, "nvram_type"))
|
||||
+ return "cfe";
|
||||
+
|
||||
+ size = NVRAM_SIZE;
|
||||
+ buffer = &_nvdata[0];
|
||||
+
|
||||
+ ptr = buffer;
|
||||
+ offset = 0;
|
||||
+
|
||||
+ /* Read the record type and length */
|
||||
+ if (_nvram_read(nv_buf, ptr,offset,1) != 1) {
|
||||
+ goto error;
|
||||
+ }
|
||||
+
|
||||
+ while ((*ptr != ENV_TLV_TYPE_END) && (size > 1)) {
|
||||
+
|
||||
+ /* Adjust pointer for TLV type */
|
||||
+ rectype = *(ptr);
|
||||
+ offset++;
|
||||
+ size--;
|
||||
+
|
||||
+ /*
|
||||
+ * Read the length. It can be either 1 or 2 bytes
|
||||
+ * depending on the code
|
||||
+ */
|
||||
+ if (rectype & ENV_LENGTH_8BITS) {
|
||||
+ /* Read the record type and length - 8 bits */
|
||||
+ if (_nvram_read(nv_buf, ptr,offset,1) != 1) {
|
||||
+ goto error;
|
||||
+ }
|
||||
+ reclen = *(ptr);
|
||||
+ size--;
|
||||
+ offset++;
|
||||
+ }
|
||||
+ else {
|
||||
+ /* Read the record type and length - 16 bits, MSB first */
|
||||
+ if (_nvram_read(nv_buf, ptr,offset,2) != 2) {
|
||||
+ goto error;
|
||||
+ }
|
||||
+ reclen = (((unsigned int) *(ptr)) << 8) + (unsigned int) *(ptr+1);
|
||||
+ size -= 2;
|
||||
+ offset += 2;
|
||||
+ }
|
||||
+
|
||||
+ if (reclen > size)
|
||||
+ break; /* should not happen, bad NVRAM */
|
||||
+
|
||||
+ switch (rectype) {
|
||||
+ case ENV_TLV_TYPE_ENV:
|
||||
+ /* Read the TLV data */
|
||||
+ if (_nvram_read(nv_buf, ptr,offset,reclen) != reclen)
|
||||
+ goto error;
|
||||
+ flg = *ptr++;
|
||||
+ envval = (unsigned char *) _strnchr(ptr,'=',(reclen-1));
|
||||
+ if (envval) {
|
||||
+ *envval++ = '\0';
|
||||
+ memcpy(_valuestr,envval,(reclen-1)-(envval-ptr));
|
||||
+ _valuestr[(reclen-1)-(envval-ptr)] = '\0';
|
||||
+#if 0
|
||||
+ printk(KERN_INFO "NVRAM:%s=%s\n", ptr, _valuestr);
|
||||
+#endif
|
||||
+ if(!strcmp(ptr, name)){
|
||||
+ return _valuestr;
|
||||
+ }
|
||||
+ if((strlen(ptr) > 1) && !strcmp(&ptr[1], name))
|
||||
+ return _valuestr;
|
||||
+ }
|
||||
+ break;
|
||||
+
|
||||
+ default:
|
||||
+ /* Unknown TLV type, skip it. */
|
||||
+ break;
|
||||
+ }
|
||||
+
|
||||
+ /*
|
||||
+ * Advance to next TLV
|
||||
+ */
|
||||
+
|
||||
+ size -= (int)reclen;
|
||||
+ offset += reclen;
|
||||
+
|
||||
+ /* Read the next record type */
|
||||
+ ptr = buffer;
|
||||
+ if (_nvram_read(nv_buf, ptr,offset,1) != 1)
|
||||
+ goto error;
|
||||
+ }
|
||||
+
|
||||
+error:
|
||||
+ return NULL;
|
||||
+
|
||||
+}
|
||||
+
|
||||
--- a/arch/mips/bcm47xx/nvram.c
|
||||
+++ b/arch/mips/bcm47xx/nvram.c
|
||||
@@ -22,6 +22,8 @@
|
||||
|
||||
static char nvram_buf[NVRAM_SPACE];
|
||||
static const u32 nvram_sizes[] = {0x8000, 0xF000, 0x10000};
|
||||
+static int cfe_env;
|
||||
+extern char *cfe_env_get(char *nv_buf, const char *name);
|
||||
|
||||
static u32 find_nvram_size(u32 end)
|
||||
{
|
||||
@@ -46,6 +48,26 @@ static int nvram_find_and_copy(u32 base,
|
||||
u32 *src, *dst;
|
||||
u32 size;
|
||||
|
||||
+ cfe_env = 0;
|
||||
+
|
||||
+ /* XXX: hack for supporting the CFE environment stuff on WGT634U */
|
||||
+ if (lim >= 8 * 1024 * 1024) {
|
||||
+ src = (u32 *) KSEG1ADDR(base + 8 * 1024 * 1024 - 0x2000);
|
||||
+ dst = (u32 *) nvram_buf;
|
||||
+
|
||||
+ if ((*src & 0xff00ff) == 0x000001) {
|
||||
+ printk("early_nvram_init: WGT634U NVRAM found.\n");
|
||||
+
|
||||
+ for (i = 0; i < 0x1ff0; i++) {
|
||||
+ if (*src == 0xFFFFFFFF)
|
||||
+ break;
|
||||
+ *dst++ = *src++;
|
||||
+ }
|
||||
+ cfe_env = 1;
|
||||
+ return 0;
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
/* TODO: when nvram is on nand flash check for bad blocks first. */
|
||||
off = FLASH_MIN;
|
||||
while (off <= lim) {
|
||||
@@ -172,6 +194,13 @@ int bcm47xx_nvram_getenv(char *name, cha
|
||||
return err;
|
||||
}
|
||||
|
||||
+ if (cfe_env) {
|
||||
+ value = cfe_env_get(nvram_buf, name);
|
||||
+ if (!value)
|
||||
+ return -ENOENT;
|
||||
+ return snprintf(val, val_len, "%s", value);
|
||||
+ }
|
||||
+
|
||||
/* Look for name=value and return value */
|
||||
var = &nvram_buf[sizeof(struct nvram_header)];
|
||||
end = nvram_buf + sizeof(nvram_buf) - 2;
|
|
@ -1,101 +0,0 @@
|
|||
--- a/arch/mips/bcm47xx/setup.c
|
||||
+++ b/arch/mips/bcm47xx/setup.c
|
||||
@@ -36,6 +36,7 @@
|
||||
#include <linux/ssb/ssb.h>
|
||||
#include <linux/ssb/ssb_embedded.h>
|
||||
#include <linux/bcma/bcma_soc.h>
|
||||
+#include <linux/old_gpio_wdt.h>
|
||||
#include <asm/bootinfo.h>
|
||||
#include <asm/idle.h>
|
||||
#include <asm/prom.h>
|
||||
@@ -266,6 +267,33 @@ static struct fixed_phy_status bcm47xx_f
|
||||
.duplex = DUPLEX_FULL,
|
||||
};
|
||||
|
||||
+static struct gpio_wdt_platform_data gpio_wdt_data;
|
||||
+
|
||||
+static struct platform_device gpio_wdt_device = {
|
||||
+ .name = "gpio-wdt",
|
||||
+ .id = 0,
|
||||
+ .dev = {
|
||||
+ .platform_data = &gpio_wdt_data,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static int __init bcm47xx_register_gpio_watchdog(void)
|
||||
+{
|
||||
+ enum bcm47xx_board board = bcm47xx_board_get();
|
||||
+
|
||||
+ switch (board) {
|
||||
+ case BCM47XX_BOARD_HUAWEI_E970:
|
||||
+ pr_info("bcm47xx: detected Huawei E970 or similar, starting early gpio_wdt timer\n");
|
||||
+ gpio_wdt_data.gpio = 7;
|
||||
+ gpio_wdt_data.interval = HZ;
|
||||
+ gpio_wdt_data.first_interval = HZ / 5;
|
||||
+ return platform_device_register(&gpio_wdt_device);
|
||||
+ default:
|
||||
+ /* Nothing to do */
|
||||
+ return 0;
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
static int __init bcm47xx_register_bus_complete(void)
|
||||
{
|
||||
switch (bcm47xx_bus_type) {
|
||||
@@ -285,6 +313,7 @@ static int __init bcm47xx_register_bus_c
|
||||
bcm47xx_workarounds();
|
||||
|
||||
fixed_phy_add(PHY_POLL, 0, &bcm47xx_fixed_phy_status);
|
||||
+ bcm47xx_register_gpio_watchdog();
|
||||
return 0;
|
||||
}
|
||||
device_initcall(bcm47xx_register_bus_complete);
|
||||
--- a/arch/mips/configs/bcm47xx_defconfig
|
||||
+++ b/arch/mips/configs/bcm47xx_defconfig
|
||||
@@ -67,6 +67,7 @@ CONFIG_HW_RANDOM=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_BCM47XX_WDT=y
|
||||
+CONFIG_GPIO_WDT=y
|
||||
CONFIG_SSB_DEBUG=y
|
||||
CONFIG_SSB_DRIVER_GIGE=y
|
||||
CONFIG_BCMA_DRIVER_GMAC_CMN=y
|
||||
--- a/drivers/ssb/embedded.c
|
||||
+++ b/drivers/ssb/embedded.c
|
||||
@@ -34,11 +34,36 @@ int ssb_watchdog_timer_set(struct ssb_bu
|
||||
}
|
||||
EXPORT_SYMBOL(ssb_watchdog_timer_set);
|
||||
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+#include <bcm47xx_board.h>
|
||||
+
|
||||
+static bool ssb_watchdog_supported(void)
|
||||
+{
|
||||
+ enum bcm47xx_board board = bcm47xx_board_get();
|
||||
+
|
||||
+ /* The Huawei E970 has a hardware watchdog using a GPIO */
|
||||
+ switch (board) {
|
||||
+ case BCM47XX_BOARD_HUAWEI_E970:
|
||||
+ return false;
|
||||
+ default:
|
||||
+ return true;
|
||||
+ }
|
||||
+}
|
||||
+#else
|
||||
+static bool ssb_watchdog_supported(void)
|
||||
+{
|
||||
+ return true;
|
||||
+}
|
||||
+#endif
|
||||
+
|
||||
int ssb_watchdog_register(struct ssb_bus *bus)
|
||||
{
|
||||
struct bcm47xx_wdt wdt = {};
|
||||
struct platform_device *pdev;
|
||||
|
||||
+ if (!ssb_watchdog_supported())
|
||||
+ return 0;
|
||||
+
|
||||
if (ssb_chipco_available(&bus->chipco)) {
|
||||
wdt.driver_data = &bus->chipco;
|
||||
wdt.timer_set = ssb_chipco_watchdog_timer_set_wdt;
|
|
@ -1,138 +0,0 @@
|
|||
--- a/arch/mips/include/asm/r4kcache.h
|
||||
+++ b/arch/mips/include/asm/r4kcache.h
|
||||
@@ -21,10 +21,28 @@
|
||||
#ifdef CONFIG_BCM47XX
|
||||
#include <asm/paccess.h>
|
||||
#include <linux/ssb/ssb.h>
|
||||
-#define BCM4710_DUMMY_RREG() ((void) *((u8 *) KSEG1ADDR(SSB_ENUM_BASE)))
|
||||
+#define BCM4710_DUMMY_RREG() bcm4710_dummy_rreg()
|
||||
+
|
||||
+static inline unsigned long bcm4710_dummy_rreg(void)
|
||||
+{
|
||||
+ return *(volatile unsigned long *)(KSEG1ADDR(SSB_ENUM_BASE));
|
||||
+}
|
||||
+
|
||||
+#define BCM4710_FILL_TLB(addr) bcm4710_fill_tlb((void *)(addr))
|
||||
+
|
||||
+static inline unsigned long bcm4710_fill_tlb(void *addr)
|
||||
+{
|
||||
+ return *(unsigned long *)addr;
|
||||
+}
|
||||
+
|
||||
+#define BCM4710_PROTECTED_FILL_TLB(addr) bcm4710_protected_fill_tlb((void *)(addr))
|
||||
+
|
||||
+static inline void bcm4710_protected_fill_tlb(void *addr)
|
||||
+{
|
||||
+ unsigned long x;
|
||||
+ get_dbe(x, (unsigned long *)addr);;
|
||||
+}
|
||||
|
||||
-#define BCM4710_FILL_TLB(addr) (*(volatile unsigned long *)(addr))
|
||||
-#define BCM4710_PROTECTED_FILL_TLB(addr) ({ unsigned long x; get_dbe(x, (volatile unsigned long *)(addr)); })
|
||||
#else
|
||||
#define BCM4710_DUMMY_RREG()
|
||||
|
||||
--- a/arch/mips/mm/tlbex.c
|
||||
+++ b/arch/mips/mm/tlbex.c
|
||||
@@ -935,6 +935,9 @@ build_get_pgde32(u32 **p, unsigned int t
|
||||
uasm_i_srl(p, ptr, ptr, SMP_CPUID_PTRSHIFT);
|
||||
uasm_i_addu(p, ptr, tmp, ptr);
|
||||
#else
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+ uasm_i_nop(p);
|
||||
+#endif
|
||||
UASM_i_LA_mostly(p, ptr, pgdc);
|
||||
#endif
|
||||
uasm_i_mfc0(p, tmp, C0_BADVADDR); /* get faulting address */
|
||||
@@ -1277,12 +1280,12 @@ static void build_r4000_tlb_refill_handl
|
||||
/* No need for uasm_i_nop */
|
||||
}
|
||||
|
||||
-#ifdef CONFIG_BCM47XX
|
||||
- uasm_i_nop(&p);
|
||||
-#endif
|
||||
#ifdef CONFIG_64BIT
|
||||
build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */
|
||||
#else
|
||||
+# ifdef CONFIG_BCM47XX
|
||||
+ uasm_i_nop(&p);
|
||||
+# endif
|
||||
build_get_pgde32(&p, K0, K1); /* get pgd in K1 */
|
||||
#endif
|
||||
|
||||
@@ -1294,6 +1297,9 @@ static void build_r4000_tlb_refill_handl
|
||||
build_update_entries(&p, K0, K1);
|
||||
build_tlb_write_entry(&p, &l, &r, tlb_random);
|
||||
uasm_l_leave(&l, p);
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+ uasm_i_nop(&p);
|
||||
+#endif
|
||||
uasm_i_eret(&p); /* return from trap */
|
||||
}
|
||||
#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
|
||||
@@ -1838,12 +1844,12 @@ build_r4000_tlbchange_handler_head(u32 *
|
||||
{
|
||||
struct work_registers wr = build_get_work_registers(p);
|
||||
|
||||
-#ifdef CONFIG_BCM47XX
|
||||
- uasm_i_nop(p);
|
||||
-#endif
|
||||
#ifdef CONFIG_64BIT
|
||||
build_get_pmde64(p, l, r, wr.r1, wr.r2); /* get pmd in ptr */
|
||||
#else
|
||||
+# ifdef CONFIG_BCM47XX
|
||||
+ uasm_i_nop(p);
|
||||
+# endif
|
||||
build_get_pgde32(p, wr.r1, wr.r2); /* get pgd in ptr */
|
||||
#endif
|
||||
|
||||
@@ -1882,6 +1888,9 @@ build_r4000_tlbchange_handler_tail(u32 *
|
||||
build_tlb_write_entry(p, l, r, tlb_indexed);
|
||||
uasm_l_leave(l, *p);
|
||||
build_restore_work_registers(p);
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+ uasm_i_nop(p);
|
||||
+#endif
|
||||
uasm_i_eret(p); /* return from trap */
|
||||
|
||||
#ifdef CONFIG_64BIT
|
||||
--- a/arch/mips/kernel/genex.S
|
||||
+++ b/arch/mips/kernel/genex.S
|
||||
@@ -21,6 +21,19 @@
|
||||
#include <asm/war.h>
|
||||
#include <asm/thread_info.h>
|
||||
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+# ifdef eret
|
||||
+# undef eret
|
||||
+# endif
|
||||
+# define eret \
|
||||
+ .set push; \
|
||||
+ .set noreorder; \
|
||||
+ nop; \
|
||||
+ nop; \
|
||||
+ eret; \
|
||||
+ .set pop;
|
||||
+#endif
|
||||
+
|
||||
#ifdef CONFIG_MIPS_MT_SMTC
|
||||
#define PANIC_PIC(msg) \
|
||||
.set push; \
|
||||
@@ -48,7 +61,6 @@ NESTED(except_vec3_generic, 0, sp)
|
||||
.set noat
|
||||
#ifdef CONFIG_BCM47XX
|
||||
nop
|
||||
- nop
|
||||
#endif
|
||||
#if R5432_CP0_INTERRUPT_WAR
|
||||
mfc0 k0, CP0_INDEX
|
||||
@@ -73,6 +85,9 @@ NESTED(except_vec3_r4000, 0, sp)
|
||||
.set push
|
||||
.set mips3
|
||||
.set noat
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+ nop
|
||||
+#endif
|
||||
mfc0 k1, CP0_CAUSE
|
||||
li k0, 31<<2
|
||||
andi k1, k1, 0x7c
|
|
@ -1,46 +0,0 @@
|
|||
--- a/drivers/pcmcia/yenta_socket.c
|
||||
+++ b/drivers/pcmcia/yenta_socket.c
|
||||
@@ -920,6 +920,8 @@ static unsigned int yenta_probe_irq(stru
|
||||
* Probe for usable interrupts using the force
|
||||
* register to generate bogus card status events.
|
||||
*/
|
||||
+#ifndef CONFIG_BCM47XX
|
||||
+ /* WRT54G3G does not like this */
|
||||
cb_writel(socket, CB_SOCKET_EVENT, -1);
|
||||
cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
|
||||
reg = exca_readb(socket, I365_CSCINT);
|
||||
@@ -935,6 +937,7 @@ static unsigned int yenta_probe_irq(stru
|
||||
}
|
||||
cb_writel(socket, CB_SOCKET_MASK, 0);
|
||||
exca_writeb(socket, I365_CSCINT, reg);
|
||||
+#endif
|
||||
|
||||
mask = probe_irq_mask(val) & 0xffff;
|
||||
|
||||
@@ -1019,6 +1022,10 @@ static void yenta_get_socket_capabilitie
|
||||
else
|
||||
socket->socket.irq_mask = 0;
|
||||
|
||||
+ /* irq mask probing is broken for the WRT54G3G */
|
||||
+ if (socket->socket.irq_mask == 0)
|
||||
+ socket->socket.irq_mask = 0x6f8;
|
||||
+
|
||||
dev_printk(KERN_INFO, &socket->dev->dev,
|
||||
"ISA IRQ mask 0x%04x, PCI irq %d\n",
|
||||
socket->socket.irq_mask, socket->cb_irq);
|
||||
@@ -1257,6 +1264,15 @@ static int yenta_probe(struct pci_dev *d
|
||||
dev_printk(KERN_INFO, &dev->dev,
|
||||
"Socket status: %08x\n", cb_readl(socket, CB_SOCKET_STATE));
|
||||
|
||||
+ /* Generate an interrupt on card insert/remove */
|
||||
+ config_writew(socket, CB_SOCKET_MASK, CB_CSTSMASK | CB_CDMASK);
|
||||
+
|
||||
+ /* Set up Multifunction Routing Status Register */
|
||||
+ config_writew(socket, 0x8C, 0x1000 /* MFUNC3 to GPIO3 */ | 0x2 /* MFUNC0 to INTA */);
|
||||
+
|
||||
+ /* Switch interrupts to parallelized */
|
||||
+ config_writeb(socket, 0x92, 0x64);
|
||||
+
|
||||
yenta_fixup_parent_bridge(dev->subordinate);
|
||||
|
||||
/* Register it with the pcmcia layer.. */
|
|
@ -1,22 +0,0 @@
|
|||
This fixes a problem introduced in this commit:
|
||||
|
||||
commit 87aa9f9c61ad56d505641681812e92ad976f8608
|
||||
Author: Florian Fainelli <f.fainelli@gmail.com>
|
||||
Date: Fri Dec 6 13:01:34 2013 -0800
|
||||
|
||||
net: phy: consolidate PHY reset in phy_init_hw()
|
||||
|
||||
The fixups are not executed before the switch gets registered but after
|
||||
the kernel searches for the right switch driver. When the search is
|
||||
executed it searches for the phy_id 0x00, because it was not fixed.
|
||||
|
||||
--- a/drivers/net/phy/phy_device.c
|
||||
+++ b/drivers/net/phy/phy_device.c
|
||||
@@ -353,6 +353,7 @@ int phy_device_register(struct phy_devic
|
||||
phydev->bus->phy_map[phydev->addr] = phydev;
|
||||
|
||||
/* Run all of the fixups for this PHY */
|
||||
+ phy_scan_fixups(phydev);
|
||||
err = phy_init_hw(phydev);
|
||||
if (err) {
|
||||
pr_err("PHY %d failed to initialize\n", phydev->addr);
|
|
@ -1,11 +0,0 @@
|
|||
--- a/drivers/ssb/driver_pcicore.c
|
||||
+++ b/drivers/ssb/driver_pcicore.c
|
||||
@@ -375,7 +375,7 @@ static void ssb_pcicore_init_hostmode(st
|
||||
set_io_port_base(ssb_pcicore_controller.io_map_base);
|
||||
/* Give some time to the PCI controller to configure itself with the new
|
||||
* values. Not waiting at this point causes crashes of the machine. */
|
||||
- mdelay(10);
|
||||
+ mdelay(300);
|
||||
register_pci_controller(&ssb_pcicore_controller);
|
||||
}
|
||||
|
|
@ -1,13 +0,0 @@
|
|||
--- a/arch/mips/bcm47xx/setup.c
|
||||
+++ b/arch/mips/bcm47xx/setup.c
|
||||
@@ -127,6 +127,10 @@ static int bcm47xx_get_invariants(struct
|
||||
if (bcm47xx_nvram_getenv("cardbus", buf, sizeof(buf)) >= 0)
|
||||
iv->has_cardbus_slot = !!simple_strtoul(buf, NULL, 10);
|
||||
|
||||
+ /* Do not indicate cardbus for Netgear WNR834B V1 and V2 */
|
||||
+ if (iv->boardinfo.type == 0x0472 && iv->has_cardbus_slot)
|
||||
+ iv->has_cardbus_slot = 0;
|
||||
+
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -1,22 +0,0 @@
|
|||
--- a/arch/mips/bcm47xx/nvram.c
|
||||
+++ b/arch/mips/bcm47xx/nvram.c
|
||||
@@ -20,7 +20,8 @@
|
||||
#include <bcm47xx_nvram.h>
|
||||
#include <asm/mach-bcm47xx/bcm47xx.h>
|
||||
|
||||
-static char nvram_buf[NVRAM_SPACE];
|
||||
+char nvram_buf[NVRAM_SPACE];
|
||||
+EXPORT_SYMBOL(nvram_buf);
|
||||
static const u32 nvram_sizes[] = {0x8000, 0xF000, 0x10000};
|
||||
static int cfe_env;
|
||||
extern char *cfe_env_get(char *nv_buf, const char *name);
|
||||
--- a/arch/mips/mm/cache.c
|
||||
+++ b/arch/mips/mm/cache.c
|
||||
@@ -58,6 +58,7 @@ void (*_dma_cache_wback)(unsigned long s
|
||||
void (*_dma_cache_inv)(unsigned long start, unsigned long size);
|
||||
|
||||
EXPORT_SYMBOL(_dma_cache_wback_inv);
|
||||
+EXPORT_SYMBOL(_dma_cache_inv);
|
||||
|
||||
#endif /* CONFIG_DMA_NONCOHERENT */
|
||||
|
|
@ -1,198 +0,0 @@
|
|||
CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
|
||||
CONFIG_ARCH_DISCARD_MEMBLOCK=y
|
||||
CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
|
||||
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
|
||||
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
|
||||
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
|
||||
CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
|
||||
CONFIG_ARCH_REQUIRE_GPIOLIB=y
|
||||
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
||||
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
|
||||
CONFIG_B53=y
|
||||
CONFIG_B53_MMAP_DRIVER=y
|
||||
CONFIG_B53_PHY_DRIVER=y
|
||||
CONFIG_B53_PHY_FIXUP=y
|
||||
CONFIG_B53_SPI_DRIVER=y
|
||||
# CONFIG_B53_SRAB_DRIVER is not set
|
||||
CONFIG_BCM63XX=y
|
||||
CONFIG_BCM63XX_CPU_3368=y
|
||||
CONFIG_BCM63XX_CPU_6318=y
|
||||
CONFIG_BCM63XX_CPU_63268=y
|
||||
CONFIG_BCM63XX_CPU_6328=y
|
||||
CONFIG_BCM63XX_CPU_6338=y
|
||||
CONFIG_BCM63XX_CPU_6345=y
|
||||
CONFIG_BCM63XX_CPU_6348=y
|
||||
CONFIG_BCM63XX_CPU_6358=y
|
||||
CONFIG_BCM63XX_CPU_6362=y
|
||||
CONFIG_BCM63XX_CPU_6368=y
|
||||
CONFIG_BCM63XX_EHCI=y
|
||||
CONFIG_BCM63XX_ENET=y
|
||||
CONFIG_BCM63XX_OHCI=y
|
||||
CONFIG_BCM63XX_PHY=y
|
||||
CONFIG_BCM63XX_WDT=y
|
||||
CONFIG_BOARD_BCM963XX=y
|
||||
CONFIG_BOARD_LIVEBOX=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
CONFIG_CEVT_R4K=y
|
||||
CONFIG_CLONE_BACKWARDS=y
|
||||
CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"
|
||||
CONFIG_CMDLINE_BOOL=y
|
||||
# CONFIG_CMDLINE_OVERRIDE is not set
|
||||
CONFIG_CPU_BIG_ENDIAN=y
|
||||
CONFIG_CPU_BMIPS=y
|
||||
CONFIG_CPU_BMIPS32_3300=y
|
||||
CONFIG_CPU_BMIPS4350=y
|
||||
CONFIG_CPU_GENERIC_DUMP_TLB=y
|
||||
CONFIG_CPU_HAS_PREFETCH=y
|
||||
CONFIG_CPU_HAS_SYNC=y
|
||||
CONFIG_CPU_MIPS32=y
|
||||
CONFIG_CPU_R4K_CACHE_TLB=y
|
||||
CONFIG_CPU_R4K_FPU=y
|
||||
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
|
||||
CONFIG_CPU_SUPPORTS_HIGHMEM=y
|
||||
CONFIG_CSRC_R4K=y
|
||||
CONFIG_DMA_NONCOHERENT=y
|
||||
CONFIG_EARLY_PRINTK=y
|
||||
# CONFIG_EARLY_PRINTK_8250 is not set
|
||||
CONFIG_FIRMWARE_IN_KERNEL=y
|
||||
CONFIG_GENERIC_ATOMIC64=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
|
||||
CONFIG_GENERIC_CMOS_UPDATE=y
|
||||
CONFIG_GENERIC_IO=y
|
||||
CONFIG_GENERIC_IRQ_SHOW=y
|
||||
CONFIG_GENERIC_NET_UTILS=y
|
||||
CONFIG_GENERIC_PCI_IOMAP=y
|
||||
CONFIG_GENERIC_SMP_IDLE_THREAD=y
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_GPIO_DEVRES=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_HAMRADIO is not set
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT=y
|
||||
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
|
||||
CONFIG_HAVE_ARCH_JUMP_LABEL=y
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
CONFIG_HAVE_ARCH_TRACEHOOK=y
|
||||
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
|
||||
CONFIG_HAVE_CC_STACKPROTECTOR=y
|
||||
CONFIG_HAVE_CLK=y
|
||||
CONFIG_HAVE_CONTEXT_TRACKING=y
|
||||
CONFIG_HAVE_C_RECORDMCOUNT=y
|
||||
CONFIG_HAVE_DEBUG_KMEMLEAK=y
|
||||
CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
|
||||
CONFIG_HAVE_DMA_API_DEBUG=y
|
||||
CONFIG_HAVE_DMA_ATTRS=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
||||
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
|
||||
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
|
||||
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
|
||||
CONFIG_HAVE_IDE=y
|
||||
CONFIG_HAVE_MEMBLOCK=y
|
||||
CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
|
||||
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
|
||||
CONFIG_HAVE_NET_DSA=y
|
||||
CONFIG_HAVE_OPROFILE=y
|
||||
CONFIG_HAVE_PERF_EVENTS=y
|
||||
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
|
||||
CONFIG_HW_HAS_PCI=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
CONFIG_HW_RANDOM_BCM63XX=y
|
||||
CONFIG_HZ=250
|
||||
# CONFIG_HZ_100 is not set
|
||||
CONFIG_HZ_250=y
|
||||
CONFIG_HZ_PERIODIC=y
|
||||
CONFIG_IMAGE_CMDLINE_HACK=y
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
CONFIG_IP_PIMSM_V1=y
|
||||
CONFIG_IP_PIMSM_V2=y
|
||||
CONFIG_IRQ_CPU=y
|
||||
CONFIG_IRQ_FORCED_THREADING=y
|
||||
CONFIG_IRQ_WORK=y
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_MDIO_BOARDINFO=y
|
||||
CONFIG_MIPS=y
|
||||
# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
|
||||
CONFIG_MIPS_L1_CACHE_SHIFT=4
|
||||
CONFIG_MIPS_L1_CACHE_SHIFT_4=y
|
||||
# CONFIG_MIPS_MACHINE is not set
|
||||
CONFIG_MIPS_MT_DISABLED=y
|
||||
CONFIG_MIPS_O32_FP64_SUPPORT=y
|
||||
# CONFIG_MLX5_CORE is not set
|
||||
CONFIG_MODULES_USE_ELF_REL=y
|
||||
CONFIG_MODULE_FORCE_LOAD=y
|
||||
CONFIG_MODULE_FORCE_UNLOAD=y
|
||||
CONFIG_MTD_BCM63XX_PARTS=y
|
||||
CONFIG_MTD_CFI_ADV_OPTIONS=y
|
||||
CONFIG_MTD_CFI_BE_BYTE_SWAP=y
|
||||
# CONFIG_MTD_CFI_GEOMETRY is not set
|
||||
# CONFIG_MTD_CFI_NOSWAP is not set
|
||||
CONFIG_MTD_CFI_STAA=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
|
||||
CONFIG_MTD_JEDECPROBE=y
|
||||
CONFIG_MTD_M25P80=y
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_REDBOOT_PARTS=y
|
||||
CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
|
||||
CONFIG_NEED_DMA_MAP_STATE=y
|
||||
CONFIG_NEED_PER_CPU_KM=y
|
||||
CONFIG_NET_RX_BUSY_POLL=y
|
||||
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
|
||||
CONFIG_PAGEFLAGS_EXTENDED=y
|
||||
CONFIG_PCI=y
|
||||
# CONFIG_PCIEAER is not set
|
||||
CONFIG_PCIEPORTBUS=y
|
||||
CONFIG_PCI_DOMAINS=y
|
||||
CONFIG_PERF_USE_VMALLOC=y
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
CONFIG_POSIX_MQUEUE_SYSCTL=y
|
||||
# CONFIG_PREEMPT_RCU is not set
|
||||
# CONFIG_RCU_STALL_COMMON is not set
|
||||
CONFIG_RELAY=y
|
||||
CONFIG_RTL8366_SMI=y
|
||||
CONFIG_RTL8367_PHY=y
|
||||
# CONFIG_SCSI_DMA is not set
|
||||
# CONFIG_SERIAL_8250 is not set
|
||||
CONFIG_SERIAL_BCM63XX=y
|
||||
CONFIG_SERIAL_BCM63XX_CONSOLE=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_BCM63XX=y
|
||||
CONFIG_SPI_BCM63XX_HSSPI=y
|
||||
CONFIG_SPI_BITBANG=y
|
||||
CONFIG_SPI_GPIO=y
|
||||
CONFIG_SPI_MASTER=y
|
||||
CONFIG_SQUASHFS_EMBEDDED=y
|
||||
CONFIG_SSB=y
|
||||
CONFIG_SSB_B43_PCI_BRIDGE=y
|
||||
CONFIG_SSB_BLOCKIO=y
|
||||
# CONFIG_SSB_DRIVER_MIPS is not set
|
||||
CONFIG_SSB_DRIVER_PCICORE=y
|
||||
CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
|
||||
CONFIG_SSB_PCIHOST=y
|
||||
CONFIG_SSB_PCIHOST_POSSIBLE=y
|
||||
CONFIG_SSB_SPROM=y
|
||||
CONFIG_SWAP_IO_SPACE=y
|
||||
CONFIG_SWCONFIG=y
|
||||
CONFIG_SYNC_R4K=y
|
||||
CONFIG_SYS_HAS_CPU_BMIPS=y
|
||||
CONFIG_SYS_HAS_CPU_BMIPS32_3300=y
|
||||
CONFIG_SYS_HAS_CPU_BMIPS4350=y
|
||||
CONFIG_SYS_HAS_EARLY_PRINTK=y
|
||||
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
|
||||
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
|
||||
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
|
||||
CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y
|
||||
CONFIG_SYS_SUPPORTS_SMP=y
|
||||
CONFIG_TICK_CPU_ACCOUNTING=y
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
CONFIG_WATCHDOG_NOWAYOUT=y
|
||||
CONFIG_WEAK_ORDERING=y
|
||||
# CONFIG_ZBUD is not set
|
||||
CONFIG_ZONE_DMA_FLAG=0
|
|
@ -1,28 +0,0 @@
|
|||
From 80a2f983e9f44dbc3e01ae31c62d877846a7f791 Mon Sep 17 00:00:00 2001
|
||||
From: Florian Fainelli <florian@openwrt.org>
|
||||
Date: Mon, 28 Jan 2013 20:06:19 +0100
|
||||
Subject: [PATCH 01/11] MIPS: BCM63XX: add USB host clock enable delay
|
||||
|
||||
Knowledge of the clock setup delay should remain at the clock level (so
|
||||
it can be clock specific and CPU specific). Add the 100 milliseconds
|
||||
required clock delay for the USB host clock when it gets enabled.
|
||||
|
||||
Signed-off-by: Florian Fainelli <florian@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/clk.c | 5 +++++
|
||||
1 file changed, 5 insertions(+)
|
||||
|
||||
--- a/arch/mips/bcm63xx/clk.c
|
||||
+++ b/arch/mips/bcm63xx/clk.c
|
||||
@@ -177,6 +177,11 @@ static void usbh_set(struct clk *clk, in
|
||||
bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
|
||||
else if (BCMCPU_IS_6368())
|
||||
bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
|
||||
+ else
|
||||
+ return;
|
||||
+
|
||||
+ if (enable)
|
||||
+ msleep(100);
|
||||
}
|
||||
|
||||
static struct clk clk_usbh = {
|
|
@ -1,41 +0,0 @@
|
|||
From 8e9bf528a122741f0171b89c297b63041116d704 Mon Sep 17 00:00:00 2001
|
||||
From: Florian Fainelli <florian@openwrt.org>
|
||||
Date: Mon, 28 Jan 2013 20:06:20 +0100
|
||||
Subject: [PATCH 02/11] MIPS: BCM63XX: add USB device clock enable delay to
|
||||
clock code
|
||||
|
||||
This patch adds the required 10 micro seconds delay to the USB device
|
||||
clock enable operation. Put this where the correct clock knowledege is,
|
||||
which is in the clock code, and remove this delay from the bcm63xx_udc
|
||||
gadget driver where it was before.
|
||||
|
||||
Signed-off-by: Florian Fainelli <florian@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/clk.c | 5 +++++
|
||||
drivers/usb/gadget/bcm63xx_udc.c | 1 -
|
||||
2 files changed, 5 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/arch/mips/bcm63xx/clk.c
|
||||
+++ b/arch/mips/bcm63xx/clk.c
|
||||
@@ -199,6 +199,11 @@ static void usbd_set(struct clk *clk, in
|
||||
bcm_hwclock_set(CKCTL_6362_USBD_EN, enable);
|
||||
else if (BCMCPU_IS_6368())
|
||||
bcm_hwclock_set(CKCTL_6368_USBD_EN, enable);
|
||||
+ else
|
||||
+ return;
|
||||
+
|
||||
+ if (enable)
|
||||
+ udelay(10);
|
||||
}
|
||||
|
||||
static struct clk clk_usbd = {
|
||||
--- a/drivers/usb/gadget/bcm63xx_udc.c
|
||||
+++ b/drivers/usb/gadget/bcm63xx_udc.c
|
||||
@@ -391,7 +391,6 @@ static inline void set_clocks(struct bcm
|
||||
if (is_enabled) {
|
||||
clk_enable(udc->usbh_clk);
|
||||
clk_enable(udc->usbd_clk);
|
||||
- udelay(10);
|
||||
} else {
|
||||
clk_disable(udc->usbd_clk);
|
||||
clk_disable(udc->usbh_clk);
|
|
@ -1,27 +0,0 @@
|
|||
From 23c21090f49a64b532755542a71e9aa3e4fc84d9 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Sat, 5 Apr 2014 20:07:25 +0200
|
||||
Subject: [PATCH] MIPS: BCM63XX: sync mips counter during cpu bringup
|
||||
|
||||
We are using the mips counters as the clock source, so we need to ensure
|
||||
they are synced, else e.g. gettimeofday will return different values
|
||||
depending on which core it was run.
|
||||
|
||||
Observed difference was about 8 seconds, causing ~8 seconds ping or time
|
||||
running backwards for some programs.
|
||||
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
arch/mips/Kconfig | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
--- a/arch/mips/Kconfig
|
||||
+++ b/arch/mips/Kconfig
|
||||
@@ -132,6 +132,7 @@ config BCM63XX
|
||||
select BOOT_RAW
|
||||
select CEVT_R4K
|
||||
select CSRC_R4K
|
||||
+ select SYNC_R4K
|
||||
select DMA_NONCOHERENT
|
||||
select IRQ_CPU
|
||||
select SYS_SUPPORTS_32BIT_KERNEL
|
|
@ -1,151 +0,0 @@
|
|||
From ac9b0b574d54be28b300bf99ffe092a2c589484f Mon Sep 17 00:00:00 2001
|
||||
From: Florian Fainelli <florian@openwrt.org>
|
||||
Date: Mon, 28 Jan 2013 20:06:21 +0100
|
||||
Subject: [PATCH 03/11] MIPS: BCM63XX: move code touching the USB private
|
||||
register
|
||||
|
||||
This patch moves the code touching the USB private register in the
|
||||
bcm63xx USB gadget driver to arch/mips/bcm63xx/usb-common.c in
|
||||
preparation for adding support for OHCI and EHCI host controllers which
|
||||
will also touch the USB private register.
|
||||
|
||||
Signed-off-by: Florian Fainelli <florian@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/Makefile | 2 +-
|
||||
arch/mips/bcm63xx/usb-common.c | 53 ++++++++++++++++++++
|
||||
.../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h | 9 ++++
|
||||
drivers/usb/gadget/bcm63xx_udc.c | 27 ++--------
|
||||
4 files changed, 67 insertions(+), 24 deletions(-)
|
||||
create mode 100644 arch/mips/bcm63xx/usb-common.c
|
||||
create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
|
||||
|
||||
--- a/arch/mips/bcm63xx/Makefile
|
||||
+++ b/arch/mips/bcm63xx/Makefile
|
||||
@@ -1,7 +1,7 @@
|
||||
obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
|
||||
setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
|
||||
dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
|
||||
- dev-wdt.o dev-usb-usbd.o
|
||||
+ dev-wdt.o dev-usb-usbd.o usb-common.o
|
||||
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
|
||||
|
||||
obj-y += boards/
|
||||
--- /dev/null
|
||||
+++ b/arch/mips/bcm63xx/usb-common.c
|
||||
@@ -0,0 +1,53 @@
|
||||
+/*
|
||||
+ * Broadcom BCM63xx common USB device configuration code
|
||||
+ *
|
||||
+ * This file is subject to the terms and conditions of the GNU General Public
|
||||
+ * License. See the file "COPYING" in the main directory of this archive
|
||||
+ * for more details.
|
||||
+ *
|
||||
+ * Copyright (C) 2012 Kevin Cernekee <cernekee@gmail.com>
|
||||
+ * Copyright (C) 2012 Broadcom Corporation
|
||||
+ *
|
||||
+ */
|
||||
+#include <linux/export.h>
|
||||
+
|
||||
+#include <bcm63xx_cpu.h>
|
||||
+#include <bcm63xx_regs.h>
|
||||
+#include <bcm63xx_io.h>
|
||||
+#include <bcm63xx_usb_priv.h>
|
||||
+
|
||||
+void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device)
|
||||
+{
|
||||
+ u32 val;
|
||||
+
|
||||
+ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
|
||||
+ if (is_device) {
|
||||
+ val |= (portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
|
||||
+ val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
|
||||
+ } else {
|
||||
+ val &= ~(portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
|
||||
+ val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
|
||||
+ }
|
||||
+ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
|
||||
+
|
||||
+ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
|
||||
+ if (is_device)
|
||||
+ val |= USBH_PRIV_SWAP_USBD_MASK;
|
||||
+ else
|
||||
+ val &= ~USBH_PRIV_SWAP_USBD_MASK;
|
||||
+ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
|
||||
+}
|
||||
+EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode);
|
||||
+
|
||||
+void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on)
|
||||
+{
|
||||
+ u32 val;
|
||||
+
|
||||
+ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
|
||||
+ if (is_on)
|
||||
+ val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
|
||||
+ else
|
||||
+ val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
|
||||
+ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
|
||||
+}
|
||||
+EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup);
|
||||
--- /dev/null
|
||||
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
|
||||
@@ -0,0 +1,9 @@
|
||||
+#ifndef BCM63XX_USB_PRIV_H_
|
||||
+#define BCM63XX_USB_PRIV_H_
|
||||
+
|
||||
+#include <linux/types.h>
|
||||
+
|
||||
+void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device);
|
||||
+void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on);
|
||||
+
|
||||
+#endif /* BCM63XX_USB_PRIV_H_ */
|
||||
--- a/drivers/usb/gadget/bcm63xx_udc.c
|
||||
+++ b/drivers/usb/gadget/bcm63xx_udc.c
|
||||
@@ -40,6 +40,7 @@
|
||||
#include <bcm63xx_dev_usb_usbd.h>
|
||||
#include <bcm63xx_io.h>
|
||||
#include <bcm63xx_regs.h>
|
||||
+#include <bcm63xx_usb_priv.h>
|
||||
|
||||
#define DRV_MODULE_NAME "bcm63xx_udc"
|
||||
|
||||
@@ -868,22 +869,7 @@ static void bcm63xx_select_phy_mode(stru
|
||||
bcm_gpio_writel(val, GPIO_PINMUX_OTHR_REG);
|
||||
}
|
||||
|
||||
- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
|
||||
- if (is_device) {
|
||||
- val |= (portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
|
||||
- val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
|
||||
- } else {
|
||||
- val &= ~(portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
|
||||
- val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
|
||||
- }
|
||||
- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
|
||||
-
|
||||
- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
|
||||
- if (is_device)
|
||||
- val |= USBH_PRIV_SWAP_USBD_MASK;
|
||||
- else
|
||||
- val &= ~USBH_PRIV_SWAP_USBD_MASK;
|
||||
- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
|
||||
+ bcm63xx_usb_priv_select_phy_mode(portmask, is_device);
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -897,14 +883,9 @@ static void bcm63xx_select_phy_mode(stru
|
||||
*/
|
||||
static void bcm63xx_select_pullup(struct bcm63xx_udc *udc, bool is_on)
|
||||
{
|
||||
- u32 val, portmask = BIT(udc->pd->port_no);
|
||||
+ u32 portmask = BIT(udc->pd->port_no);
|
||||
|
||||
- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
|
||||
- if (is_on)
|
||||
- val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
|
||||
- else
|
||||
- val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
|
||||
- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
|
||||
+ bcm63xx_usb_priv_select_pullup(portmask, is_on);
|
||||
}
|
||||
|
||||
/**
|
|
@ -1,169 +0,0 @@
|
|||
From 28758a9da77954ed323f86123ef448c6a563c037 Mon Sep 17 00:00:00 2001
|
||||
From: Florian Fainelli <florian@openwrt.org>
|
||||
Date: Mon, 28 Jan 2013 20:06:22 +0100
|
||||
Subject: [PATCH 04/11] MIPS: BCM63XX: add OHCI/EHCI configuration bits to
|
||||
common USB code
|
||||
|
||||
This patch updates the common USB code touching the USB private
|
||||
registers with the specific bits to properly enable OHCI and EHCI
|
||||
controllers on BCM63xx SoCs. As a result we now need to protect access
|
||||
to Read Modify Write sequences using a spinlock because we cannot
|
||||
guarantee that any of the exposed helper will not be called
|
||||
concurrently.
|
||||
|
||||
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
|
||||
Signed-off-by: Florian Fainelli <florian@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/usb-common.c | 97 ++++++++++++++++++++
|
||||
.../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h | 2 +
|
||||
2 files changed, 99 insertions(+)
|
||||
|
||||
--- a/arch/mips/bcm63xx/usb-common.c
|
||||
+++ b/arch/mips/bcm63xx/usb-common.c
|
||||
@@ -5,10 +5,12 @@
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
|
||||
* Copyright (C) 2012 Kevin Cernekee <cernekee@gmail.com>
|
||||
* Copyright (C) 2012 Broadcom Corporation
|
||||
*
|
||||
*/
|
||||
+#include <linux/spinlock.h>
|
||||
#include <linux/export.h>
|
||||
|
||||
#include <bcm63xx_cpu.h>
|
||||
@@ -16,9 +18,14 @@
|
||||
#include <bcm63xx_io.h>
|
||||
#include <bcm63xx_usb_priv.h>
|
||||
|
||||
+static DEFINE_SPINLOCK(usb_priv_reg_lock);
|
||||
+
|
||||
void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device)
|
||||
{
|
||||
u32 val;
|
||||
+ unsigned long flags;
|
||||
+
|
||||
+ spin_lock_irqsave(&usb_priv_reg_lock, flags);
|
||||
|
||||
val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
|
||||
if (is_device) {
|
||||
@@ -36,12 +43,17 @@ void bcm63xx_usb_priv_select_phy_mode(u3
|
||||
else
|
||||
val &= ~USBH_PRIV_SWAP_USBD_MASK;
|
||||
bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
|
||||
+
|
||||
+ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
|
||||
}
|
||||
EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode);
|
||||
|
||||
void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on)
|
||||
{
|
||||
u32 val;
|
||||
+ unsigned long flags;
|
||||
+
|
||||
+ spin_lock_irqsave(&usb_priv_reg_lock, flags);
|
||||
|
||||
val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
|
||||
if (is_on)
|
||||
@@ -49,5 +61,90 @@ void bcm63xx_usb_priv_select_pullup(u32
|
||||
else
|
||||
val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
|
||||
bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
|
||||
+
|
||||
+ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
|
||||
}
|
||||
EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup);
|
||||
+
|
||||
+/* The following array represents the meaning of the DESC/DATA
|
||||
+ * endian swapping with respect to the CPU configured endianness
|
||||
+ *
|
||||
+ * DATA ENDN mmio descriptor
|
||||
+ * 0 0 BE invalid
|
||||
+ * 0 1 BE LE
|
||||
+ * 1 0 BE BE
|
||||
+ * 1 1 BE invalid
|
||||
+ *
|
||||
+ * Since BCM63XX SoCs are configured to be in big-endian mode
|
||||
+ * we want configuration at line 3.
|
||||
+ */
|
||||
+void bcm63xx_usb_priv_ohci_cfg_set(void)
|
||||
+{
|
||||
+ u32 reg;
|
||||
+ unsigned long flags;
|
||||
+
|
||||
+ spin_lock_irqsave(&usb_priv_reg_lock, flags);
|
||||
+
|
||||
+ if (BCMCPU_IS_6348())
|
||||
+ bcm_rset_writel(RSET_OHCI_PRIV, 0, OHCI_PRIV_REG);
|
||||
+ else if (BCMCPU_IS_6358()) {
|
||||
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG);
|
||||
+ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
|
||||
+ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
|
||||
+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG);
|
||||
+ /*
|
||||
+ * The magic value comes for the original vendor BSP
|
||||
+ * and is needed for USB to work. Datasheet does not
|
||||
+ * help, so the magic value is used as-is.
|
||||
+ */
|
||||
+ bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020,
|
||||
+ USBH_PRIV_TEST_6358_REG);
|
||||
+
|
||||
+ } else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) {
|
||||
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
|
||||
+ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
|
||||
+ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
|
||||
+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
|
||||
+
|
||||
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
|
||||
+ reg |= USBH_PRIV_SETUP_IOC_MASK;
|
||||
+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
|
||||
+ }
|
||||
+
|
||||
+ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
|
||||
+}
|
||||
+
|
||||
+void bcm63xx_usb_priv_ehci_cfg_set(void)
|
||||
+{
|
||||
+ u32 reg;
|
||||
+ unsigned long flags;
|
||||
+
|
||||
+ spin_lock_irqsave(&usb_priv_reg_lock, flags);
|
||||
+
|
||||
+ if (BCMCPU_IS_6358()) {
|
||||
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG);
|
||||
+ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
|
||||
+ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
|
||||
+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG);
|
||||
+
|
||||
+ /*
|
||||
+ * The magic value comes for the original vendor BSP
|
||||
+ * and is needed for USB to work. Datasheet does not
|
||||
+ * help, so the magic value is used as-is.
|
||||
+ */
|
||||
+ bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020,
|
||||
+ USBH_PRIV_TEST_6358_REG);
|
||||
+
|
||||
+ } else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) {
|
||||
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
|
||||
+ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
|
||||
+ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
|
||||
+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
|
||||
+
|
||||
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
|
||||
+ reg |= USBH_PRIV_SETUP_IOC_MASK;
|
||||
+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
|
||||
+ }
|
||||
+
|
||||
+ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
|
||||
+}
|
||||
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
|
||||
@@ -5,5 +5,7 @@
|
||||
|
||||
void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device);
|
||||
void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on);
|
||||
+void bcm63xx_usb_priv_ohci_cfg_set(void);
|
||||
+void bcm63xx_usb_priv_ehci_cfg_set(void);
|
||||
|
||||
#endif /* BCM63XX_USB_PRIV_H_ */
|
|
@ -1,62 +0,0 @@
|
|||
From 94ec618bd1a6b07fafbbfc9bcc54e7f9360ff9a0 Mon Sep 17 00:00:00 2001
|
||||
From: Florian Fainelli <florian@openwrt.org>
|
||||
Date: Mon, 28 Jan 2013 20:06:23 +0100
|
||||
Subject: [PATCH 05/11] MIPS: BCM63XX: introduce BCM63XX_OHCI configuration
|
||||
symbol
|
||||
|
||||
This configuration symbol can be used by CPUs supporting the on-chip
|
||||
OHCI controller, and ensures that all relevant OHCI-related
|
||||
configuration options are correctly selected. So far, OHCI support is
|
||||
available for the 6328, 6348, 6358 and 6358 SoCs.
|
||||
|
||||
Signed-off-by: Florian Fainelli <florian@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/Kconfig | 15 ++++++++++-----
|
||||
1 file changed, 10 insertions(+), 5 deletions(-)
|
||||
|
||||
--- a/arch/mips/bcm63xx/Kconfig
|
||||
+++ b/arch/mips/bcm63xx/Kconfig
|
||||
@@ -6,10 +6,17 @@ config BCM63XX_CPU_3368
|
||||
select SYS_HAS_CPU_BMIPS4350
|
||||
select HW_HAS_PCI
|
||||
|
||||
+config BCM63XX_OHCI
|
||||
+ bool
|
||||
+ select USB_ARCH_HAS_OHCI
|
||||
+ select USB_OHCI_BIG_ENDIAN_DESC if USB_OHCI_HCD
|
||||
+ select USB_OHCI_BIG_ENDIAN_MMIO if USB_OHCI_HCD
|
||||
+
|
||||
config BCM63XX_CPU_6328
|
||||
bool "support 6328 CPU"
|
||||
select SYS_HAS_CPU_BMIPS4350
|
||||
select HW_HAS_PCI
|
||||
+ select BCM63XX_OHCI
|
||||
|
||||
config BCM63XX_CPU_6338
|
||||
bool "support 6338 CPU"
|
||||
@@ -24,21 +31,25 @@ config BCM63XX_CPU_6348
|
||||
bool "support 6348 CPU"
|
||||
select SYS_HAS_CPU_BMIPS32_3300
|
||||
select HW_HAS_PCI
|
||||
+ select BCM63XX_OHCI
|
||||
|
||||
config BCM63XX_CPU_6358
|
||||
bool "support 6358 CPU"
|
||||
select SYS_HAS_CPU_BMIPS4350
|
||||
select HW_HAS_PCI
|
||||
+ select BCM63XX_OHCI
|
||||
|
||||
config BCM63XX_CPU_6362
|
||||
bool "support 6362 CPU"
|
||||
select SYS_HAS_CPU_BMIPS4350
|
||||
select HW_HAS_PCI
|
||||
+ select BCM63XX_OHCI
|
||||
|
||||
config BCM63XX_CPU_6368
|
||||
bool "support 6368 CPU"
|
||||
select SYS_HAS_CPU_BMIPS4350
|
||||
select HW_HAS_PCI
|
||||
+ select BCM63XX_OHCI
|
||||
endmenu
|
||||
|
||||
source "arch/mips/bcm63xx/boards/Kconfig"
|
|
@ -1,138 +0,0 @@
|
|||
From 30d22baef255c99a12c4858ce4ab0d45f0d8c9ae Mon Sep 17 00:00:00 2001
|
||||
From: Florian Fainelli <florian@openwrt.org>
|
||||
Date: Mon, 28 Jan 2013 20:06:24 +0100
|
||||
Subject: [PATCH 06/11] MIPS: BCM63XX: add support for the on-chip OHCI
|
||||
controller
|
||||
|
||||
Broadcom BCM63XX SoCs include an on-chip OHCI controller which can be
|
||||
driven by the ohci-platform generic driver by using specific power
|
||||
on/off/suspend callback to manage clocks and hardware specific
|
||||
configuration.
|
||||
|
||||
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
|
||||
Signed-off-by: Florian Fainelli <florian@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/Makefile | 2 +-
|
||||
arch/mips/bcm63xx/dev-usb-ohci.c | 94 ++++++++++++++++++++
|
||||
.../asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h | 6 ++
|
||||
3 files changed, 101 insertions(+), 1 deletion(-)
|
||||
create mode 100644 arch/mips/bcm63xx/dev-usb-ohci.c
|
||||
create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
|
||||
|
||||
--- a/arch/mips/bcm63xx/Makefile
|
||||
+++ b/arch/mips/bcm63xx/Makefile
|
||||
@@ -1,7 +1,7 @@
|
||||
obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
|
||||
setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
|
||||
dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
|
||||
- dev-wdt.o dev-usb-usbd.o usb-common.o
|
||||
+ dev-wdt.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o
|
||||
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
|
||||
|
||||
obj-y += boards/
|
||||
--- /dev/null
|
||||
+++ b/arch/mips/bcm63xx/dev-usb-ohci.c
|
||||
@@ -0,0 +1,94 @@
|
||||
+/*
|
||||
+ * This file is subject to the terms and conditions of the GNU General Public
|
||||
+ * License. See the file "COPYING" in the main directory of this archive
|
||||
+ * for more details.
|
||||
+ *
|
||||
+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
|
||||
+ * Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
|
||||
+ */
|
||||
+
|
||||
+#include <linux/init.h>
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <linux/usb/ohci_pdriver.h>
|
||||
+#include <linux/dma-mapping.h>
|
||||
+#include <linux/clk.h>
|
||||
+#include <linux/delay.h>
|
||||
+
|
||||
+#include <bcm63xx_cpu.h>
|
||||
+#include <bcm63xx_regs.h>
|
||||
+#include <bcm63xx_io.h>
|
||||
+#include <bcm63xx_usb_priv.h>
|
||||
+#include <bcm63xx_dev_usb_ohci.h>
|
||||
+
|
||||
+static struct resource ohci_resources[] = {
|
||||
+ {
|
||||
+ .start = -1, /* filled at runtime */
|
||||
+ .end = -1, /* filled at runtime */
|
||||
+ .flags = IORESOURCE_MEM,
|
||||
+ },
|
||||
+ {
|
||||
+ .start = -1, /* filled at runtime */
|
||||
+ .flags = IORESOURCE_IRQ,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static u64 ohci_dmamask = DMA_BIT_MASK(32);
|
||||
+
|
||||
+static struct clk *usb_host_clock;
|
||||
+
|
||||
+static int bcm63xx_ohci_power_on(struct platform_device *pdev)
|
||||
+{
|
||||
+ usb_host_clock = clk_get(&pdev->dev, "usbh");
|
||||
+ if (IS_ERR_OR_NULL(usb_host_clock))
|
||||
+ return -ENODEV;
|
||||
+
|
||||
+ clk_prepare_enable(usb_host_clock);
|
||||
+
|
||||
+ bcm63xx_usb_priv_ohci_cfg_set();
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static void bcm63xx_ohci_power_off(struct platform_device *pdev)
|
||||
+{
|
||||
+ if (!IS_ERR_OR_NULL(usb_host_clock)) {
|
||||
+ clk_disable_unprepare(usb_host_clock);
|
||||
+ clk_put(usb_host_clock);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+static struct usb_ohci_pdata bcm63xx_ohci_pdata = {
|
||||
+ .big_endian_desc = 1,
|
||||
+ .big_endian_mmio = 1,
|
||||
+ .no_big_frame_no = 1,
|
||||
+ .num_ports = 1,
|
||||
+ .power_on = bcm63xx_ohci_power_on,
|
||||
+ .power_off = bcm63xx_ohci_power_off,
|
||||
+ .power_suspend = bcm63xx_ohci_power_off,
|
||||
+};
|
||||
+
|
||||
+static struct platform_device bcm63xx_ohci_device = {
|
||||
+ .name = "ohci-platform",
|
||||
+ .id = -1,
|
||||
+ .num_resources = ARRAY_SIZE(ohci_resources),
|
||||
+ .resource = ohci_resources,
|
||||
+ .dev = {
|
||||
+ .platform_data = &bcm63xx_ohci_pdata,
|
||||
+ .dma_mask = &ohci_dmamask,
|
||||
+ .coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+int __init bcm63xx_ohci_register(void)
|
||||
+{
|
||||
+ if (BCMCPU_IS_6345() || BCMCPU_IS_6338())
|
||||
+ return -ENODEV;
|
||||
+
|
||||
+ ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0);
|
||||
+ ohci_resources[0].end = ohci_resources[0].start;
|
||||
+ ohci_resources[0].end += RSET_OHCI_SIZE - 1;
|
||||
+ ohci_resources[1].start = bcm63xx_get_irq_number(IRQ_OHCI0);
|
||||
+
|
||||
+ return platform_device_register(&bcm63xx_ohci_device);
|
||||
+}
|
||||
--- /dev/null
|
||||
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
|
||||
@@ -0,0 +1,6 @@
|
||||
+#ifndef BCM63XX_DEV_USB_OHCI_H_
|
||||
+#define BCM63XX_DEV_USB_OHCI_H_
|
||||
+
|
||||
+int bcm63xx_ohci_register(void);
|
||||
+
|
||||
+#endif /* BCM63XX_DEV_USB_OHCI_H_ */
|
|
@ -1,36 +0,0 @@
|
|||
From 33ef960aed15f9a98a2c51d8d794cd72418e0be4 Mon Sep 17 00:00:00 2001
|
||||
From: Florian Fainelli <florian@openwrt.org>
|
||||
Date: Mon, 28 Jan 2013 20:06:25 +0100
|
||||
Subject: [PATCH 07/11] MIPS: BCM63XX: register OHCI controller if board
|
||||
enables it
|
||||
|
||||
BCM63XX-based boards can control the registration of the OHCI controller
|
||||
by setting their has_ohci0 flag to 1. Handle this in the generic
|
||||
code dealing with board registration and call the actual helper to
|
||||
register the OHCI controller.
|
||||
|
||||
Signed-off-by: Florian Fainelli <florian@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/boards/board_bcm963xx.c | 4 ++++
|
||||
1 file changed, 4 insertions(+)
|
||||
|
||||
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
|
||||
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
|
||||
@@ -26,6 +26,7 @@
|
||||
#include <bcm63xx_dev_hsspi.h>
|
||||
#include <bcm63xx_dev_pcmcia.h>
|
||||
#include <bcm63xx_dev_spi.h>
|
||||
+#include <bcm63xx_dev_usb_ohci.h>
|
||||
#include <bcm63xx_dev_usb_usbd.h>
|
||||
#include <board_bcm963xx.h>
|
||||
|
||||
@@ -898,6 +899,9 @@ int __init board_register_devices(void)
|
||||
if (board.has_usbd)
|
||||
bcm63xx_usbd_register(&board.usbd);
|
||||
|
||||
+ if (board.has_ohci0)
|
||||
+ bcm63xx_ohci_register();
|
||||
+
|
||||
if (board.has_dsp)
|
||||
bcm63xx_dsp_register(&board.dsp);
|
||||
|
|
@ -1,62 +0,0 @@
|
|||
From 00da1683364e58c6430a4577123d01037f8faddc Mon Sep 17 00:00:00 2001
|
||||
From: Florian Fainelli <florian@openwrt.org>
|
||||
Date: Mon, 28 Jan 2013 20:06:26 +0100
|
||||
Subject: [PATCH 08/11] MIPS: BCM63XX: introduce BCM63XX_EHCI configuration
|
||||
symbol
|
||||
|
||||
This configuration symbol can be used by CPUs supporting the on-chip
|
||||
EHCI controller, and ensures that all relevant EHCI-related
|
||||
configuration options are selected. So far BCM6328, BCM6358 and BCM6368
|
||||
have an EHCI controller and do select this symbol. Update
|
||||
drivers/usb/host/Kconfig with BCM63XX to update direct unmet
|
||||
dependencies.
|
||||
|
||||
Signed-off-by: Florian Fainelli <florian@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/Kconfig | 9 +++++++++
|
||||
drivers/usb/host/Kconfig | 5 +++--
|
||||
2 files changed, 12 insertions(+), 2 deletions(-)
|
||||
|
||||
--- a/arch/mips/bcm63xx/Kconfig
|
||||
+++ b/arch/mips/bcm63xx/Kconfig
|
||||
@@ -12,11 +12,18 @@ config BCM63XX_OHCI
|
||||
select USB_OHCI_BIG_ENDIAN_DESC if USB_OHCI_HCD
|
||||
select USB_OHCI_BIG_ENDIAN_MMIO if USB_OHCI_HCD
|
||||
|
||||
+config BCM63XX_EHCI
|
||||
+ bool
|
||||
+ select USB_ARCH_HAS_EHCI
|
||||
+ select USB_EHCI_BIG_ENDIAN_DESC if USB_EHCI_HCD
|
||||
+ select USB_EHCI_BIG_ENDIAN_MMIO if USB_EHCI_HCD
|
||||
+
|
||||
config BCM63XX_CPU_6328
|
||||
bool "support 6328 CPU"
|
||||
select SYS_HAS_CPU_BMIPS4350
|
||||
select HW_HAS_PCI
|
||||
select BCM63XX_OHCI
|
||||
+ select BCM63XX_EHCI
|
||||
|
||||
config BCM63XX_CPU_6338
|
||||
bool "support 6338 CPU"
|
||||
@@ -38,18 +45,21 @@ config BCM63XX_CPU_6358
|
||||
select SYS_HAS_CPU_BMIPS4350
|
||||
select HW_HAS_PCI
|
||||
select BCM63XX_OHCI
|
||||
+ select BCM63XX_EHCI
|
||||
|
||||
config BCM63XX_CPU_6362
|
||||
bool "support 6362 CPU"
|
||||
select SYS_HAS_CPU_BMIPS4350
|
||||
select HW_HAS_PCI
|
||||
select BCM63XX_OHCI
|
||||
+ select BCM63XX_EHCI
|
||||
|
||||
config BCM63XX_CPU_6368
|
||||
bool "support 6368 CPU"
|
||||
select SYS_HAS_CPU_BMIPS4350
|
||||
select HW_HAS_PCI
|
||||
select BCM63XX_OHCI
|
||||
+ select BCM63XX_EHCI
|
||||
endmenu
|
||||
|
||||
source "arch/mips/bcm63xx/boards/Kconfig"
|
|
@ -1,137 +0,0 @@
|
|||
From e38f13bd6408769c0b565bb1079024f496eee121 Mon Sep 17 00:00:00 2001
|
||||
From: Florian Fainelli <florian@openwrt.org>
|
||||
Date: Mon, 28 Jan 2013 20:06:27 +0100
|
||||
Subject: [PATCH 09/11] MIPS: BCM63XX: add support for the on-chip EHCI
|
||||
controller
|
||||
|
||||
Broadcom BCM63XX SoCs include an on-chip EHCI controller which can be
|
||||
driven by the generic ehci-platform driver by using specific power
|
||||
on/off/suspend callbacks to manage clocks and hardware specific
|
||||
configuration.
|
||||
|
||||
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
|
||||
Signed-off-by: Florian Fainelli <florian@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/Makefile | 2 +-
|
||||
arch/mips/bcm63xx/dev-usb-ehci.c | 92 ++++++++++++++++++++
|
||||
.../asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h | 6 ++
|
||||
3 files changed, 99 insertions(+), 1 deletion(-)
|
||||
create mode 100644 arch/mips/bcm63xx/dev-usb-ehci.c
|
||||
create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
|
||||
|
||||
--- a/arch/mips/bcm63xx/Makefile
|
||||
+++ b/arch/mips/bcm63xx/Makefile
|
||||
@@ -1,7 +1,8 @@
|
||||
obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
|
||||
setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
|
||||
dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
|
||||
- dev-wdt.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o
|
||||
+ dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \
|
||||
+ usb-common.o
|
||||
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
|
||||
|
||||
obj-y += boards/
|
||||
--- /dev/null
|
||||
+++ b/arch/mips/bcm63xx/dev-usb-ehci.c
|
||||
@@ -0,0 +1,92 @@
|
||||
+/*
|
||||
+ * This file is subject to the terms and conditions of the GNU General Public
|
||||
+ * License. See the file "COPYING" in the main directory of this archive
|
||||
+ * for more details.
|
||||
+ *
|
||||
+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
|
||||
+ * Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
|
||||
+ */
|
||||
+
|
||||
+#include <linux/init.h>
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <linux/clk.h>
|
||||
+#include <linux/delay.h>
|
||||
+#include <linux/usb/ehci_pdriver.h>
|
||||
+#include <linux/dma-mapping.h>
|
||||
+
|
||||
+#include <bcm63xx_cpu.h>
|
||||
+#include <bcm63xx_regs.h>
|
||||
+#include <bcm63xx_io.h>
|
||||
+#include <bcm63xx_usb_priv.h>
|
||||
+#include <bcm63xx_dev_usb_ehci.h>
|
||||
+
|
||||
+static struct resource ehci_resources[] = {
|
||||
+ {
|
||||
+ .start = -1, /* filled at runtime */
|
||||
+ .end = -1, /* filled at runtime */
|
||||
+ .flags = IORESOURCE_MEM,
|
||||
+ },
|
||||
+ {
|
||||
+ .start = -1, /* filled at runtime */
|
||||
+ .flags = IORESOURCE_IRQ,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static u64 ehci_dmamask = DMA_BIT_MASK(32);
|
||||
+
|
||||
+static struct clk *usb_host_clock;
|
||||
+
|
||||
+static int bcm63xx_ehci_power_on(struct platform_device *pdev)
|
||||
+{
|
||||
+ usb_host_clock = clk_get(&pdev->dev, "usbh");
|
||||
+ if (IS_ERR_OR_NULL(usb_host_clock))
|
||||
+ return -ENODEV;
|
||||
+
|
||||
+ clk_prepare_enable(usb_host_clock);
|
||||
+
|
||||
+ bcm63xx_usb_priv_ehci_cfg_set();
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static void bcm63xx_ehci_power_off(struct platform_device *pdev)
|
||||
+{
|
||||
+ if (!IS_ERR_OR_NULL(usb_host_clock)) {
|
||||
+ clk_disable_unprepare(usb_host_clock);
|
||||
+ clk_put(usb_host_clock);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+static struct usb_ehci_pdata bcm63xx_ehci_pdata = {
|
||||
+ .big_endian_desc = 1,
|
||||
+ .big_endian_mmio = 1,
|
||||
+ .power_on = bcm63xx_ehci_power_on,
|
||||
+ .power_off = bcm63xx_ehci_power_off,
|
||||
+ .power_suspend = bcm63xx_ehci_power_off,
|
||||
+};
|
||||
+
|
||||
+static struct platform_device bcm63xx_ehci_device = {
|
||||
+ .name = "ehci-platform",
|
||||
+ .id = -1,
|
||||
+ .num_resources = ARRAY_SIZE(ehci_resources),
|
||||
+ .resource = ehci_resources,
|
||||
+ .dev = {
|
||||
+ .platform_data = &bcm63xx_ehci_pdata,
|
||||
+ .dma_mask = &ehci_dmamask,
|
||||
+ .coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+int __init bcm63xx_ehci_register(void)
|
||||
+{
|
||||
+ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6358() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
|
||||
+ return 0;
|
||||
+
|
||||
+ ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
|
||||
+ ehci_resources[0].end = ehci_resources[0].start;
|
||||
+ ehci_resources[0].end += RSET_EHCI_SIZE - 1;
|
||||
+ ehci_resources[1].start = bcm63xx_get_irq_number(IRQ_EHCI0);
|
||||
+
|
||||
+ return platform_device_register(&bcm63xx_ehci_device);
|
||||
+}
|
||||
--- /dev/null
|
||||
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
|
||||
@@ -0,0 +1,6 @@
|
||||
+#ifndef BCM63XX_DEV_USB_EHCI_H_
|
||||
+#define BCM63XX_DEV_USB_EHCI_H_
|
||||
+
|
||||
+int bcm63xx_ehci_register(void);
|
||||
+
|
||||
+#endif /* BCM63XX_DEV_USB_EHCI_H_ */
|
|
@ -1,36 +0,0 @@
|
|||
From 709ef2034f5ba06da35f89856ad7baf2b7a41287 Mon Sep 17 00:00:00 2001
|
||||
From: Florian Fainelli <florian@openwrt.org>
|
||||
Date: Mon, 28 Jan 2013 20:06:28 +0100
|
||||
Subject: [PATCH 10/11] MIPS: BCM63XX: register EHCI controller if board
|
||||
enables it
|
||||
|
||||
BCM63XX-based board can control the registration of the EHCI controller
|
||||
by setting their has_ehci0 flag to 1. Handle this in the generic
|
||||
code dealing with board registration and call the actual helper to register
|
||||
the EHCI controller.
|
||||
|
||||
Signed-off-by: Florian Fainelli <florian@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/boards/board_bcm963xx.c | 4 ++++
|
||||
1 file changed, 4 insertions(+)
|
||||
|
||||
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
|
||||
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
|
||||
@@ -26,6 +26,7 @@
|
||||
#include <bcm63xx_dev_hsspi.h>
|
||||
#include <bcm63xx_dev_pcmcia.h>
|
||||
#include <bcm63xx_dev_spi.h>
|
||||
+#include <bcm63xx_dev_usb_ehci.h>
|
||||
#include <bcm63xx_dev_usb_ohci.h>
|
||||
#include <bcm63xx_dev_usb_usbd.h>
|
||||
#include <board_bcm963xx.h>
|
||||
@@ -899,6 +900,9 @@ int __init board_register_devices(void)
|
||||
if (board.has_usbd)
|
||||
bcm63xx_usbd_register(&board.usbd);
|
||||
|
||||
+ if (board.has_ehci0)
|
||||
+ bcm63xx_ehci_register();
|
||||
+
|
||||
if (board.has_ohci0)
|
||||
bcm63xx_ohci_register();
|
||||
|
|
@ -1,24 +0,0 @@
|
|||
From 111bbd770441ab34f9da5bb1d85767a9b75227b4 Mon Sep 17 00:00:00 2001
|
||||
From: Florian Fainelli <florian@openwrt.org>
|
||||
Date: Mon, 28 Jan 2013 20:06:30 +0100
|
||||
Subject: [PATCH 12/12] MIPS: BCM63XX: EHCI controller does not support
|
||||
overcurrent
|
||||
|
||||
This patch sets the ignore_oc flag for the BCM63XX EHCI controller as it
|
||||
does not support proper overcurrent reporting.
|
||||
|
||||
Signed-off-by: Florian Fainelli <florian@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/dev-usb-ehci.c | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
--- a/arch/mips/bcm63xx/dev-usb-ehci.c
|
||||
+++ b/arch/mips/bcm63xx/dev-usb-ehci.c
|
||||
@@ -61,6 +61,7 @@ static void bcm63xx_ehci_power_off(struc
|
||||
static struct usb_ehci_pdata bcm63xx_ehci_pdata = {
|
||||
.big_endian_desc = 1,
|
||||
.big_endian_mmio = 1,
|
||||
+ .ignore_oc = 1,
|
||||
.power_on = bcm63xx_ehci_power_on,
|
||||
.power_off = bcm63xx_ehci_power_off,
|
||||
.power_suspend = bcm63xx_ehci_power_off,
|
|
@ -1,38 +0,0 @@
|
|||
From 3f650fc30aa0badf9d02842ce396cea3eef2eeaa Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jonas.gorski@gmail.com>
|
||||
Date: Fri, 1 Jul 2011 23:16:47 +0200
|
||||
Subject: [PATCH 49/79] SPI: Allow specifying the parsers for SPI flash
|
||||
|
||||
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
|
||||
---
|
||||
include/linux/spi/flash.h | 5 ++++-
|
||||
1 file changed, 4 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/include/linux/spi/flash.h
|
||||
+++ b/include/linux/spi/flash.h
|
||||
@@ -2,7 +2,7 @@
|
||||
#define LINUX_SPI_FLASH_H
|
||||
|
||||
struct mtd_partition;
|
||||
-
|
||||
+struct mtd_part_parser_data;
|
||||
/**
|
||||
* struct flash_platform_data: board-specific flash data
|
||||
* @name: optional flash device name (eg, as used with mtdparts=)
|
||||
@@ -10,6 +10,8 @@ struct mtd_partition;
|
||||
* @nr_parts: number of mtd_partitions for static partitoning
|
||||
* @type: optional flash device type (e.g. m25p80 vs m25p64), for use
|
||||
* with chips that can't be queried for JEDEC or other IDs
|
||||
+ * @part_probe_types: optional list of MTD parser names to use for
|
||||
+ * partitioning
|
||||
*
|
||||
* Board init code (in arch/.../mach-xxx/board-yyy.c files) can
|
||||
* provide information about SPI flash parts (such as DataFlash) to
|
||||
@@ -25,6 +27,7 @@ struct flash_platform_data {
|
||||
|
||||
char *type;
|
||||
|
||||
+ const char **part_probe_types;
|
||||
/* we'll likely add more ... use JEDEC IDs, etc */
|
||||
};
|
||||
|
|
@ -1,23 +0,0 @@
|
|||
From c7c3c338cb25d7f55ddb3f6bfbf3572758ca3896 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jonas.gorski@gmail.com>
|
||||
Date: Thu, 10 Nov 2011 16:53:08 +0100
|
||||
Subject: [PATCH 50/79] MTD: DEVICES: m25p80: use parsers if provided in flash
|
||||
platform data
|
||||
|
||||
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
|
||||
---
|
||||
drivers/mtd/devices/m25p80.c | 3 ++-
|
||||
1 file changed, 2 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/drivers/mtd/devices/m25p80.c
|
||||
+++ b/drivers/mtd/devices/m25p80.c
|
||||
@@ -1314,7 +1314,8 @@ static int m25p_probe(struct spi_device
|
||||
/* partitions should match sector boundaries; and it may be good to
|
||||
* use readonly partitions for writeprotected sectors (BP2..BP0).
|
||||
*/
|
||||
- return mtd_device_parse_register(&flash->mtd, NULL, &ppdata,
|
||||
+ return mtd_device_parse_register(&flash->mtd,
|
||||
+ data ? data->part_probe_types : NULL, &ppdata,
|
||||
data ? data->parts : NULL,
|
||||
data ? data->nr_parts : 0);
|
||||
}
|
|
@ -1,92 +0,0 @@
|
|||
From 5fb4e8d7287ac8fcb33aae8b1e9e22c5a3c392bd Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jonas.gorski@gmail.com>
|
||||
Date: Thu, 10 Nov 2011 17:33:40 +0100
|
||||
Subject: [PATCH 51/79] MTD: DEVICES: m25p80: add support for limiting reads
|
||||
|
||||
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
|
||||
---
|
||||
drivers/mtd/devices/m25p80.c | 29 +++++++++++++++++++++++++++--
|
||||
include/linux/spi/flash.h | 4 ++++
|
||||
2 files changed, 31 insertions(+), 2 deletions(-)
|
||||
|
||||
--- a/drivers/mtd/devices/m25p80.c
|
||||
+++ b/drivers/mtd/devices/m25p80.c
|
||||
@@ -115,6 +115,7 @@ struct m25p {
|
||||
u8 program_opcode;
|
||||
u8 *command;
|
||||
enum read_type flash_read;
|
||||
+ int max_transfer_len;
|
||||
};
|
||||
|
||||
static inline struct m25p *mtd_to_m25p(struct mtd_info *mtd)
|
||||
@@ -509,10 +510,9 @@ static inline unsigned int m25p80_rx_nbi
|
||||
* Read an address range from the flash chip. The address range
|
||||
* may be any size provided it is within the physical boundaries.
|
||||
*/
|
||||
-static int m25p80_read(struct mtd_info *mtd, loff_t from, size_t len,
|
||||
+static int __m25p80_read(struct m25p *flash, loff_t from, size_t len,
|
||||
size_t *retlen, u_char *buf)
|
||||
{
|
||||
- struct m25p *flash = mtd_to_m25p(mtd);
|
||||
struct spi_transfer t[2];
|
||||
struct spi_message m;
|
||||
uint8_t opcode;
|
||||
@@ -562,6 +562,28 @@ static int m25p80_read(struct mtd_info *
|
||||
return 0;
|
||||
}
|
||||
|
||||
+static int m25p80_read(struct mtd_info *mtd, loff_t from, size_t len,
|
||||
+ size_t *retlen, u_char *buf)
|
||||
+{
|
||||
+ struct m25p *flash = mtd_to_m25p(mtd);
|
||||
+ size_t off;
|
||||
+ size_t read_len = flash->max_transfer_len;
|
||||
+ size_t part_len;
|
||||
+ int ret = 0;
|
||||
+
|
||||
+ if (!read_len)
|
||||
+ return __m25p80_read(flash, from, len, retlen, buf);
|
||||
+
|
||||
+ *retlen = 0;
|
||||
+
|
||||
+ for (off = 0; off < len && !ret; off += read_len) {
|
||||
+ ret = __m25p80_read(flash, from + off, min(len - off, read_len),
|
||||
+ &part_len, buf + off);
|
||||
+ *retlen += part_len;
|
||||
+ }
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
/*
|
||||
* Write an address range to the flash chip. Data must be written in
|
||||
* FLASH_PAGESIZE chunks. The address range may be any size provided
|
||||
@@ -1159,6 +1181,9 @@ static int m25p_probe(struct spi_device
|
||||
if (!flash->command)
|
||||
return -ENOMEM;
|
||||
|
||||
+ if (data)
|
||||
+ flash->max_transfer_len = data->max_transfer_len;
|
||||
+
|
||||
flash->spi = spi;
|
||||
mutex_init(&flash->lock);
|
||||
spi_set_drvdata(spi, flash);
|
||||
--- a/include/linux/spi/flash.h
|
||||
+++ b/include/linux/spi/flash.h
|
||||
@@ -13,6 +13,8 @@ struct mtd_part_parser_data;
|
||||
* @part_probe_types: optional list of MTD parser names to use for
|
||||
* partitioning
|
||||
*
|
||||
+ * @max_transfer_len: option maximum read/write length limitation for
|
||||
+ * SPI controllers not able to transfer any length commands.
|
||||
* Board init code (in arch/.../mach-xxx/board-yyy.c files) can
|
||||
* provide information about SPI flash parts (such as DataFlash) to
|
||||
* help set up the device and its appropriate default partitioning.
|
||||
@@ -28,6 +30,8 @@ struct flash_platform_data {
|
||||
char *type;
|
||||
|
||||
const char **part_probe_types;
|
||||
+
|
||||
+ unsigned int max_transfer_len;
|
||||
/* we'll likely add more ... use JEDEC IDs, etc */
|
||||
};
|
||||
|
|
@ -1,31 +0,0 @@
|
|||
From b2f399dcd674a692a64bb3b300b77b78ae57b530 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Sun, 12 Jan 2014 16:47:35 +0100
|
||||
Subject: [PATCH] USB: OHCI: allow other arches to use the BE frame number
|
||||
quirk
|
||||
|
||||
Intead of guarding it with a certain PPC SoC and expanding the list
|
||||
for each SoC requiring it, just guard it with USB_OHCI_BIG_ENDIAN_DESC.
|
||||
|
||||
This makes it less suprising that passing no_big_frame_no = 1 for the
|
||||
platform data does not do what expected (or
|
||||
|
||||
Checking it for all big endian descriptor setups should not impact
|
||||
performance much as USB1.1 is rather slow anyway.
|
||||
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
drivers/usb/host/ohci.h | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
--- a/drivers/usb/host/ohci.h
|
||||
+++ b/drivers/usb/host/ohci.h
|
||||
@@ -641,7 +641,7 @@ static inline u32 hc32_to_cpup (const st
|
||||
* some big-endian SOC implementations. Same thing happens with PSW access.
|
||||
*/
|
||||
|
||||
-#ifdef CONFIG_PPC_MPC52xx
|
||||
+#ifdef CONFIG_USB_OHCI_BIG_ENDIAN_DESC
|
||||
#define big_endian_frame_no_quirk(ohci) (ohci->flags & OHCI_QUIRK_FRAME_NO)
|
||||
#else
|
||||
#define big_endian_frame_no_quirk(ohci) 0
|
|
@ -1,65 +0,0 @@
|
|||
From 6ac09efa8f0e189ffe7dd7b0889289de56ee44cc Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Sun, 19 Jan 2014 12:18:03 +0100
|
||||
Subject: [PATCH] USB: EHCI: allow limiting ports for ehci-platform
|
||||
|
||||
In the same way as the ohci platform driver allows limiting ports,
|
||||
enable the same for ehci. This prevents a mismatch in the available
|
||||
ports between ehci/ohci on USB 2.0 controllers.
|
||||
|
||||
This is needed if the USB host controller always reports the maximum
|
||||
number of ports regardless of the number of available ports (because
|
||||
one might be set to be usb device).
|
||||
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
drivers/usb/host/ehci-hcd.c | 4 ++++
|
||||
drivers/usb/host/ehci-platform.c | 2 ++
|
||||
drivers/usb/host/ehci.h | 1 +
|
||||
include/linux/usb/ehci_pdriver.h | 1 +
|
||||
4 files changed, 8 insertions(+)
|
||||
|
||||
--- a/drivers/usb/host/ehci-hcd.c
|
||||
+++ b/drivers/usb/host/ehci-hcd.c
|
||||
@@ -660,6 +660,10 @@ int ehci_setup(struct usb_hcd *hcd)
|
||||
|
||||
/* cache this readonly data; minimize chip reads */
|
||||
ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
|
||||
+ if (ehci->num_ports) {
|
||||
+ ehci->hcs_params &= ~0xf; /* bits 3:0, ports on HC */
|
||||
+ ehci->hcs_params |= ehci->num_ports;
|
||||
+ }
|
||||
|
||||
ehci->sbrn = HCD_USB2;
|
||||
|
||||
--- a/drivers/usb/host/ehci-platform.c
|
||||
+++ b/drivers/usb/host/ehci-platform.c
|
||||
@@ -48,6 +48,8 @@ static int ehci_platform_reset(struct us
|
||||
ehci->big_endian_desc = pdata->big_endian_desc;
|
||||
ehci->big_endian_mmio = pdata->big_endian_mmio;
|
||||
ehci->ignore_oc = pdata->ignore_oc;
|
||||
+ if (pdata->num_ports && pdata->num_ports <= 15)
|
||||
+ ehci->num_ports = pdata->num_ports;
|
||||
|
||||
if (pdata->pre_setup) {
|
||||
retval = pdata->pre_setup(hcd);
|
||||
--- a/drivers/usb/host/ehci.h
|
||||
+++ b/drivers/usb/host/ehci.h
|
||||
@@ -213,6 +213,7 @@ struct ehci_hcd { /* one per controlle
|
||||
u32 command;
|
||||
|
||||
/* SILICON QUIRKS */
|
||||
+ unsigned int num_ports;
|
||||
unsigned no_selective_suspend:1;
|
||||
unsigned has_fsl_port_bug:1; /* FreeScale */
|
||||
unsigned big_endian_mmio:1;
|
||||
--- a/include/linux/usb/ehci_pdriver.h
|
||||
+++ b/include/linux/usb/ehci_pdriver.h
|
||||
@@ -40,6 +40,7 @@ struct usb_hcd;
|
||||
*/
|
||||
struct usb_ehci_pdata {
|
||||
int caps_offset;
|
||||
+ unsigned int num_ports;
|
||||
unsigned has_tt:1;
|
||||
unsigned has_synopsys_hc_bug:1;
|
||||
unsigned big_endian_desc:1;
|
|
@ -1,493 +0,0 @@
|
|||
From 5a50cb0d53344a2429831b00925d6183d4d332e1 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Sun, 9 Mar 2014 03:54:05 +0100
|
||||
Subject: [PATCH 40/44] MIPS: BCM63XX: move device registration code into its
|
||||
own file
|
||||
|
||||
Move device registration code into its own file to allow sharing it
|
||||
between board implementations.
|
||||
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/boards/Makefile | 1 +
|
||||
arch/mips/bcm63xx/boards/board_bcm963xx.c | 188 +-------------------------
|
||||
arch/mips/bcm63xx/boards/board_common.c | 215 ++++++++++++++++++++++++++++++
|
||||
arch/mips/bcm63xx/boards/board_common.h | 8 ++
|
||||
4 files changed, 223 insertions(+), 183 deletions(-)
|
||||
create mode 100644 arch/mips/bcm63xx/boards/board_common.c
|
||||
create mode 100644 arch/mips/bcm63xx/boards/board_common.h
|
||||
|
||||
--- a/arch/mips/bcm63xx/boards/Makefile
|
||||
+++ b/arch/mips/bcm63xx/boards/Makefile
|
||||
@@ -1 +1,2 @@
|
||||
+obj-y += board_common.o
|
||||
obj-$(CONFIG_BOARD_BCM963XX) += board_bcm963xx.o
|
||||
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
|
||||
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
|
||||
@@ -10,35 +10,22 @@
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/string.h>
|
||||
-#include <linux/platform_device.h>
|
||||
-#include <linux/ssb/ssb.h>
|
||||
#include <asm/addrspace.h>
|
||||
#include <bcm63xx_board.h>
|
||||
#include <bcm63xx_cpu.h>
|
||||
-#include <bcm63xx_dev_uart.h>
|
||||
#include <bcm63xx_regs.h>
|
||||
#include <bcm63xx_io.h>
|
||||
#include <bcm63xx_nvram.h>
|
||||
-#include <bcm63xx_dev_pci.h>
|
||||
-#include <bcm63xx_dev_enet.h>
|
||||
-#include <bcm63xx_dev_dsp.h>
|
||||
-#include <bcm63xx_dev_flash.h>
|
||||
-#include <bcm63xx_dev_hsspi.h>
|
||||
-#include <bcm63xx_dev_pcmcia.h>
|
||||
-#include <bcm63xx_dev_spi.h>
|
||||
-#include <bcm63xx_dev_usb_ehci.h>
|
||||
-#include <bcm63xx_dev_usb_ohci.h>
|
||||
-#include <bcm63xx_dev_usb_usbd.h>
|
||||
#include <board_bcm963xx.h>
|
||||
|
||||
+#include "board_common.h"
|
||||
+
|
||||
#include <uapi/linux/bcm933xx_hcs.h>
|
||||
|
||||
#define PFX "board_bcm963xx: "
|
||||
|
||||
#define HCS_OFFSET_128K 0x20000
|
||||
|
||||
-static struct board_info board;
|
||||
-
|
||||
/*
|
||||
* known 3368 boards
|
||||
*/
|
||||
@@ -711,52 +698,6 @@ static const struct board_info __initcon
|
||||
};
|
||||
|
||||
/*
|
||||
- * Register a sane SPROMv2 to make the on-board
|
||||
- * bcm4318 WLAN work
|
||||
- */
|
||||
-#ifdef CONFIG_SSB_PCIHOST
|
||||
-static struct ssb_sprom bcm63xx_sprom = {
|
||||
- .revision = 0x02,
|
||||
- .board_rev = 0x17,
|
||||
- .country_code = 0x0,
|
||||
- .ant_available_bg = 0x3,
|
||||
- .pa0b0 = 0x15ae,
|
||||
- .pa0b1 = 0xfa85,
|
||||
- .pa0b2 = 0xfe8d,
|
||||
- .pa1b0 = 0xffff,
|
||||
- .pa1b1 = 0xffff,
|
||||
- .pa1b2 = 0xffff,
|
||||
- .gpio0 = 0xff,
|
||||
- .gpio1 = 0xff,
|
||||
- .gpio2 = 0xff,
|
||||
- .gpio3 = 0xff,
|
||||
- .maxpwr_bg = 0x004c,
|
||||
- .itssi_bg = 0x00,
|
||||
- .boardflags_lo = 0x2848,
|
||||
- .boardflags_hi = 0x0000,
|
||||
-};
|
||||
-
|
||||
-int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
|
||||
-{
|
||||
- if (bus->bustype == SSB_BUSTYPE_PCI) {
|
||||
- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
|
||||
- return 0;
|
||||
- } else {
|
||||
- printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
|
||||
- return -EINVAL;
|
||||
- }
|
||||
-}
|
||||
-#endif
|
||||
-
|
||||
-/*
|
||||
- * return board name for /proc/cpuinfo
|
||||
- */
|
||||
-const char *board_get_name(void)
|
||||
-{
|
||||
- return board.name;
|
||||
-}
|
||||
-
|
||||
-/*
|
||||
* early init callback, read nvram data from flash and checksum it
|
||||
*/
|
||||
void __init board_prom_init(void)
|
||||
@@ -801,141 +742,16 @@ void __init board_prom_init(void)
|
||||
if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
|
||||
continue;
|
||||
/* copy, board desc array is marked initdata */
|
||||
- memcpy(&board, bcm963xx_boards[i], sizeof(board));
|
||||
+ board_early_setup(bcm963xx_boards[i]);
|
||||
break;
|
||||
}
|
||||
|
||||
- /* bail out if board is not found, will complain later */
|
||||
- if (!board.name[0]) {
|
||||
+ /* warn if board is not found, will complain later */
|
||||
+ if (i == ARRAY_SIZE(bcm963xx_boards)) {
|
||||
char name[17];
|
||||
memcpy(name, board_name, 16);
|
||||
name[16] = 0;
|
||||
printk(KERN_ERR PFX "unknown bcm963xx board: %s\n",
|
||||
name);
|
||||
- return;
|
||||
- }
|
||||
-
|
||||
- /* setup pin multiplexing depending on board enabled device,
|
||||
- * this has to be done this early since PCI init is done
|
||||
- * inside arch_initcall */
|
||||
- val = 0;
|
||||
-
|
||||
-#ifdef CONFIG_PCI
|
||||
- if (board.has_pci) {
|
||||
- bcm63xx_pci_enabled = 1;
|
||||
- if (BCMCPU_IS_6348())
|
||||
- val |= GPIO_MODE_6348_G2_PCI;
|
||||
- }
|
||||
-#endif
|
||||
-
|
||||
- if (board.has_pccard) {
|
||||
- if (BCMCPU_IS_6348())
|
||||
- val |= GPIO_MODE_6348_G1_MII_PCCARD;
|
||||
- }
|
||||
-
|
||||
- if (board.has_enet0 && !board.enet0.use_internal_phy) {
|
||||
- if (BCMCPU_IS_6348())
|
||||
- val |= GPIO_MODE_6348_G3_EXT_MII |
|
||||
- GPIO_MODE_6348_G0_EXT_MII;
|
||||
- }
|
||||
-
|
||||
- if (board.has_enet1 && !board.enet1.use_internal_phy) {
|
||||
- if (BCMCPU_IS_6348())
|
||||
- val |= GPIO_MODE_6348_G3_EXT_MII |
|
||||
- GPIO_MODE_6348_G0_EXT_MII;
|
||||
- }
|
||||
-
|
||||
- bcm_gpio_writel(val, GPIO_MODE_REG);
|
||||
-}
|
||||
-
|
||||
-/*
|
||||
- * second stage init callback, good time to panic if we couldn't
|
||||
- * identify on which board we're running since early printk is working
|
||||
- */
|
||||
-void __init board_setup(void)
|
||||
-{
|
||||
- if (!board.name[0])
|
||||
- panic("unable to detect bcm963xx board");
|
||||
- printk(KERN_INFO PFX "board name: %s\n", board.name);
|
||||
-
|
||||
- /* make sure we're running on expected cpu */
|
||||
- if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
|
||||
- panic("unexpected CPU for bcm963xx board");
|
||||
-}
|
||||
-
|
||||
-static struct gpio_led_platform_data bcm63xx_led_data;
|
||||
-
|
||||
-static struct platform_device bcm63xx_gpio_leds = {
|
||||
- .name = "leds-gpio",
|
||||
- .id = 0,
|
||||
- .dev.platform_data = &bcm63xx_led_data,
|
||||
-};
|
||||
-
|
||||
-/*
|
||||
- * third stage init callback, register all board devices.
|
||||
- */
|
||||
-int __init board_register_devices(void)
|
||||
-{
|
||||
- if (board.has_uart0)
|
||||
- bcm63xx_uart_register(0);
|
||||
-
|
||||
- if (board.has_uart1)
|
||||
- bcm63xx_uart_register(1);
|
||||
-
|
||||
- if (board.has_pccard)
|
||||
- bcm63xx_pcmcia_register();
|
||||
-
|
||||
- if (board.has_enet0 &&
|
||||
- !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
|
||||
- bcm63xx_enet_register(0, &board.enet0);
|
||||
-
|
||||
- if (board.has_enet1 &&
|
||||
- !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
|
||||
- bcm63xx_enet_register(1, &board.enet1);
|
||||
-
|
||||
- if (board.has_enetsw &&
|
||||
- !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
|
||||
- bcm63xx_enetsw_register(&board.enetsw);
|
||||
-
|
||||
- if (board.has_usbd)
|
||||
- bcm63xx_usbd_register(&board.usbd);
|
||||
-
|
||||
- if (board.has_ehci0)
|
||||
- bcm63xx_ehci_register();
|
||||
-
|
||||
- if (board.has_ohci0)
|
||||
- bcm63xx_ohci_register();
|
||||
-
|
||||
- if (board.has_dsp)
|
||||
- bcm63xx_dsp_register(&board.dsp);
|
||||
-
|
||||
- /* Generate MAC address for WLAN and register our SPROM,
|
||||
- * do this after registering enet devices
|
||||
- */
|
||||
-#ifdef CONFIG_SSB_PCIHOST
|
||||
- if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
|
||||
- memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
|
||||
- memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
|
||||
- if (ssb_arch_register_fallback_sprom(
|
||||
- &bcm63xx_get_fallback_sprom) < 0)
|
||||
- pr_err(PFX "failed to register fallback SPROM\n");
|
||||
}
|
||||
-#endif
|
||||
-
|
||||
- bcm63xx_spi_register();
|
||||
-
|
||||
- bcm63xx_hsspi_register();
|
||||
-
|
||||
- bcm63xx_flash_register();
|
||||
-
|
||||
- bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
|
||||
- bcm63xx_led_data.leds = board.leds;
|
||||
-
|
||||
- platform_device_register(&bcm63xx_gpio_leds);
|
||||
-
|
||||
- if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
|
||||
- gpio_request_one(board.ephy_reset_gpio,
|
||||
- board.ephy_reset_gpio_flags, "ephy-reset");
|
||||
-
|
||||
- return 0;
|
||||
}
|
||||
--- /dev/null
|
||||
+++ b/arch/mips/bcm63xx/boards/board_common.c
|
||||
@@ -0,0 +1,217 @@
|
||||
+/*
|
||||
+ * This file is subject to the terms and conditions of the GNU General Public
|
||||
+ * License. See the file "COPYING" in the main directory of this archive
|
||||
+ * for more details.
|
||||
+ *
|
||||
+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
|
||||
+ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
|
||||
+ */
|
||||
+
|
||||
+#include <linux/init.h>
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/string.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <linux/ssb/ssb.h>
|
||||
+#include <asm/addrspace.h>
|
||||
+#include <bcm63xx_board.h>
|
||||
+#include <bcm63xx_cpu.h>
|
||||
+#include <bcm63xx_dev_uart.h>
|
||||
+#include <bcm63xx_regs.h>
|
||||
+#include <bcm63xx_io.h>
|
||||
+#include <bcm63xx_nvram.h>
|
||||
+#include <bcm63xx_dev_pci.h>
|
||||
+#include <bcm63xx_dev_enet.h>
|
||||
+#include <bcm63xx_dev_dsp.h>
|
||||
+#include <bcm63xx_dev_flash.h>
|
||||
+#include <bcm63xx_dev_hsspi.h>
|
||||
+#include <bcm63xx_dev_pcmcia.h>
|
||||
+#include <bcm63xx_dev_spi.h>
|
||||
+#include <bcm63xx_dev_usb_ehci.h>
|
||||
+#include <bcm63xx_dev_usb_ohci.h>
|
||||
+#include <bcm63xx_dev_usb_usbd.h>
|
||||
+#include <board_bcm963xx.h>
|
||||
+
|
||||
+#define PFX "board: "
|
||||
+
|
||||
+static struct board_info board;
|
||||
+
|
||||
+/*
|
||||
+ * Register a sane SPROMv2 to make the on-board
|
||||
+ * bcm4318 WLAN work
|
||||
+ */
|
||||
+#ifdef CONFIG_SSB_PCIHOST
|
||||
+static struct ssb_sprom bcm63xx_sprom = {
|
||||
+ .revision = 0x02,
|
||||
+ .board_rev = 0x17,
|
||||
+ .country_code = 0x0,
|
||||
+ .ant_available_bg = 0x3,
|
||||
+ .pa0b0 = 0x15ae,
|
||||
+ .pa0b1 = 0xfa85,
|
||||
+ .pa0b2 = 0xfe8d,
|
||||
+ .pa1b0 = 0xffff,
|
||||
+ .pa1b1 = 0xffff,
|
||||
+ .pa1b2 = 0xffff,
|
||||
+ .gpio0 = 0xff,
|
||||
+ .gpio1 = 0xff,
|
||||
+ .gpio2 = 0xff,
|
||||
+ .gpio3 = 0xff,
|
||||
+ .maxpwr_bg = 0x004c,
|
||||
+ .itssi_bg = 0x00,
|
||||
+ .boardflags_lo = 0x2848,
|
||||
+ .boardflags_hi = 0x0000,
|
||||
+};
|
||||
+
|
||||
+int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
|
||||
+{
|
||||
+ if (bus->bustype == SSB_BUSTYPE_PCI) {
|
||||
+ memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
|
||||
+ return 0;
|
||||
+ } else {
|
||||
+ printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+}
|
||||
+#endif
|
||||
+
|
||||
+/*
|
||||
+ * return board name for /proc/cpuinfo
|
||||
+ */
|
||||
+const char *board_get_name(void)
|
||||
+{
|
||||
+ return board.name;
|
||||
+}
|
||||
+
|
||||
+/*
|
||||
+ * setup board for device registration
|
||||
+ */
|
||||
+void __init board_early_setup(const struct board_info *target)
|
||||
+{
|
||||
+ u32 val;
|
||||
+
|
||||
+ memcpy(&board, target, sizeof(board));
|
||||
+
|
||||
+ /* setup pin multiplexing depending on board enabled device,
|
||||
+ * this has to be done this early since PCI init is done
|
||||
+ * inside arch_initcall */
|
||||
+ val = 0;
|
||||
+
|
||||
+#ifdef CONFIG_PCI
|
||||
+ if (board.has_pci) {
|
||||
+ bcm63xx_pci_enabled = 1;
|
||||
+ if (BCMCPU_IS_6348())
|
||||
+ val |= GPIO_MODE_6348_G2_PCI;
|
||||
+ }
|
||||
+#endif
|
||||
+
|
||||
+ if (board.has_pccard) {
|
||||
+ if (BCMCPU_IS_6348())
|
||||
+ val |= GPIO_MODE_6348_G1_MII_PCCARD;
|
||||
+ }
|
||||
+
|
||||
+ if (board.has_enet0 && !board.enet0.use_internal_phy) {
|
||||
+ if (BCMCPU_IS_6348())
|
||||
+ val |= GPIO_MODE_6348_G3_EXT_MII |
|
||||
+ GPIO_MODE_6348_G0_EXT_MII;
|
||||
+ }
|
||||
+
|
||||
+ if (board.has_enet1 && !board.enet1.use_internal_phy) {
|
||||
+ if (BCMCPU_IS_6348())
|
||||
+ val |= GPIO_MODE_6348_G3_EXT_MII |
|
||||
+ GPIO_MODE_6348_G0_EXT_MII;
|
||||
+ }
|
||||
+
|
||||
+ bcm_gpio_writel(val, GPIO_MODE_REG);
|
||||
+}
|
||||
+
|
||||
+
|
||||
+/*
|
||||
+ * second stage init callback, good time to panic if we couldn't
|
||||
+ * identify on which board we're running since early printk is working
|
||||
+ */
|
||||
+void __init board_setup(void)
|
||||
+{
|
||||
+ if (!board.name[0])
|
||||
+ panic("unable to detect bcm963xx board");
|
||||
+ printk(KERN_INFO PFX "board name: %s\n", board.name);
|
||||
+
|
||||
+ /* make sure we're running on expected cpu */
|
||||
+ if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
|
||||
+ panic("unexpected CPU for bcm963xx board");
|
||||
+}
|
||||
+
|
||||
+static struct gpio_led_platform_data bcm63xx_led_data;
|
||||
+
|
||||
+static struct platform_device bcm63xx_gpio_leds = {
|
||||
+ .name = "leds-gpio",
|
||||
+ .id = 0,
|
||||
+ .dev.platform_data = &bcm63xx_led_data,
|
||||
+};
|
||||
+
|
||||
+/*
|
||||
+ * third stage init callback, register all board devices.
|
||||
+ */
|
||||
+int __init board_register_devices(void)
|
||||
+{
|
||||
+ if (board.has_uart0)
|
||||
+ bcm63xx_uart_register(0);
|
||||
+
|
||||
+ if (board.has_uart1)
|
||||
+ bcm63xx_uart_register(1);
|
||||
+
|
||||
+ if (board.has_pccard)
|
||||
+ bcm63xx_pcmcia_register();
|
||||
+
|
||||
+ if (board.has_enet0 &&
|
||||
+ !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
|
||||
+ bcm63xx_enet_register(0, &board.enet0);
|
||||
+
|
||||
+ if (board.has_enet1 &&
|
||||
+ !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
|
||||
+ bcm63xx_enet_register(1, &board.enet1);
|
||||
+
|
||||
+ if (board.has_enetsw &&
|
||||
+ !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
|
||||
+ bcm63xx_enetsw_register(&board.enetsw);
|
||||
+
|
||||
+ if (board.has_usbd)
|
||||
+ bcm63xx_usbd_register(&board.usbd);
|
||||
+
|
||||
+ if (board.has_ehci0)
|
||||
+ bcm63xx_ehci_register();
|
||||
+
|
||||
+ if (board.has_ohci0)
|
||||
+ bcm63xx_ohci_register();
|
||||
+
|
||||
+ if (board.has_dsp)
|
||||
+ bcm63xx_dsp_register(&board.dsp);
|
||||
+
|
||||
+ /* Generate MAC address for WLAN and register our SPROM,
|
||||
+ * do this after registering enet devices
|
||||
+ */
|
||||
+#ifdef CONFIG_SSB_PCIHOST
|
||||
+ if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
|
||||
+ memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
|
||||
+ memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
|
||||
+ if (ssb_arch_register_fallback_sprom(
|
||||
+ &bcm63xx_get_fallback_sprom) < 0)
|
||||
+ pr_err(PFX "failed to register fallback SPROM\n");
|
||||
+ }
|
||||
+#endif
|
||||
+
|
||||
+ bcm63xx_spi_register();
|
||||
+
|
||||
+ bcm63xx_hsspi_register();
|
||||
+
|
||||
+ bcm63xx_flash_register();
|
||||
+
|
||||
+ bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
|
||||
+ bcm63xx_led_data.leds = board.leds;
|
||||
+
|
||||
+ platform_device_register(&bcm63xx_gpio_leds);
|
||||
+
|
||||
+ if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
|
||||
+ gpio_request_one(board.ephy_reset_gpio,
|
||||
+ board.ephy_reset_gpio_flags, "ephy-reset");
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
--- /dev/null
|
||||
+++ b/arch/mips/bcm63xx/boards/board_common.h
|
||||
@@ -0,0 +1,8 @@
|
||||
+#ifndef __BOARD_COMMON_H
|
||||
+#define __BOARD_COMMON_H
|
||||
+
|
||||
+#include <board_bcm963xx.h>
|
||||
+
|
||||
+void board_early_setup(const struct board_info *board);
|
||||
+
|
||||
+#endif /* __BOARD_COMMON_H */
|
|
@ -1,100 +0,0 @@
|
|||
From 4e9c34a37bd3442b286ba55441bfe22c1ac5b65f Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Sun, 9 Mar 2014 04:08:06 +0100
|
||||
Subject: [PATCH 41/44] MIPS: BCM63XX: pass a mac addresss allocator to board
|
||||
setup
|
||||
|
||||
Pass a mac address allocator to board setup code to allow board
|
||||
implementations to work with third party bootloaders not using nvram
|
||||
for configuration storage.
|
||||
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/boards/board_bcm963xx.c | 3 ++-
|
||||
arch/mips/bcm63xx/boards/board_common.c | 16 ++++++++++------
|
||||
arch/mips/bcm63xx/boards/board_common.h | 3 ++-
|
||||
3 files changed, 14 insertions(+), 8 deletions(-)
|
||||
|
||||
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
|
||||
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
|
||||
@@ -742,7 +742,8 @@ void __init board_prom_init(void)
|
||||
if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
|
||||
continue;
|
||||
/* copy, board desc array is marked initdata */
|
||||
- board_early_setup(bcm963xx_boards[i]);
|
||||
+ board_early_setup(bcm963xx_boards[i],
|
||||
+ bcm63xx_nvram_get_mac_address);
|
||||
break;
|
||||
}
|
||||
|
||||
--- a/arch/mips/bcm63xx/boards/board_common.c
|
||||
+++ b/arch/mips/bcm63xx/boards/board_common.c
|
||||
@@ -18,7 +18,6 @@
|
||||
#include <bcm63xx_dev_uart.h>
|
||||
#include <bcm63xx_regs.h>
|
||||
#include <bcm63xx_io.h>
|
||||
-#include <bcm63xx_nvram.h>
|
||||
#include <bcm63xx_dev_pci.h>
|
||||
#include <bcm63xx_dev_enet.h>
|
||||
#include <bcm63xx_dev_dsp.h>
|
||||
@@ -81,15 +80,20 @@ const char *board_get_name(void)
|
||||
return board.name;
|
||||
}
|
||||
|
||||
+static int (*board_get_mac_address)(u8 mac[ETH_ALEN]);
|
||||
+
|
||||
/*
|
||||
* setup board for device registration
|
||||
*/
|
||||
-void __init board_early_setup(const struct board_info *target)
|
||||
+void __init board_early_setup(const struct board_info *target,
|
||||
+ int (*get_mac_address)(u8 mac[ETH_ALEN]))
|
||||
{
|
||||
u32 val;
|
||||
|
||||
memcpy(&board, target, sizeof(board));
|
||||
|
||||
+ board_get_mac_address = get_mac_address;
|
||||
+
|
||||
/* setup pin multiplexing depending on board enabled device,
|
||||
* this has to be done this early since PCI init is done
|
||||
* inside arch_initcall */
|
||||
@@ -162,15 +166,15 @@ int __init board_register_devices(void)
|
||||
bcm63xx_pcmcia_register();
|
||||
|
||||
if (board.has_enet0 &&
|
||||
- !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
|
||||
+ !board_get_mac_address(board.enet0.mac_addr))
|
||||
bcm63xx_enet_register(0, &board.enet0);
|
||||
|
||||
if (board.has_enet1 &&
|
||||
- !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
|
||||
+ !board_get_mac_address(board.enet1.mac_addr))
|
||||
bcm63xx_enet_register(1, &board.enet1);
|
||||
|
||||
if (board.has_enetsw &&
|
||||
- !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
|
||||
+ !board_get_mac_address(board.enetsw.mac_addr))
|
||||
bcm63xx_enetsw_register(&board.enetsw);
|
||||
|
||||
if (board.has_usbd)
|
||||
@@ -189,7 +193,7 @@ int __init board_register_devices(void)
|
||||
* do this after registering enet devices
|
||||
*/
|
||||
#ifdef CONFIG_SSB_PCIHOST
|
||||
- if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
|
||||
+ if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
|
||||
memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
|
||||
memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
|
||||
if (ssb_arch_register_fallback_sprom(
|
||||
--- a/arch/mips/bcm63xx/boards/board_common.h
|
||||
+++ b/arch/mips/bcm63xx/boards/board_common.h
|
||||
@@ -3,6 +3,7 @@
|
||||
|
||||
#include <board_bcm963xx.h>
|
||||
|
||||
-void board_early_setup(const struct board_info *board);
|
||||
+void board_early_setup(const struct board_info *board,
|
||||
+ int (*get_mac_address)(u8 mac[ETH_ALEN]));
|
||||
|
||||
#endif /* __BOARD_COMMON_H */
|
|
@ -1,135 +0,0 @@
|
|||
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
|
||||
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
|
||||
@@ -10,6 +10,8 @@
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/string.h>
|
||||
+#include <linux/gpio_keys.h>
|
||||
+#include <linux/input.h>
|
||||
#include <asm/addrspace.h>
|
||||
#include <bcm63xx_board.h>
|
||||
#include <bcm63xx_cpu.h>
|
||||
@@ -26,6 +28,9 @@
|
||||
|
||||
#define HCS_OFFSET_128K 0x20000
|
||||
|
||||
+#define BCM963XX_KEYS_POLL_INTERVAL 20
|
||||
+#define BCM963XX_KEYS_DEBOUNCE_INTERVAL (BCM963XX_KEYS_POLL_INTERVAL * 3)
|
||||
+
|
||||
/*
|
||||
* known 3368 boards
|
||||
*/
|
||||
@@ -367,6 +372,16 @@ static struct board_info __initdata boar
|
||||
.active_low = 1,
|
||||
},
|
||||
},
|
||||
+ .buttons = {
|
||||
+ {
|
||||
+ .desc = "reset",
|
||||
+ .gpio = 33,
|
||||
+ .active_low = 1,
|
||||
+ .type = EV_KEY,
|
||||
+ .code = KEY_RESTART,
|
||||
+ .debounce_interval = BCM963XX_KEYS_DEBOUNCE_INTERVAL,
|
||||
+ },
|
||||
+ },
|
||||
};
|
||||
|
||||
static struct board_info __initdata board_96348gw = {
|
||||
@@ -425,6 +440,16 @@ static struct board_info __initdata boar
|
||||
.active_low = 1,
|
||||
},
|
||||
},
|
||||
+ .buttons = {
|
||||
+ {
|
||||
+ .desc = "reset",
|
||||
+ .gpio = 36,
|
||||
+ .active_low = 1,
|
||||
+ .type = EV_KEY,
|
||||
+ .code = KEY_RESTART,
|
||||
+ .debounce_interval = BCM963XX_KEYS_DEBOUNCE_INTERVAL,
|
||||
+ },
|
||||
+ },
|
||||
};
|
||||
|
||||
static struct board_info __initdata board_FAST2404 = {
|
||||
--- a/arch/mips/bcm63xx/boards/board_common.c
|
||||
+++ b/arch/mips/bcm63xx/boards/board_common.c
|
||||
@@ -12,6 +12,7 @@
|
||||
#include <linux/string.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/ssb/ssb.h>
|
||||
+#include <linux/gpio_keys.h>
|
||||
#include <asm/addrspace.h>
|
||||
#include <bcm63xx_board.h>
|
||||
#include <bcm63xx_cpu.h>
|
||||
@@ -32,6 +33,8 @@
|
||||
|
||||
#define PFX "board: "
|
||||
|
||||
+#define BCM963XX_KEYS_POLL_INTERVAL 20
|
||||
+
|
||||
static struct board_info board;
|
||||
|
||||
/*
|
||||
@@ -151,11 +154,23 @@ static struct platform_device bcm63xx_gp
|
||||
.dev.platform_data = &bcm63xx_led_data,
|
||||
};
|
||||
|
||||
+static struct gpio_keys_platform_data bcm63xx_gpio_keys_data = {
|
||||
+ .poll_interval = BCM963XX_KEYS_POLL_INTERVAL,
|
||||
+};
|
||||
+
|
||||
+static struct platform_device bcm63xx_gpio_keys_device = {
|
||||
+ .name = "gpio-keys-polled",
|
||||
+ .id = 0,
|
||||
+ .dev.platform_data = &bcm63xx_gpio_keys_data,
|
||||
+};
|
||||
+
|
||||
/*
|
||||
* third stage init callback, register all board devices.
|
||||
*/
|
||||
int __init board_register_devices(void)
|
||||
{
|
||||
+ int button_count = 0;
|
||||
+
|
||||
if (board.has_uart0)
|
||||
bcm63xx_uart_register(0);
|
||||
|
||||
@@ -217,5 +232,16 @@ int __init board_register_devices(void)
|
||||
gpio_request_one(board.ephy_reset_gpio,
|
||||
board.ephy_reset_gpio_flags, "ephy-reset");
|
||||
|
||||
+ /* count number of BUTTONs defined by this device */
|
||||
+ while (button_count < ARRAY_SIZE(board.buttons) && board.buttons[button_count].desc)
|
||||
+ button_count++;
|
||||
+
|
||||
+ if (button_count) {
|
||||
+ bcm63xx_gpio_keys_data.nbuttons = button_count;
|
||||
+ bcm63xx_gpio_keys_data.buttons = board.buttons;
|
||||
+
|
||||
+ platform_device_register(&bcm63xx_gpio_keys_device);
|
||||
+ }
|
||||
+
|
||||
return 0;
|
||||
}
|
||||
--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
|
||||
@@ -3,6 +3,7 @@
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/gpio.h>
|
||||
+#include <linux/gpio_keys.h>
|
||||
#include <linux/leds.h>
|
||||
#include <bcm63xx_dev_enet.h>
|
||||
#include <bcm63xx_dev_usb_usbd.h>
|
||||
@@ -48,6 +49,9 @@ struct board_info {
|
||||
/* GPIO LEDs */
|
||||
struct gpio_led leds[5];
|
||||
|
||||
+ /* Buttons */
|
||||
+ struct gpio_keys_button buttons[4];
|
||||
+
|
||||
/* External PHY reset GPIO */
|
||||
unsigned int ephy_reset_gpio;
|
||||
|
|
@ -1,41 +0,0 @@
|
|||
--- a/arch/mips/bcm63xx/boards/board_common.c
|
||||
+++ b/arch/mips/bcm63xx/boards/board_common.c
|
||||
@@ -170,6 +170,7 @@ static struct platform_device bcm63xx_gp
|
||||
int __init board_register_devices(void)
|
||||
{
|
||||
int button_count = 0;
|
||||
+ int led_count = 0;
|
||||
|
||||
if (board.has_uart0)
|
||||
bcm63xx_uart_register(0);
|
||||
@@ -223,10 +224,16 @@ int __init board_register_devices(void)
|
||||
|
||||
bcm63xx_flash_register();
|
||||
|
||||
- bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
|
||||
- bcm63xx_led_data.leds = board.leds;
|
||||
+ /* count number of LEDs defined by this device */
|
||||
+ while (led_count < ARRAY_SIZE(board.leds) && board.leds[led_count].name)
|
||||
+ led_count++;
|
||||
+
|
||||
+ if (led_count) {
|
||||
+ bcm63xx_led_data.num_leds = led_count;
|
||||
+ bcm63xx_led_data.leds = board.leds;
|
||||
|
||||
- platform_device_register(&bcm63xx_gpio_leds);
|
||||
+ platform_device_register(&bcm63xx_gpio_leds);
|
||||
+ }
|
||||
|
||||
if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
|
||||
gpio_request_one(board.ephy_reset_gpio,
|
||||
--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
|
||||
@@ -47,7 +47,7 @@ struct board_info {
|
||||
struct bcm63xx_dsp_platform_data dsp;
|
||||
|
||||
/* GPIO LEDs */
|
||||
- struct gpio_led leds[5];
|
||||
+ struct gpio_led leds[14];
|
||||
|
||||
/* Buttons */
|
||||
struct gpio_keys_button buttons[4];
|
|
@ -1,25 +0,0 @@
|
|||
--- a/arch/mips/bcm63xx/boards/board_common.c
|
||||
+++ b/arch/mips/bcm63xx/boards/board_common.c
|
||||
@@ -222,6 +222,9 @@ int __init board_register_devices(void)
|
||||
|
||||
bcm63xx_hsspi_register();
|
||||
|
||||
+ if (board.num_devs)
|
||||
+ platform_add_devices(board.devs, board.num_devs);
|
||||
+
|
||||
bcm63xx_flash_register();
|
||||
|
||||
/* count number of LEDs defined by this device */
|
||||
--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
|
||||
@@ -57,6 +57,10 @@ struct board_info {
|
||||
|
||||
/* External PHY reset GPIO flags from gpio.h */
|
||||
unsigned long ephy_reset_gpio_flags;
|
||||
+
|
||||
+ /* Additional platform devices */
|
||||
+ struct platform_device **devs;
|
||||
+ unsigned int num_devs;
|
||||
};
|
||||
|
||||
#endif /* ! BOARD_BCM963XX_H_ */
|
|
@ -1,33 +0,0 @@
|
|||
--- a/arch/mips/bcm63xx/boards/board_common.c
|
||||
+++ b/arch/mips/bcm63xx/boards/board_common.c
|
||||
@@ -13,6 +13,7 @@
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/ssb/ssb.h>
|
||||
#include <linux/gpio_keys.h>
|
||||
+#include <linux/spi/spi.h>
|
||||
#include <asm/addrspace.h>
|
||||
#include <bcm63xx_board.h>
|
||||
#include <bcm63xx_cpu.h>
|
||||
@@ -225,6 +226,9 @@ int __init board_register_devices(void)
|
||||
if (board.num_devs)
|
||||
platform_add_devices(board.devs, board.num_devs);
|
||||
|
||||
+ if (board.num_spis)
|
||||
+ spi_register_board_info(board.spis, board.num_spis);
|
||||
+
|
||||
bcm63xx_flash_register();
|
||||
|
||||
/* count number of LEDs defined by this device */
|
||||
--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
|
||||
@@ -61,6 +61,10 @@ struct board_info {
|
||||
/* Additional platform devices */
|
||||
struct platform_device **devs;
|
||||
unsigned int num_devs;
|
||||
+
|
||||
+ /* Additional platform devices */
|
||||
+ struct spi_board_info *spis;
|
||||
+ unsigned int num_spis;
|
||||
};
|
||||
|
||||
#endif /* ! BOARD_BCM963XX_H_ */
|
|
@ -1,62 +0,0 @@
|
|||
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
|
||||
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
|
||||
@@ -23,6 +23,7 @@
|
||||
#include "board_common.h"
|
||||
|
||||
#include <uapi/linux/bcm933xx_hcs.h>
|
||||
+#include <uapi/linux/bcm963xx_tag.h>
|
||||
|
||||
#define PFX "board_bcm963xx: "
|
||||
|
||||
@@ -31,6 +32,9 @@
|
||||
#define BCM963XX_KEYS_POLL_INTERVAL 20
|
||||
#define BCM963XX_KEYS_DEBOUNCE_INTERVAL (BCM963XX_KEYS_POLL_INTERVAL * 3)
|
||||
|
||||
+#define CFE_OFFSET_64K 0x10000
|
||||
+#define CFE_OFFSET_128K 0x20000
|
||||
+
|
||||
/*
|
||||
* known 3368 boards
|
||||
*/
|
||||
@@ -722,6 +726,30 @@ static const struct board_info __initcon
|
||||
#endif
|
||||
};
|
||||
|
||||
+static void __init boardid_fixup(u8 *boot_addr)
|
||||
+{
|
||||
+ struct bcm_tag *tag = (struct bcm_tag *)(boot_addr + CFE_OFFSET_64K);
|
||||
+ char *board_name = (char *)bcm63xx_nvram_get_name();
|
||||
+
|
||||
+ /* check if bcm_tag is at 64k offset */
|
||||
+ if (strncmp(board_name, tag->board_id, BOARDID_LEN) != 0) {
|
||||
+ /* else try 128k */
|
||||
+ tag = (struct bcm_tag *)(boot_addr + CFE_OFFSET_128K);
|
||||
+ if (strncmp(board_name, tag->board_id, BOARDID_LEN) != 0) {
|
||||
+ /* No tag found */
|
||||
+ printk(KERN_DEBUG "No bcm_tag found!\n");
|
||||
+ return;
|
||||
+ }
|
||||
+ }
|
||||
+ /* check if we should override the boardid */
|
||||
+ if (tag->information1[0] != '+')
|
||||
+ return;
|
||||
+
|
||||
+ strncpy(board_name, &tag->information1[1], BOARDID_LEN);
|
||||
+
|
||||
+ printk(KERN_INFO "Overriding boardid with '%s'\n", board_name);
|
||||
+}
|
||||
+
|
||||
/*
|
||||
* early init callback, read nvram data from flash and checksum it
|
||||
*/
|
||||
@@ -760,6 +788,10 @@ void __init board_prom_init(void)
|
||||
hcs = (struct bcm_hcs *)boot_addr;
|
||||
board_name = hcs->filename;
|
||||
} else {
|
||||
+ if (strcmp(cfe_version, "unknown") != 0) {
|
||||
+ /* cfe present */
|
||||
+ boardid_fixup(boot_addr);
|
||||
+ }
|
||||
board_name = bcm63xx_nvram_get_name();
|
||||
}
|
||||
/* find board by name */
|
|
@ -1,267 +0,0 @@
|
|||
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
|
||||
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
|
||||
@@ -134,28 +134,28 @@ static struct board_info __initdata boar
|
||||
|
||||
.leds = {
|
||||
{
|
||||
- .name = "adsl",
|
||||
+ .name = "96338GW:green:adsl",
|
||||
.gpio = 3,
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
- .name = "ses",
|
||||
+ .name = "96338GW:green:ses",
|
||||
.gpio = 5,
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
- .name = "ppp-fail",
|
||||
+ .name = "96338GW:green:ppp-fail",
|
||||
.gpio = 4,
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
- .name = "power",
|
||||
+ .name = "96338GW:green:power",
|
||||
.gpio = 0,
|
||||
.active_low = 1,
|
||||
.default_trigger = "default-on",
|
||||
},
|
||||
{
|
||||
- .name = "stop",
|
||||
+ .name = "96338GW:green:stop",
|
||||
.gpio = 1,
|
||||
.active_low = 1,
|
||||
}
|
||||
@@ -175,28 +175,28 @@ static struct board_info __initdata boar
|
||||
|
||||
.leds = {
|
||||
{
|
||||
- .name = "adsl",
|
||||
+ .name = "96338W:green:adsl",
|
||||
.gpio = 3,
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
- .name = "ses",
|
||||
+ .name = "96338W:green:ses",
|
||||
.gpio = 5,
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
- .name = "ppp-fail",
|
||||
+ .name = "96338W:green:ppp-fail",
|
||||
.gpio = 4,
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
- .name = "power",
|
||||
+ .name = "96338W:green:power",
|
||||
.gpio = 0,
|
||||
.active_low = 1,
|
||||
.default_trigger = "default-on",
|
||||
},
|
||||
{
|
||||
- .name = "stop",
|
||||
+ .name = "96338W:green:stop",
|
||||
.gpio = 1,
|
||||
.active_low = 1,
|
||||
},
|
||||
@@ -235,29 +235,29 @@ static struct board_info __initdata boar
|
||||
|
||||
.leds = {
|
||||
{
|
||||
- .name = "adsl-fail",
|
||||
+ .name = "96348R:green:adsl-fail",
|
||||
.gpio = 2,
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
- .name = "ppp",
|
||||
+ .name = "96348R:green:ppp",
|
||||
.gpio = 3,
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
- .name = "ppp-fail",
|
||||
+ .name = "96348R:green:ppp-fail",
|
||||
.gpio = 4,
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
- .name = "power",
|
||||
+ .name = "96348R:green:power",
|
||||
.gpio = 0,
|
||||
.active_low = 1,
|
||||
.default_trigger = "default-on",
|
||||
|
||||
},
|
||||
{
|
||||
- .name = "stop",
|
||||
+ .name = "96348R:green:stop",
|
||||
.gpio = 1,
|
||||
.active_low = 1,
|
||||
},
|
||||
@@ -296,28 +296,28 @@ static struct board_info __initdata boar
|
||||
|
||||
.leds = {
|
||||
{
|
||||
- .name = "adsl-fail",
|
||||
+ .name = "96348GW-10:green:adsl-fail",
|
||||
.gpio = 2,
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
- .name = "ppp",
|
||||
+ .name = "96348GW-10:green:ppp",
|
||||
.gpio = 3,
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
- .name = "ppp-fail",
|
||||
+ .name = "96348GW-10:green:ppp-fail",
|
||||
.gpio = 4,
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
- .name = "power",
|
||||
+ .name = "96348GW-10:green:power",
|
||||
.gpio = 0,
|
||||
.active_low = 1,
|
||||
.default_trigger = "default-on",
|
||||
},
|
||||
{
|
||||
- .name = "stop",
|
||||
+ .name = "96348GW-10:green:stop",
|
||||
.gpio = 1,
|
||||
.active_low = 1,
|
||||
},
|
||||
@@ -350,28 +350,28 @@ static struct board_info __initdata boar
|
||||
|
||||
.leds = {
|
||||
{
|
||||
- .name = "adsl-fail",
|
||||
+ .name = "96348GW-11:green:adsl-fail",
|
||||
.gpio = 2,
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
- .name = "ppp",
|
||||
+ .name = "96348GW-11:green:ppp",
|
||||
.gpio = 3,
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
- .name = "ppp-fail",
|
||||
+ .name = "96348GW-11:green:ppp-fail",
|
||||
.gpio = 4,
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
- .name = "power",
|
||||
+ .name = "96348GW-11:green:power",
|
||||
.gpio = 0,
|
||||
.active_low = 1,
|
||||
.default_trigger = "default-on",
|
||||
},
|
||||
{
|
||||
- .name = "stop",
|
||||
+ .name = "96348GW-11:green:stop",
|
||||
.gpio = 1,
|
||||
.active_low = 1,
|
||||
},
|
||||
@@ -418,28 +418,28 @@ static struct board_info __initdata boar
|
||||
|
||||
.leds = {
|
||||
{
|
||||
- .name = "adsl-fail",
|
||||
+ .name = "96348GW:green:adsl-fail",
|
||||
.gpio = 2,
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
- .name = "ppp",
|
||||
+ .name = "96348GW:green:ppp",
|
||||
.gpio = 3,
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
- .name = "ppp-fail",
|
||||
+ .name = "96348GW:green:ppp-fail",
|
||||
.gpio = 4,
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
- .name = "power",
|
||||
+ .name = "96348GW:green:power",
|
||||
.gpio = 0,
|
||||
.active_low = 1,
|
||||
.default_trigger = "default-on",
|
||||
},
|
||||
{
|
||||
- .name = "stop",
|
||||
+ .name = "96348GW:green:stop",
|
||||
.gpio = 1,
|
||||
.active_low = 1,
|
||||
},
|
||||
@@ -571,27 +571,27 @@ static struct board_info __initdata boar
|
||||
|
||||
.leds = {
|
||||
{
|
||||
- .name = "adsl-fail",
|
||||
+ .name = "96358VW:green:adsl-fail",
|
||||
.gpio = 15,
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
- .name = "ppp",
|
||||
+ .name = "96358VW:green:ppp",
|
||||
.gpio = 22,
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
- .name = "ppp-fail",
|
||||
+ .name = "96358VW:green:ppp-fail",
|
||||
.gpio = 23,
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
- .name = "power",
|
||||
+ .name = "96358VW:green:power",
|
||||
.gpio = 4,
|
||||
.default_trigger = "default-on",
|
||||
},
|
||||
{
|
||||
- .name = "stop",
|
||||
+ .name = "96358VW:green:stop",
|
||||
.gpio = 5,
|
||||
},
|
||||
},
|
||||
@@ -623,22 +623,22 @@ static struct board_info __initdata boar
|
||||
|
||||
.leds = {
|
||||
{
|
||||
- .name = "adsl",
|
||||
+ .name = "96358VW2:green:adsl",
|
||||
.gpio = 22,
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
- .name = "ppp-fail",
|
||||
+ .name = "96358VW2:green:ppp-fail",
|
||||
.gpio = 23,
|
||||
},
|
||||
{
|
||||
- .name = "power",
|
||||
+ .name = "96358VW2:green:power",
|
||||
.gpio = 5,
|
||||
.active_low = 1,
|
||||
.default_trigger = "default-on",
|
||||
},
|
||||
{
|
||||
- .name = "stop",
|
||||
+ .name = "96358VW2:green:stop",
|
||||
.gpio = 4,
|
||||
.active_low = 1,
|
||||
},
|
|
@ -1,27 +0,0 @@
|
|||
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
|
||||
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
|
||||
@@ -775,10 +775,20 @@ void __init board_prom_init(void)
|
||||
|
||||
/* dump cfe version */
|
||||
cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
|
||||
- if (!memcmp(cfe, "cfe-v", 5))
|
||||
- snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u",
|
||||
- cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]);
|
||||
- else
|
||||
+ if (strstarts(cfe, "cfe-")) {
|
||||
+ if(cfe[4] == 'v') {
|
||||
+ if(cfe[5] == 'd')
|
||||
+ snprintf(cfe_version, 11, "%s", (char *) &cfe[5]);
|
||||
+ else if (cfe[10] > 0)
|
||||
+ snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u-%u",
|
||||
+ cfe[5], cfe[6], cfe[7], cfe[8], cfe[9], cfe[10]);
|
||||
+ else
|
||||
+ snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u",
|
||||
+ cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]);
|
||||
+ } else {
|
||||
+ snprintf(cfe_version, 12, "%s", (char *) &cfe[4]);
|
||||
+ }
|
||||
+ } else
|
||||
strcpy(cfe_version, "unknown");
|
||||
printk(KERN_INFO PFX "CFE version: %s\n", cfe_version);
|
||||
|
|
@ -1,61 +0,0 @@
|
|||
From 082a49f0490008b999db80e3ccf1521c7dd21cec Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Mon, 2 Dec 2013 12:32:44 +0100
|
||||
Subject: [PATCH 1/8] MIPS: BCM63XX: remove !RUNTIME_DETECT code from register
|
||||
sets
|
||||
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 33 ------------------------
|
||||
1 file changed, 33 deletions(-)
|
||||
|
||||
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
|
||||
@@ -598,10 +598,6 @@ enum bcm63xx_regs_set {
|
||||
|
||||
extern const unsigned long *bcm63xx_regs_base;
|
||||
|
||||
-#define __GEN_RSET_BASE(__cpu, __rset) \
|
||||
- case RSET_## __rset : \
|
||||
- return BCM_## __cpu ##_## __rset ##_BASE;
|
||||
-
|
||||
#define __GEN_RSET(__cpu) \
|
||||
switch (set) { \
|
||||
__GEN_RSET_BASE(__cpu, DSL_LMEM) \
|
||||
@@ -693,36 +689,7 @@ extern const unsigned long *bcm63xx_regs
|
||||
|
||||
static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set)
|
||||
{
|
||||
-#ifdef BCMCPU_RUNTIME_DETECT
|
||||
return bcm63xx_regs_base[set];
|
||||
-#else
|
||||
-#ifdef CONFIG_BCM63XX_CPU_3368
|
||||
- __GEN_RSET(3368)
|
||||
-#endif
|
||||
-#ifdef CONFIG_BCM63XX_CPU_6328
|
||||
- __GEN_RSET(6328)
|
||||
-#endif
|
||||
-#ifdef CONFIG_BCM63XX_CPU_6338
|
||||
- __GEN_RSET(6338)
|
||||
-#endif
|
||||
-#ifdef CONFIG_BCM63XX_CPU_6345
|
||||
- __GEN_RSET(6345)
|
||||
-#endif
|
||||
-#ifdef CONFIG_BCM63XX_CPU_6348
|
||||
- __GEN_RSET(6348)
|
||||
-#endif
|
||||
-#ifdef CONFIG_BCM63XX_CPU_6358
|
||||
- __GEN_RSET(6358)
|
||||
-#endif
|
||||
-#ifdef CONFIG_BCM63XX_CPU_6362
|
||||
- __GEN_RSET(6362)
|
||||
-#endif
|
||||
-#ifdef CONFIG_BCM63XX_CPU_6368
|
||||
- __GEN_RSET(6368)
|
||||
-#endif
|
||||
-#endif
|
||||
- /* unreached */
|
||||
- return 0;
|
||||
}
|
||||
|
||||
/*
|
|
@ -1,135 +0,0 @@
|
|||
From 07d0224576cbb2e6ac680b4ade4bba7a49bd0a07 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Mon, 2 Dec 2013 12:34:11 +0100
|
||||
Subject: [PATCH 2/8] MIPS: BCM63XX: remove !RUNTIME_DETECT from irq setup code
|
||||
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/irq.c | 109 ------------------------------------------------
|
||||
1 file changed, 109 deletions(-)
|
||||
|
||||
--- a/arch/mips/bcm63xx/irq.c
|
||||
+++ b/arch/mips/bcm63xx/irq.c
|
||||
@@ -26,114 +26,6 @@ static void __internal_irq_mask_64(unsig
|
||||
static void __internal_irq_unmask_32(unsigned int irq) __maybe_unused;
|
||||
static void __internal_irq_unmask_64(unsigned int irq) __maybe_unused;
|
||||
|
||||
-#ifndef BCMCPU_RUNTIME_DETECT
|
||||
-#ifdef CONFIG_BCM63XX_CPU_3368
|
||||
-#define irq_stat_reg PERF_IRQSTAT_3368_REG
|
||||
-#define irq_mask_reg PERF_IRQMASK_3368_REG
|
||||
-#define irq_bits 32
|
||||
-#define is_ext_irq_cascaded 0
|
||||
-#define ext_irq_start 0
|
||||
-#define ext_irq_end 0
|
||||
-#define ext_irq_count 4
|
||||
-#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_3368
|
||||
-#define ext_irq_cfg_reg2 0
|
||||
-#endif
|
||||
-#ifdef CONFIG_BCM63XX_CPU_6328
|
||||
-#define irq_stat_reg PERF_IRQSTAT_6328_REG
|
||||
-#define irq_mask_reg PERF_IRQMASK_6328_REG
|
||||
-#define irq_bits 64
|
||||
-#define is_ext_irq_cascaded 1
|
||||
-#define ext_irq_start (BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE)
|
||||
-#define ext_irq_end (BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE)
|
||||
-#define ext_irq_count 4
|
||||
-#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6328
|
||||
-#define ext_irq_cfg_reg2 0
|
||||
-#endif
|
||||
-#ifdef CONFIG_BCM63XX_CPU_6338
|
||||
-#define irq_stat_reg PERF_IRQSTAT_6338_REG
|
||||
-#define irq_mask_reg PERF_IRQMASK_6338_REG
|
||||
-#define irq_bits 32
|
||||
-#define is_ext_irq_cascaded 0
|
||||
-#define ext_irq_start 0
|
||||
-#define ext_irq_end 0
|
||||
-#define ext_irq_count 4
|
||||
-#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6338
|
||||
-#define ext_irq_cfg_reg2 0
|
||||
-#endif
|
||||
-#ifdef CONFIG_BCM63XX_CPU_6345
|
||||
-#define irq_stat_reg PERF_IRQSTAT_6345_REG
|
||||
-#define irq_mask_reg PERF_IRQMASK_6345_REG
|
||||
-#define irq_bits 32
|
||||
-#define is_ext_irq_cascaded 0
|
||||
-#define ext_irq_start 0
|
||||
-#define ext_irq_end 0
|
||||
-#define ext_irq_count 4
|
||||
-#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6345
|
||||
-#define ext_irq_cfg_reg2 0
|
||||
-#endif
|
||||
-#ifdef CONFIG_BCM63XX_CPU_6348
|
||||
-#define irq_stat_reg PERF_IRQSTAT_6348_REG
|
||||
-#define irq_mask_reg PERF_IRQMASK_6348_REG
|
||||
-#define irq_bits 32
|
||||
-#define is_ext_irq_cascaded 0
|
||||
-#define ext_irq_start 0
|
||||
-#define ext_irq_end 0
|
||||
-#define ext_irq_count 4
|
||||
-#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6348
|
||||
-#define ext_irq_cfg_reg2 0
|
||||
-#endif
|
||||
-#ifdef CONFIG_BCM63XX_CPU_6358
|
||||
-#define irq_stat_reg PERF_IRQSTAT_6358_REG
|
||||
-#define irq_mask_reg PERF_IRQMASK_6358_REG
|
||||
-#define irq_bits 32
|
||||
-#define is_ext_irq_cascaded 1
|
||||
-#define ext_irq_start (BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE)
|
||||
-#define ext_irq_end (BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE)
|
||||
-#define ext_irq_count 4
|
||||
-#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6358
|
||||
-#define ext_irq_cfg_reg2 0
|
||||
-#endif
|
||||
-#ifdef CONFIG_BCM63XX_CPU_6362
|
||||
-#define irq_stat_reg PERF_IRQSTAT_6362_REG
|
||||
-#define irq_mask_reg PERF_IRQMASK_6362_REG
|
||||
-#define irq_bits 64
|
||||
-#define is_ext_irq_cascaded 1
|
||||
-#define ext_irq_start (BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE)
|
||||
-#define ext_irq_end (BCM_6362_EXT_IRQ3 - IRQ_INTERNAL_BASE)
|
||||
-#define ext_irq_count 4
|
||||
-#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6362
|
||||
-#define ext_irq_cfg_reg2 0
|
||||
-#endif
|
||||
-#ifdef CONFIG_BCM63XX_CPU_6368
|
||||
-#define irq_stat_reg PERF_IRQSTAT_6368_REG
|
||||
-#define irq_mask_reg PERF_IRQMASK_6368_REG
|
||||
-#define irq_bits 64
|
||||
-#define is_ext_irq_cascaded 1
|
||||
-#define ext_irq_start (BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE)
|
||||
-#define ext_irq_end (BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE)
|
||||
-#define ext_irq_count 6
|
||||
-#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6368
|
||||
-#define ext_irq_cfg_reg2 PERF_EXTIRQ_CFG_REG2_6368
|
||||
-#endif
|
||||
-
|
||||
-#if irq_bits == 32
|
||||
-#define dispatch_internal __dispatch_internal
|
||||
-#define internal_irq_mask __internal_irq_mask_32
|
||||
-#define internal_irq_unmask __internal_irq_unmask_32
|
||||
-#else
|
||||
-#define dispatch_internal __dispatch_internal_64
|
||||
-#define internal_irq_mask __internal_irq_mask_64
|
||||
-#define internal_irq_unmask __internal_irq_unmask_64
|
||||
-#endif
|
||||
-
|
||||
-#define irq_stat_addr (bcm63xx_regset_address(RSET_PERF) + irq_stat_reg)
|
||||
-#define irq_mask_addr (bcm63xx_regset_address(RSET_PERF) + irq_mask_reg)
|
||||
-
|
||||
-static inline void bcm63xx_init_irq(void)
|
||||
-{
|
||||
-}
|
||||
-#else /* ! BCMCPU_RUNTIME_DETECT */
|
||||
-
|
||||
static u32 irq_stat_addr, irq_mask_addr;
|
||||
static void (*dispatch_internal)(void);
|
||||
static int is_ext_irq_cascaded;
|
||||
@@ -234,7 +126,6 @@ static void bcm63xx_init_irq(void)
|
||||
internal_irq_unmask = __internal_irq_unmask_64;
|
||||
}
|
||||
}
|
||||
-#endif /* ! BCMCPU_RUNTIME_DETECT */
|
||||
|
||||
static inline u32 get_ext_irq_perf_reg(int irq)
|
||||
{
|
|
@ -1,85 +0,0 @@
|
|||
From 72578a46543821c5b9544842e45fcbed0c1b7eb8 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Tue, 3 Dec 2013 13:35:12 +0100
|
||||
Subject: [PATCH 3/8] MIPS: BCM63XX: remove !RUNTIME_DETECT from reset code
|
||||
|
||||
---
|
||||
arch/mips/bcm63xx/reset.c | 60 -----------------------------------------------
|
||||
1 file changed, 60 deletions(-)
|
||||
|
||||
--- a/arch/mips/bcm63xx/reset.c
|
||||
+++ b/arch/mips/bcm63xx/reset.c
|
||||
@@ -125,8 +125,6 @@
|
||||
#define BCM6368_RESET_PCIE 0
|
||||
#define BCM6368_RESET_PCIE_EXT 0
|
||||
|
||||
-#ifdef BCMCPU_RUNTIME_DETECT
|
||||
-
|
||||
/*
|
||||
* core reset bits
|
||||
*/
|
||||
@@ -188,64 +186,6 @@ static int __init bcm63xx_reset_bits_ini
|
||||
|
||||
return 0;
|
||||
}
|
||||
-#else
|
||||
-
|
||||
-#ifdef CONFIG_BCM63XX_CPU_3368
|
||||
-static const u32 bcm63xx_reset_bits[] = {
|
||||
- __GEN_RESET_BITS_TABLE(3368)
|
||||
-};
|
||||
-#define reset_reg PERF_SOFTRESET_6358_REG
|
||||
-#endif
|
||||
-
|
||||
-#ifdef CONFIG_BCM63XX_CPU_6328
|
||||
-static const u32 bcm63xx_reset_bits[] = {
|
||||
- __GEN_RESET_BITS_TABLE(6328)
|
||||
-};
|
||||
-#define reset_reg PERF_SOFTRESET_6328_REG
|
||||
-#endif
|
||||
-
|
||||
-#ifdef CONFIG_BCM63XX_CPU_6338
|
||||
-static const u32 bcm63xx_reset_bits[] = {
|
||||
- __GEN_RESET_BITS_TABLE(6338)
|
||||
-};
|
||||
-#define reset_reg PERF_SOFTRESET_REG
|
||||
-#endif
|
||||
-
|
||||
-#ifdef CONFIG_BCM63XX_CPU_6345
|
||||
-static const u32 bcm63xx_reset_bits[] = { };
|
||||
-#define reset_reg 0
|
||||
-#endif
|
||||
-
|
||||
-#ifdef CONFIG_BCM63XX_CPU_6348
|
||||
-static const u32 bcm63xx_reset_bits[] = {
|
||||
- __GEN_RESET_BITS_TABLE(6348)
|
||||
-};
|
||||
-#define reset_reg PERF_SOFTRESET_REG
|
||||
-#endif
|
||||
-
|
||||
-#ifdef CONFIG_BCM63XX_CPU_6358
|
||||
-static const u32 bcm63xx_reset_bits[] = {
|
||||
- __GEN_RESET_BITS_TABLE(6358)
|
||||
-};
|
||||
-#define reset_reg PERF_SOFTRESET_6358_REG
|
||||
-#endif
|
||||
-
|
||||
-#ifdef CONFIG_BCM63XX_CPU_6362
|
||||
-static const u32 bcm63xx_reset_bits[] = {
|
||||
- __GEN_RESET_BITS_TABLE(6362)
|
||||
-};
|
||||
-#define reset_reg PERF_SOFTRESET_6362_REG
|
||||
-#endif
|
||||
-
|
||||
-#ifdef CONFIG_BCM63XX_CPU_6368
|
||||
-static const u32 bcm63xx_reset_bits[] = {
|
||||
- __GEN_RESET_BITS_TABLE(6368)
|
||||
-};
|
||||
-#define reset_reg PERF_SOFTRESET_6368_REG
|
||||
-#endif
|
||||
-
|
||||
-static int __init bcm63xx_reset_bits_init(void) { return 0; }
|
||||
-#endif
|
||||
|
||||
static DEFINE_SPINLOCK(reset_mutex);
|
||||
|
|
@ -1,39 +0,0 @@
|
|||
From 1aab93c5c97c55fef130726a6f58c9a1fd5b6240 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Tue, 3 Dec 2013 13:36:45 +0100
|
||||
Subject: [PATCH 4/8] MIPS: BCM63XX: remove !RUNTIME_DETECT code from gpio
|
||||
|
||||
---
|
||||
arch/mips/bcm63xx/gpio.c | 14 --------------
|
||||
1 file changed, 14 deletions(-)
|
||||
|
||||
--- a/arch/mips/bcm63xx/gpio.c
|
||||
+++ b/arch/mips/bcm63xx/gpio.c
|
||||
@@ -18,19 +18,6 @@
|
||||
#include <bcm63xx_io.h>
|
||||
#include <bcm63xx_regs.h>
|
||||
|
||||
-#ifndef BCMCPU_RUNTIME_DETECT
|
||||
-#define gpio_out_low_reg GPIO_DATA_LO_REG
|
||||
-#ifdef CONFIG_BCM63XX_CPU_6345
|
||||
-#ifdef gpio_out_low_reg
|
||||
-#undef gpio_out_low_reg
|
||||
-#define gpio_out_low_reg GPIO_DATA_LO_REG_6345
|
||||
-#endif /* gpio_out_low_reg */
|
||||
-#endif /* CONFIG_BCM63XX_CPU_6345 */
|
||||
-
|
||||
-static inline void bcm63xx_gpio_out_low_reg_init(void)
|
||||
-{
|
||||
-}
|
||||
-#else /* ! BCMCPU_RUNTIME_DETECT */
|
||||
static u32 gpio_out_low_reg;
|
||||
|
||||
static void bcm63xx_gpio_out_low_reg_init(void)
|
||||
@@ -44,7 +31,6 @@ static void bcm63xx_gpio_out_low_reg_ini
|
||||
break;
|
||||
}
|
||||
}
|
||||
-#endif /* ! BCMCPU_RUNTIME_DETECT */
|
||||
|
||||
static DEFINE_SPINLOCK(bcm63xx_gpio_lock);
|
||||
static u32 gpio_out_low, gpio_out_high;
|
|
@ -1,80 +0,0 @@
|
|||
From 94f819bc230bb61a9ff21da6c860a40ca68c2805 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Tue, 3 Dec 2013 13:43:35 +0100
|
||||
Subject: [PATCH 5/8] MIPS: BCM63XX: remove !RUNTIME_DETECT from spi code
|
||||
|
||||
---
|
||||
arch/mips/bcm63xx/dev-spi.c | 4 ---
|
||||
.../include/asm/mach-bcm63xx/bcm63xx_dev_spi.h | 31 ----------------------
|
||||
2 files changed, 35 deletions(-)
|
||||
|
||||
--- a/arch/mips/bcm63xx/dev-spi.c
|
||||
+++ b/arch/mips/bcm63xx/dev-spi.c
|
||||
@@ -18,7 +18,6 @@
|
||||
#include <bcm63xx_dev_spi.h>
|
||||
#include <bcm63xx_regs.h>
|
||||
|
||||
-#ifdef BCMCPU_RUNTIME_DETECT
|
||||
/*
|
||||
* register offsets
|
||||
*/
|
||||
@@ -41,9 +40,6 @@ static __init void bcm63xx_spi_regs_init
|
||||
BCMCPU_IS_6362() || BCMCPU_IS_6368())
|
||||
bcm63xx_regs_spi = bcm6358_regs_spi;
|
||||
}
|
||||
-#else
|
||||
-static __init void bcm63xx_spi_regs_init(void) { }
|
||||
-#endif
|
||||
|
||||
static struct resource spi_resources[] = {
|
||||
{
|
||||
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h
|
||||
@@ -30,26 +30,6 @@ enum bcm63xx_regs_spi {
|
||||
SPI_RX_DATA,
|
||||
};
|
||||
|
||||
-#define __GEN_SPI_RSET_BASE(__cpu, __rset) \
|
||||
- case SPI_## __rset: \
|
||||
- return SPI_## __cpu ##_## __rset;
|
||||
-
|
||||
-#define __GEN_SPI_RSET(__cpu) \
|
||||
- switch (reg) { \
|
||||
- __GEN_SPI_RSET_BASE(__cpu, CMD) \
|
||||
- __GEN_SPI_RSET_BASE(__cpu, INT_STATUS) \
|
||||
- __GEN_SPI_RSET_BASE(__cpu, INT_MASK_ST) \
|
||||
- __GEN_SPI_RSET_BASE(__cpu, INT_MASK) \
|
||||
- __GEN_SPI_RSET_BASE(__cpu, ST) \
|
||||
- __GEN_SPI_RSET_BASE(__cpu, CLK_CFG) \
|
||||
- __GEN_SPI_RSET_BASE(__cpu, FILL_BYTE) \
|
||||
- __GEN_SPI_RSET_BASE(__cpu, MSG_TAIL) \
|
||||
- __GEN_SPI_RSET_BASE(__cpu, RX_TAIL) \
|
||||
- __GEN_SPI_RSET_BASE(__cpu, MSG_CTL) \
|
||||
- __GEN_SPI_RSET_BASE(__cpu, MSG_DATA) \
|
||||
- __GEN_SPI_RSET_BASE(__cpu, RX_DATA) \
|
||||
- }
|
||||
-
|
||||
#define __GEN_SPI_REGS_TABLE(__cpu) \
|
||||
[SPI_CMD] = SPI_## __cpu ##_CMD, \
|
||||
[SPI_INT_STATUS] = SPI_## __cpu ##_INT_STATUS, \
|
||||
@@ -66,20 +46,9 @@ enum bcm63xx_regs_spi {
|
||||
|
||||
static inline unsigned long bcm63xx_spireg(enum bcm63xx_regs_spi reg)
|
||||
{
|
||||
-#ifdef BCMCPU_RUNTIME_DETECT
|
||||
extern const unsigned long *bcm63xx_regs_spi;
|
||||
|
||||
return bcm63xx_regs_spi[reg];
|
||||
-#else
|
||||
-#if defined(CONFIG_BCM63XX_CPU_6338) || defined(CONFIG_BCM63XX_CPU_6348)
|
||||
- __GEN_SPI_RSET(6348)
|
||||
-#endif
|
||||
-#if defined(CONFIG_BCM63XX_CPU_6358) || defined(CONFIG_BCM63XX_CPU_6362) || \
|
||||
- defined(CONFIG_BCM63XX_CPU_6368)
|
||||
- __GEN_SPI_RSET(6358)
|
||||
-#endif
|
||||
-#endif
|
||||
- return 0;
|
||||
}
|
||||
|
||||
#endif /* BCM63XX_DEV_SPI_H */
|
|
@ -1,89 +0,0 @@
|
|||
From ed6c71de07ad042691ec02e9eb97375ddc91ed01 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Tue, 3 Dec 2013 13:45:22 +0100
|
||||
Subject: [PATCH 6/8] MIPS: BCM63XX: remove !RUNTIME_DETECT usage from enet
|
||||
code
|
||||
|
||||
---
|
||||
arch/mips/bcm63xx/dev-enet.c | 4 --
|
||||
.../include/asm/mach-bcm63xx/bcm63xx_dev_enet.h | 46 ----------------------
|
||||
2 files changed, 50 deletions(-)
|
||||
|
||||
--- a/arch/mips/bcm63xx/dev-enet.c
|
||||
+++ b/arch/mips/bcm63xx/dev-enet.c
|
||||
@@ -14,7 +14,6 @@
|
||||
#include <bcm63xx_io.h>
|
||||
#include <bcm63xx_regs.h>
|
||||
|
||||
-#ifdef BCMCPU_RUNTIME_DETECT
|
||||
static const unsigned long bcm6348_regs_enetdmac[] = {
|
||||
[ENETDMAC_CHANCFG] = ENETDMAC_CHANCFG_REG,
|
||||
[ENETDMAC_IR] = ENETDMAC_IR_REG,
|
||||
@@ -43,9 +42,6 @@ static __init void bcm63xx_enetdmac_regs
|
||||
else
|
||||
bcm63xx_regs_enetdmac = bcm6348_regs_enetdmac;
|
||||
}
|
||||
-#else
|
||||
-static __init void bcm63xx_enetdmac_regs_init(void) { }
|
||||
-#endif
|
||||
|
||||
static struct resource shared_res[] = {
|
||||
{
|
||||
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
|
||||
@@ -112,55 +112,9 @@ enum bcm63xx_regs_enetdmac {
|
||||
|
||||
static inline unsigned long bcm63xx_enetdmacreg(enum bcm63xx_regs_enetdmac reg)
|
||||
{
|
||||
-#ifdef BCMCPU_RUNTIME_DETECT
|
||||
extern const unsigned long *bcm63xx_regs_enetdmac;
|
||||
|
||||
return bcm63xx_regs_enetdmac[reg];
|
||||
-#else
|
||||
-#ifdef CONFIG_BCM63XX_CPU_6345
|
||||
- switch (reg) {
|
||||
- case ENETDMAC_CHANCFG:
|
||||
- return ENETDMA_6345_CHANCFG_REG;
|
||||
- case ENETDMAC_IR:
|
||||
- return ENETDMA_6345_IR_REG;
|
||||
- case ENETDMAC_IRMASK:
|
||||
- return ENETDMA_6345_IRMASK_REG;
|
||||
- case ENETDMAC_MAXBURST:
|
||||
- return ENETDMA_6345_MAXBURST_REG;
|
||||
- case ENETDMAC_BUFALLOC:
|
||||
- return ENETDMA_6345_BUFALLOC_REG;
|
||||
- case ENETDMAC_RSTART:
|
||||
- return ENETDMA_6345_RSTART_REG;
|
||||
- case ENETDMAC_FC:
|
||||
- return ENETDMA_6345_FC_REG;
|
||||
- case ENETDMAC_LEN:
|
||||
- return ENETDMA_6345_LEN_REG;
|
||||
- }
|
||||
-#endif
|
||||
-#if defined(CONFIG_BCM63XX_CPU_6328) || \
|
||||
- defined(CONFIG_BCM63XX_CPU_6338) || \
|
||||
- defined(CONFIG_BCM63XX_CPU_6348) || \
|
||||
- defined(CONFIG_BCM63XX_CPU_6358) || \
|
||||
- defined(CONFIG_BCM63XX_CPU_6362) || \
|
||||
- defined(CONFIG_BCM63XX_CPU_6368)
|
||||
- switch (reg) {
|
||||
- case ENETDMAC_CHANCFG:
|
||||
- return ENETDMAC_CHANCFG_REG;
|
||||
- case ENETDMAC_IR:
|
||||
- return ENETDMAC_IR_REG;
|
||||
- case ENETDMAC_IRMASK:
|
||||
- return ENETDMAC_IRMASK_REG;
|
||||
- case ENETDMAC_MAXBURST:
|
||||
- return ENETDMAC_MAXBURST_REG;
|
||||
- case ENETDMAC_BUFALLOC:
|
||||
- case ENETDMAC_RSTART:
|
||||
- case ENETDMAC_FC:
|
||||
- case ENETDMAC_LEN:
|
||||
- return 0;
|
||||
- }
|
||||
-#endif
|
||||
-#endif
|
||||
- return 0;
|
||||
}
|
||||
|
||||
|
|
@ -1,23 +0,0 @@
|
|||
From 12c6957004d6770f4b34d59d8a3cafd5d8bfce15 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Tue, 3 Dec 2013 14:06:12 +0100
|
||||
Subject: [PATCH 7/8] MIPS: BCM63XX: remove !RUNTIME_DETECT in
|
||||
cpu-feature-overrides
|
||||
|
||||
All three SoCs have in common they have a BMIPS32/BMIPS3300 CPU, so
|
||||
we can replace this as no SoC with BMIPS4350 support enabled.
|
||||
---
|
||||
arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
--- a/arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h
|
||||
@@ -24,7 +24,7 @@
|
||||
#define cpu_has_smartmips 0
|
||||
#define cpu_has_vtag_icache 0
|
||||
|
||||
-#if !defined(BCMCPU_RUNTIME_DETECT) && (defined(CONFIG_BCM63XX_CPU_6348) || defined(CONFIG_BCM63XX_CPU_6345) || defined(CONFIG_BCM63XX_CPU_6338))
|
||||
+#if !defined(CONFIG_SYS_HAS_CPU_BMIPS4350)
|
||||
#define cpu_has_dc_aliases 0
|
||||
#endif
|
||||
|
|
@ -1,199 +0,0 @@
|
|||
From 78c3d2e796a28ad55f6c2310a11ab22e91bb52fc Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Mon, 2 Dec 2013 12:30:44 +0100
|
||||
Subject: [PATCH 8/8] MIPS: BCM63XX: remove !RUNTIME_DETECT code for
|
||||
bcmcpu_get_id
|
||||
|
||||
Use the same pattern as with get_*_cpu_type() to allow the compiler
|
||||
to remove code for non enabled devices.
|
||||
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/cpu.c | 11 +--
|
||||
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 120 +++++++----------------
|
||||
2 files changed, 38 insertions(+), 93 deletions(-)
|
||||
|
||||
--- a/arch/mips/bcm63xx/cpu.c
|
||||
+++ b/arch/mips/bcm63xx/cpu.c
|
||||
@@ -24,7 +24,9 @@ EXPORT_SYMBOL(bcm63xx_regs_base);
|
||||
const int *bcm63xx_irqs;
|
||||
EXPORT_SYMBOL(bcm63xx_irqs);
|
||||
|
||||
-static u16 bcm63xx_cpu_id;
|
||||
+u16 bcm63xx_cpu_id __read_mostly;
|
||||
+EXPORT_SYMBOL(bcm63xx_cpu_id);
|
||||
+
|
||||
static u8 bcm63xx_cpu_rev;
|
||||
static unsigned int bcm63xx_cpu_freq;
|
||||
static unsigned int bcm63xx_memory_size;
|
||||
@@ -97,13 +99,6 @@ static const int bcm6368_irqs[] = {
|
||||
|
||||
};
|
||||
|
||||
-u16 __bcm63xx_get_cpu_id(void)
|
||||
-{
|
||||
- return bcm63xx_cpu_id;
|
||||
-}
|
||||
-
|
||||
-EXPORT_SYMBOL(__bcm63xx_get_cpu_id);
|
||||
-
|
||||
u8 bcm63xx_get_cpu_rev(void)
|
||||
{
|
||||
return bcm63xx_cpu_rev;
|
||||
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
|
||||
@@ -19,118 +19,68 @@
|
||||
#define BCM6368_CPU_ID 0x6368
|
||||
|
||||
void __init bcm63xx_cpu_init(void);
|
||||
-u16 __bcm63xx_get_cpu_id(void);
|
||||
u8 bcm63xx_get_cpu_rev(void);
|
||||
unsigned int bcm63xx_get_cpu_freq(void);
|
||||
|
||||
+static inline u16 __pure __bcm63xx_get_cpu_id(const u16 cpu_id)
|
||||
+{
|
||||
+ switch (cpu_id) {
|
||||
#ifdef CONFIG_BCM63XX_CPU_3368
|
||||
-# ifdef bcm63xx_get_cpu_id
|
||||
-# undef bcm63xx_get_cpu_id
|
||||
-# define bcm63xx_get_cpu_id() __bcm63xx_get_cpu_id()
|
||||
-# define BCMCPU_RUNTIME_DETECT
|
||||
-# else
|
||||
-# define bcm63xx_get_cpu_id() BCM3368_CPU_ID
|
||||
-# endif
|
||||
-# define BCMCPU_IS_3368() (bcm63xx_get_cpu_id() == BCM3368_CPU_ID)
|
||||
-#else
|
||||
-# define BCMCPU_IS_3368() (0)
|
||||
+ case BCM3368_CPU_ID:
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BCM63XX_CPU_6328
|
||||
-# ifdef bcm63xx_get_cpu_id
|
||||
-# undef bcm63xx_get_cpu_id
|
||||
-# define bcm63xx_get_cpu_id() __bcm63xx_get_cpu_id()
|
||||
-# define BCMCPU_RUNTIME_DETECT
|
||||
-# else
|
||||
-# define bcm63xx_get_cpu_id() BCM6328_CPU_ID
|
||||
-# endif
|
||||
-# define BCMCPU_IS_6328() (bcm63xx_get_cpu_id() == BCM6328_CPU_ID)
|
||||
-#else
|
||||
-# define BCMCPU_IS_6328() (0)
|
||||
+ case BCM6328_CPU_ID:
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BCM63XX_CPU_6338
|
||||
-# ifdef bcm63xx_get_cpu_id
|
||||
-# undef bcm63xx_get_cpu_id
|
||||
-# define bcm63xx_get_cpu_id() __bcm63xx_get_cpu_id()
|
||||
-# define BCMCPU_RUNTIME_DETECT
|
||||
-# else
|
||||
-# define bcm63xx_get_cpu_id() BCM6338_CPU_ID
|
||||
-# endif
|
||||
-# define BCMCPU_IS_6338() (bcm63xx_get_cpu_id() == BCM6338_CPU_ID)
|
||||
-#else
|
||||
-# define BCMCPU_IS_6338() (0)
|
||||
+ case BCM6338_CPU_ID:
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BCM63XX_CPU_6345
|
||||
-# ifdef bcm63xx_get_cpu_id
|
||||
-# undef bcm63xx_get_cpu_id
|
||||
-# define bcm63xx_get_cpu_id() __bcm63xx_get_cpu_id()
|
||||
-# define BCMCPU_RUNTIME_DETECT
|
||||
-# else
|
||||
-# define bcm63xx_get_cpu_id() BCM6345_CPU_ID
|
||||
-# endif
|
||||
-# define BCMCPU_IS_6345() (bcm63xx_get_cpu_id() == BCM6345_CPU_ID)
|
||||
-#else
|
||||
-# define BCMCPU_IS_6345() (0)
|
||||
+ case BCM6345_CPU_ID:
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BCM63XX_CPU_6348
|
||||
-# ifdef bcm63xx_get_cpu_id
|
||||
-# undef bcm63xx_get_cpu_id
|
||||
-# define bcm63xx_get_cpu_id() __bcm63xx_get_cpu_id()
|
||||
-# define BCMCPU_RUNTIME_DETECT
|
||||
-# else
|
||||
-# define bcm63xx_get_cpu_id() BCM6348_CPU_ID
|
||||
-# endif
|
||||
-# define BCMCPU_IS_6348() (bcm63xx_get_cpu_id() == BCM6348_CPU_ID)
|
||||
-#else
|
||||
-# define BCMCPU_IS_6348() (0)
|
||||
+ case BCM6348_CPU_ID:
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BCM63XX_CPU_6358
|
||||
-# ifdef bcm63xx_get_cpu_id
|
||||
-# undef bcm63xx_get_cpu_id
|
||||
-# define bcm63xx_get_cpu_id() __bcm63xx_get_cpu_id()
|
||||
-# define BCMCPU_RUNTIME_DETECT
|
||||
-# else
|
||||
-# define bcm63xx_get_cpu_id() BCM6358_CPU_ID
|
||||
-# endif
|
||||
-# define BCMCPU_IS_6358() (bcm63xx_get_cpu_id() == BCM6358_CPU_ID)
|
||||
-#else
|
||||
-# define BCMCPU_IS_6358() (0)
|
||||
+ case BCM6358_CPU_ID:
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BCM63XX_CPU_6362
|
||||
-# ifdef bcm63xx_get_cpu_id
|
||||
-# undef bcm63xx_get_cpu_id
|
||||
-# define bcm63xx_get_cpu_id() __bcm63xx_get_cpu_id()
|
||||
-# define BCMCPU_RUNTIME_DETECT
|
||||
-# else
|
||||
-# define bcm63xx_get_cpu_id() BCM6362_CPU_ID
|
||||
-# endif
|
||||
-# define BCMCPU_IS_6362() (bcm63xx_get_cpu_id() == BCM6362_CPU_ID)
|
||||
-#else
|
||||
-# define BCMCPU_IS_6362() (0)
|
||||
+ case BCM6362_CPU_ID:
|
||||
#endif
|
||||
|
||||
-
|
||||
#ifdef CONFIG_BCM63XX_CPU_6368
|
||||
-# ifdef bcm63xx_get_cpu_id
|
||||
-# undef bcm63xx_get_cpu_id
|
||||
-# define bcm63xx_get_cpu_id() __bcm63xx_get_cpu_id()
|
||||
-# define BCMCPU_RUNTIME_DETECT
|
||||
-# else
|
||||
-# define bcm63xx_get_cpu_id() BCM6368_CPU_ID
|
||||
-# endif
|
||||
-# define BCMCPU_IS_6368() (bcm63xx_get_cpu_id() == BCM6368_CPU_ID)
|
||||
-#else
|
||||
-# define BCMCPU_IS_6368() (0)
|
||||
-#endif
|
||||
-
|
||||
-#ifndef bcm63xx_get_cpu_id
|
||||
-#error "No CPU support configured"
|
||||
+ case BCM6368_CPU_ID:
|
||||
#endif
|
||||
+ break;
|
||||
+ default:
|
||||
+ unreachable();
|
||||
+ }
|
||||
+
|
||||
+ return cpu_id;
|
||||
+}
|
||||
+
|
||||
+extern u16 bcm63xx_cpu_id;
|
||||
+
|
||||
+static inline u16 __pure bcm63xx_get_cpu_id(void)
|
||||
+{
|
||||
+ const u16 cpu_id = bcm63xx_cpu_id;
|
||||
+
|
||||
+ return __bcm63xx_get_cpu_id(cpu_id);
|
||||
+}
|
||||
+
|
||||
+#define BCMCPU_IS_3368() (bcm63xx_get_cpu_id() == BCM3368_CPU_ID)
|
||||
+#define BCMCPU_IS_6328() (bcm63xx_get_cpu_id() == BCM6328_CPU_ID)
|
||||
+#define BCMCPU_IS_6338() (bcm63xx_get_cpu_id() == BCM6338_CPU_ID)
|
||||
+#define BCMCPU_IS_6345() (bcm63xx_get_cpu_id() == BCM6345_CPU_ID)
|
||||
+#define BCMCPU_IS_6348() (bcm63xx_get_cpu_id() == BCM6348_CPU_ID)
|
||||
+#define BCMCPU_IS_6358() (bcm63xx_get_cpu_id() == BCM6358_CPU_ID)
|
||||
+#define BCMCPU_IS_6362() (bcm63xx_get_cpu_id() == BCM6362_CPU_ID)
|
||||
+#define BCMCPU_IS_6368() (bcm63xx_get_cpu_id() == BCM6368_CPU_ID)
|
||||
|
||||
/*
|
||||
* While registers sets are (mostly) the same across 63xx CPU, base
|
|
@ -1,41 +0,0 @@
|
|||
From a2015bfad293a7eb79519beb60381cb996c6e298 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Thu, 21 Mar 2013 17:05:15 +0100
|
||||
Subject: [PATCH 01/10] MIPS: BCM63XX: add width to __dispatch_internal
|
||||
|
||||
Make it follow the same naming convention as the other functions.
|
||||
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/irq.c | 6 +++---
|
||||
1 file changed, 3 insertions(+), 3 deletions(-)
|
||||
|
||||
--- a/arch/mips/bcm63xx/irq.c
|
||||
+++ b/arch/mips/bcm63xx/irq.c
|
||||
@@ -19,7 +19,7 @@
|
||||
#include <bcm63xx_io.h>
|
||||
#include <bcm63xx_irq.h>
|
||||
|
||||
-static void __dispatch_internal(void) __maybe_unused;
|
||||
+static void __dispatch_internal_32(void) __maybe_unused;
|
||||
static void __dispatch_internal_64(void) __maybe_unused;
|
||||
static void __internal_irq_mask_32(unsigned int irq) __maybe_unused;
|
||||
static void __internal_irq_mask_64(unsigned int irq) __maybe_unused;
|
||||
@@ -117,7 +117,7 @@ static void bcm63xx_init_irq(void)
|
||||
}
|
||||
|
||||
if (irq_bits == 32) {
|
||||
- dispatch_internal = __dispatch_internal;
|
||||
+ dispatch_internal = __dispatch_internal_32;
|
||||
internal_irq_mask = __internal_irq_mask_32;
|
||||
internal_irq_unmask = __internal_irq_unmask_32;
|
||||
} else {
|
||||
@@ -149,7 +149,7 @@ static inline void handle_internal(int i
|
||||
* will resume the loop where it ended the last time we left this
|
||||
* function.
|
||||
*/
|
||||
-static void __dispatch_internal(void)
|
||||
+static void __dispatch_internal_32(void)
|
||||
{
|
||||
u32 pending;
|
||||
static int i;
|
|
@ -1,225 +0,0 @@
|
|||
From 6e79c6dd02aa56e37eb071797f0eb5e3fb588cba Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Sun, 15 Dec 2013 20:52:53 +0100
|
||||
Subject: [PATCH 02/10] MIPS: BCM63XX: move bcm63xx_init_irq down
|
||||
|
||||
Allows up to drop the prototypes from the top.
|
||||
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/irq.c | 190 +++++++++++++++++++++++-------------------------
|
||||
1 file changed, 92 insertions(+), 98 deletions(-)
|
||||
|
||||
--- a/arch/mips/bcm63xx/irq.c
|
||||
+++ b/arch/mips/bcm63xx/irq.c
|
||||
@@ -19,13 +19,6 @@
|
||||
#include <bcm63xx_io.h>
|
||||
#include <bcm63xx_irq.h>
|
||||
|
||||
-static void __dispatch_internal_32(void) __maybe_unused;
|
||||
-static void __dispatch_internal_64(void) __maybe_unused;
|
||||
-static void __internal_irq_mask_32(unsigned int irq) __maybe_unused;
|
||||
-static void __internal_irq_mask_64(unsigned int irq) __maybe_unused;
|
||||
-static void __internal_irq_unmask_32(unsigned int irq) __maybe_unused;
|
||||
-static void __internal_irq_unmask_64(unsigned int irq) __maybe_unused;
|
||||
-
|
||||
static u32 irq_stat_addr, irq_mask_addr;
|
||||
static void (*dispatch_internal)(void);
|
||||
static int is_ext_irq_cascaded;
|
||||
@@ -35,97 +28,6 @@ static unsigned int ext_irq_cfg_reg1, ex
|
||||
static void (*internal_irq_mask)(unsigned int irq);
|
||||
static void (*internal_irq_unmask)(unsigned int irq);
|
||||
|
||||
-static void bcm63xx_init_irq(void)
|
||||
-{
|
||||
- int irq_bits;
|
||||
-
|
||||
- irq_stat_addr = bcm63xx_regset_address(RSET_PERF);
|
||||
- irq_mask_addr = bcm63xx_regset_address(RSET_PERF);
|
||||
-
|
||||
- switch (bcm63xx_get_cpu_id()) {
|
||||
- case BCM3368_CPU_ID:
|
||||
- irq_stat_addr += PERF_IRQSTAT_3368_REG;
|
||||
- irq_mask_addr += PERF_IRQMASK_3368_REG;
|
||||
- irq_bits = 32;
|
||||
- ext_irq_count = 4;
|
||||
- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
|
||||
- break;
|
||||
- case BCM6328_CPU_ID:
|
||||
- irq_stat_addr += PERF_IRQSTAT_6328_REG;
|
||||
- irq_mask_addr += PERF_IRQMASK_6328_REG;
|
||||
- irq_bits = 64;
|
||||
- ext_irq_count = 4;
|
||||
- is_ext_irq_cascaded = 1;
|
||||
- ext_irq_start = BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE;
|
||||
- ext_irq_end = BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE;
|
||||
- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6328;
|
||||
- break;
|
||||
- case BCM6338_CPU_ID:
|
||||
- irq_stat_addr += PERF_IRQSTAT_6338_REG;
|
||||
- irq_mask_addr += PERF_IRQMASK_6338_REG;
|
||||
- irq_bits = 32;
|
||||
- ext_irq_count = 4;
|
||||
- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
|
||||
- break;
|
||||
- case BCM6345_CPU_ID:
|
||||
- irq_stat_addr += PERF_IRQSTAT_6345_REG;
|
||||
- irq_mask_addr += PERF_IRQMASK_6345_REG;
|
||||
- irq_bits = 32;
|
||||
- ext_irq_count = 4;
|
||||
- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
|
||||
- break;
|
||||
- case BCM6348_CPU_ID:
|
||||
- irq_stat_addr += PERF_IRQSTAT_6348_REG;
|
||||
- irq_mask_addr += PERF_IRQMASK_6348_REG;
|
||||
- irq_bits = 32;
|
||||
- ext_irq_count = 4;
|
||||
- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348;
|
||||
- break;
|
||||
- case BCM6358_CPU_ID:
|
||||
- irq_stat_addr += PERF_IRQSTAT_6358_REG;
|
||||
- irq_mask_addr += PERF_IRQMASK_6358_REG;
|
||||
- irq_bits = 32;
|
||||
- ext_irq_count = 4;
|
||||
- is_ext_irq_cascaded = 1;
|
||||
- ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE;
|
||||
- ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE;
|
||||
- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358;
|
||||
- break;
|
||||
- case BCM6362_CPU_ID:
|
||||
- irq_stat_addr += PERF_IRQSTAT_6362_REG;
|
||||
- irq_mask_addr += PERF_IRQMASK_6362_REG;
|
||||
- irq_bits = 64;
|
||||
- ext_irq_count = 4;
|
||||
- is_ext_irq_cascaded = 1;
|
||||
- ext_irq_start = BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE;
|
||||
- ext_irq_end = BCM_6362_EXT_IRQ3 - IRQ_INTERNAL_BASE;
|
||||
- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6362;
|
||||
- break;
|
||||
- case BCM6368_CPU_ID:
|
||||
- irq_stat_addr += PERF_IRQSTAT_6368_REG;
|
||||
- irq_mask_addr += PERF_IRQMASK_6368_REG;
|
||||
- irq_bits = 64;
|
||||
- ext_irq_count = 6;
|
||||
- is_ext_irq_cascaded = 1;
|
||||
- ext_irq_start = BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE;
|
||||
- ext_irq_end = BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE;
|
||||
- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6368;
|
||||
- ext_irq_cfg_reg2 = PERF_EXTIRQ_CFG_REG2_6368;
|
||||
- break;
|
||||
- default:
|
||||
- BUG();
|
||||
- }
|
||||
-
|
||||
- if (irq_bits == 32) {
|
||||
- dispatch_internal = __dispatch_internal_32;
|
||||
- internal_irq_mask = __internal_irq_mask_32;
|
||||
- internal_irq_unmask = __internal_irq_unmask_32;
|
||||
- } else {
|
||||
- dispatch_internal = __dispatch_internal_64;
|
||||
- internal_irq_mask = __internal_irq_mask_64;
|
||||
- internal_irq_unmask = __internal_irq_unmask_64;
|
||||
- }
|
||||
-}
|
||||
|
||||
static inline u32 get_ext_irq_perf_reg(int irq)
|
||||
{
|
||||
@@ -451,6 +353,98 @@ static struct irqaction cpu_ext_cascade_
|
||||
.flags = IRQF_NO_THREAD,
|
||||
};
|
||||
|
||||
+static void bcm63xx_init_irq(void)
|
||||
+{
|
||||
+ int irq_bits;
|
||||
+
|
||||
+ irq_stat_addr = bcm63xx_regset_address(RSET_PERF);
|
||||
+ irq_mask_addr = bcm63xx_regset_address(RSET_PERF);
|
||||
+
|
||||
+ switch (bcm63xx_get_cpu_id()) {
|
||||
+ case BCM3368_CPU_ID:
|
||||
+ irq_stat_addr += PERF_IRQSTAT_3368_REG;
|
||||
+ irq_mask_addr += PERF_IRQMASK_3368_REG;
|
||||
+ irq_bits = 32;
|
||||
+ ext_irq_count = 4;
|
||||
+ ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
|
||||
+ break;
|
||||
+ case BCM6328_CPU_ID:
|
||||
+ irq_stat_addr += PERF_IRQSTAT_6328_REG;
|
||||
+ irq_mask_addr += PERF_IRQMASK_6328_REG;
|
||||
+ irq_bits = 64;
|
||||
+ ext_irq_count = 4;
|
||||
+ is_ext_irq_cascaded = 1;
|
||||
+ ext_irq_start = BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE;
|
||||
+ ext_irq_end = BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE;
|
||||
+ ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6328;
|
||||
+ break;
|
||||
+ case BCM6338_CPU_ID:
|
||||
+ irq_stat_addr += PERF_IRQSTAT_6338_REG;
|
||||
+ irq_mask_addr += PERF_IRQMASK_6338_REG;
|
||||
+ irq_bits = 32;
|
||||
+ ext_irq_count = 4;
|
||||
+ ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
|
||||
+ break;
|
||||
+ case BCM6345_CPU_ID:
|
||||
+ irq_stat_addr += PERF_IRQSTAT_6345_REG;
|
||||
+ irq_mask_addr += PERF_IRQMASK_6345_REG;
|
||||
+ irq_bits = 32;
|
||||
+ ext_irq_count = 4;
|
||||
+ ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
|
||||
+ break;
|
||||
+ case BCM6348_CPU_ID:
|
||||
+ irq_stat_addr += PERF_IRQSTAT_6348_REG;
|
||||
+ irq_mask_addr += PERF_IRQMASK_6348_REG;
|
||||
+ irq_bits = 32;
|
||||
+ ext_irq_count = 4;
|
||||
+ ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348;
|
||||
+ break;
|
||||
+ case BCM6358_CPU_ID:
|
||||
+ irq_stat_addr += PERF_IRQSTAT_6358_REG;
|
||||
+ irq_mask_addr += PERF_IRQMASK_6358_REG;
|
||||
+ irq_bits = 32;
|
||||
+ ext_irq_count = 4;
|
||||
+ is_ext_irq_cascaded = 1;
|
||||
+ ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE;
|
||||
+ ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE;
|
||||
+ ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358;
|
||||
+ break;
|
||||
+ case BCM6362_CPU_ID:
|
||||
+ irq_stat_addr += PERF_IRQSTAT_6362_REG;
|
||||
+ irq_mask_addr += PERF_IRQMASK_6362_REG;
|
||||
+ irq_bits = 64;
|
||||
+ ext_irq_count = 4;
|
||||
+ is_ext_irq_cascaded = 1;
|
||||
+ ext_irq_start = BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE;
|
||||
+ ext_irq_end = BCM_6362_EXT_IRQ3 - IRQ_INTERNAL_BASE;
|
||||
+ ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6362;
|
||||
+ break;
|
||||
+ case BCM6368_CPU_ID:
|
||||
+ irq_stat_addr += PERF_IRQSTAT_6368_REG;
|
||||
+ irq_mask_addr += PERF_IRQMASK_6368_REG;
|
||||
+ irq_bits = 64;
|
||||
+ ext_irq_count = 6;
|
||||
+ is_ext_irq_cascaded = 1;
|
||||
+ ext_irq_start = BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE;
|
||||
+ ext_irq_end = BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE;
|
||||
+ ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6368;
|
||||
+ ext_irq_cfg_reg2 = PERF_EXTIRQ_CFG_REG2_6368;
|
||||
+ break;
|
||||
+ default:
|
||||
+ BUG();
|
||||
+ }
|
||||
+
|
||||
+ if (irq_bits == 32) {
|
||||
+ dispatch_internal = __dispatch_internal_32;
|
||||
+ internal_irq_mask = __internal_irq_mask_32;
|
||||
+ internal_irq_unmask = __internal_irq_unmask_32;
|
||||
+ } else {
|
||||
+ dispatch_internal = __dispatch_internal_64;
|
||||
+ internal_irq_mask = __internal_irq_mask_64;
|
||||
+ internal_irq_unmask = __internal_irq_unmask_64;
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
void __init arch_init_irq(void)
|
||||
{
|
||||
int i;
|
|
@ -1,174 +0,0 @@
|
|||
From 39b46ed1c9fe71890566e129d9ac5feb8421b3b4 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Thu, 18 Apr 2013 21:14:49 +0200
|
||||
Subject: [PATCH 03/10] MIPS: BCM63XX: replace irq dispatch code with a generic
|
||||
version
|
||||
|
||||
The generic version uses a variable length of u32 registers instead of u32/u64.
|
||||
This allows easier support for "wider" registers without having to rewrite
|
||||
everything.
|
||||
|
||||
This "generic" version is as fast as the old version in the best case
|
||||
(i == next set bit), and twice as fast in the worst case in 64 bits.
|
||||
|
||||
Using a macro was chosen over a (forced) inline version because gcc generated
|
||||
more compact code with the macro.
|
||||
|
||||
The change from (signed) int to unsigned int for i and to_call was intentional
|
||||
as the value can be only between 0 and (width - 1) anyway, and allowed gcc to
|
||||
optimise the code a bit further.
|
||||
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/irq.c | 130 +++++++++++++++++++++---------------------------
|
||||
1 file changed, 56 insertions(+), 74 deletions(-)
|
||||
|
||||
--- a/arch/mips/bcm63xx/irq.c
|
||||
+++ b/arch/mips/bcm63xx/irq.c
|
||||
@@ -51,47 +51,65 @@ static inline void handle_internal(int i
|
||||
* will resume the loop where it ended the last time we left this
|
||||
* function.
|
||||
*/
|
||||
-static void __dispatch_internal_32(void)
|
||||
-{
|
||||
- u32 pending;
|
||||
- static int i;
|
||||
-
|
||||
- pending = bcm_readl(irq_stat_addr) & bcm_readl(irq_mask_addr);
|
||||
-
|
||||
- if (!pending)
|
||||
- return ;
|
||||
-
|
||||
- while (1) {
|
||||
- int to_call = i;
|
||||
|
||||
- i = (i + 1) & 0x1f;
|
||||
- if (pending & (1 << to_call)) {
|
||||
- handle_internal(to_call);
|
||||
- break;
|
||||
- }
|
||||
- }
|
||||
+#define BUILD_IPIC_INTERNAL(width) \
|
||||
+void __dispatch_internal_##width(void) \
|
||||
+{ \
|
||||
+ u32 pending[width / 32]; \
|
||||
+ unsigned int src, tgt; \
|
||||
+ bool irqs_pending = false; \
|
||||
+ static unsigned int i; \
|
||||
+ \
|
||||
+ /* read registers in reverse order */ \
|
||||
+ for (src = 0, tgt = (width / 32); src < (width / 32); src++) { \
|
||||
+ u32 val; \
|
||||
+ \
|
||||
+ val = bcm_readl(irq_stat_addr + src * sizeof(u32)); \
|
||||
+ val &= bcm_readl(irq_mask_addr + src * sizeof(u32)); \
|
||||
+ pending[--tgt] = val; \
|
||||
+ \
|
||||
+ if (val) \
|
||||
+ irqs_pending = true; \
|
||||
+ } \
|
||||
+ \
|
||||
+ if (!irqs_pending) \
|
||||
+ return; \
|
||||
+ \
|
||||
+ while (1) { \
|
||||
+ unsigned int to_call = i; \
|
||||
+ \
|
||||
+ i = (i + 1) & (width - 1); \
|
||||
+ if (pending[to_call / 32] & (1 << (to_call & 0x1f))) { \
|
||||
+ handle_internal(to_call); \
|
||||
+ break; \
|
||||
+ } \
|
||||
+ } \
|
||||
+} \
|
||||
+ \
|
||||
+static void __internal_irq_mask_##width(unsigned int irq) \
|
||||
+{ \
|
||||
+ u32 val; \
|
||||
+ unsigned reg = (irq / 32) ^ (width/32 - 1); \
|
||||
+ unsigned bit = irq & 0x1f; \
|
||||
+ \
|
||||
+ val = bcm_readl(irq_mask_addr + reg * sizeof(u32)); \
|
||||
+ val &= ~(1 << bit); \
|
||||
+ bcm_writel(val, irq_mask_addr + reg * sizeof(u32)); \
|
||||
+} \
|
||||
+ \
|
||||
+static void __internal_irq_unmask_##width(unsigned int irq) \
|
||||
+{ \
|
||||
+ u32 val; \
|
||||
+ unsigned reg = (irq / 32) ^ (width/32 - 1); \
|
||||
+ unsigned bit = irq & 0x1f; \
|
||||
+ \
|
||||
+ val = bcm_readl(irq_mask_addr + reg * sizeof(u32)); \
|
||||
+ val |= (1 << bit); \
|
||||
+ bcm_writel(val, irq_mask_addr + reg * sizeof(u32)); \
|
||||
}
|
||||
|
||||
-static void __dispatch_internal_64(void)
|
||||
-{
|
||||
- u64 pending;
|
||||
- static int i;
|
||||
-
|
||||
- pending = bcm_readq(irq_stat_addr) & bcm_readq(irq_mask_addr);
|
||||
-
|
||||
- if (!pending)
|
||||
- return ;
|
||||
-
|
||||
- while (1) {
|
||||
- int to_call = i;
|
||||
-
|
||||
- i = (i + 1) & 0x3f;
|
||||
- if (pending & (1ull << to_call)) {
|
||||
- handle_internal(to_call);
|
||||
- break;
|
||||
- }
|
||||
- }
|
||||
-}
|
||||
+BUILD_IPIC_INTERNAL(32);
|
||||
+BUILD_IPIC_INTERNAL(64);
|
||||
|
||||
asmlinkage void plat_irq_dispatch(void)
|
||||
{
|
||||
@@ -128,42 +146,6 @@ asmlinkage void plat_irq_dispatch(void)
|
||||
* internal IRQs operations: only mask/unmask on PERF irq mask
|
||||
* register.
|
||||
*/
|
||||
-static void __internal_irq_mask_32(unsigned int irq)
|
||||
-{
|
||||
- u32 mask;
|
||||
-
|
||||
- mask = bcm_readl(irq_mask_addr);
|
||||
- mask &= ~(1 << irq);
|
||||
- bcm_writel(mask, irq_mask_addr);
|
||||
-}
|
||||
-
|
||||
-static void __internal_irq_mask_64(unsigned int irq)
|
||||
-{
|
||||
- u64 mask;
|
||||
-
|
||||
- mask = bcm_readq(irq_mask_addr);
|
||||
- mask &= ~(1ull << irq);
|
||||
- bcm_writeq(mask, irq_mask_addr);
|
||||
-}
|
||||
-
|
||||
-static void __internal_irq_unmask_32(unsigned int irq)
|
||||
-{
|
||||
- u32 mask;
|
||||
-
|
||||
- mask = bcm_readl(irq_mask_addr);
|
||||
- mask |= (1 << irq);
|
||||
- bcm_writel(mask, irq_mask_addr);
|
||||
-}
|
||||
-
|
||||
-static void __internal_irq_unmask_64(unsigned int irq)
|
||||
-{
|
||||
- u64 mask;
|
||||
-
|
||||
- mask = bcm_readq(irq_mask_addr);
|
||||
- mask |= (1ull << irq);
|
||||
- bcm_writeq(mask, irq_mask_addr);
|
||||
-}
|
||||
-
|
||||
static void bcm63xx_internal_irq_mask(struct irq_data *d)
|
||||
{
|
||||
internal_irq_mask(d->irq - IRQ_INTERNAL_BASE);
|
|
@ -1,182 +0,0 @@
|
|||
From 96ce0a9d195b2781d6f8d919dea8056b1c409703 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Thu, 25 Apr 2013 00:24:06 +0200
|
||||
Subject: [PATCH 04/10] MIPS: BCM63XX: append irq line to irq_{stat,mask}*
|
||||
|
||||
The SMP capable irq controllers have two interrupt output pins which are
|
||||
controlled through separate registers, so make the variables arrays.
|
||||
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/irq.c | 51 ++++++++++++-----------
|
||||
arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 16 +++----
|
||||
2 files changed, 34 insertions(+), 33 deletions(-)
|
||||
|
||||
--- a/arch/mips/bcm63xx/irq.c
|
||||
+++ b/arch/mips/bcm63xx/irq.c
|
||||
@@ -19,7 +19,8 @@
|
||||
#include <bcm63xx_io.h>
|
||||
#include <bcm63xx_irq.h>
|
||||
|
||||
-static u32 irq_stat_addr, irq_mask_addr;
|
||||
+static u32 irq_stat_addr[2];
|
||||
+static u32 irq_mask_addr[2];
|
||||
static void (*dispatch_internal)(void);
|
||||
static int is_ext_irq_cascaded;
|
||||
static unsigned int ext_irq_count;
|
||||
@@ -64,8 +65,8 @@ void __dispatch_internal_##width(void)
|
||||
for (src = 0, tgt = (width / 32); src < (width / 32); src++) { \
|
||||
u32 val; \
|
||||
\
|
||||
- val = bcm_readl(irq_stat_addr + src * sizeof(u32)); \
|
||||
- val &= bcm_readl(irq_mask_addr + src * sizeof(u32)); \
|
||||
+ val = bcm_readl(irq_stat_addr[0] + src * sizeof(u32)); \
|
||||
+ val &= bcm_readl(irq_mask_addr[0] + src * sizeof(u32)); \
|
||||
pending[--tgt] = val; \
|
||||
\
|
||||
if (val) \
|
||||
@@ -92,9 +93,9 @@ static void __internal_irq_mask_##width(
|
||||
unsigned reg = (irq / 32) ^ (width/32 - 1); \
|
||||
unsigned bit = irq & 0x1f; \
|
||||
\
|
||||
- val = bcm_readl(irq_mask_addr + reg * sizeof(u32)); \
|
||||
+ val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32)); \
|
||||
val &= ~(1 << bit); \
|
||||
- bcm_writel(val, irq_mask_addr + reg * sizeof(u32)); \
|
||||
+ bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32)); \
|
||||
} \
|
||||
\
|
||||
static void __internal_irq_unmask_##width(unsigned int irq) \
|
||||
@@ -103,9 +104,9 @@ static void __internal_irq_unmask_##widt
|
||||
unsigned reg = (irq / 32) ^ (width/32 - 1); \
|
||||
unsigned bit = irq & 0x1f; \
|
||||
\
|
||||
- val = bcm_readl(irq_mask_addr + reg * sizeof(u32)); \
|
||||
+ val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32)); \
|
||||
val |= (1 << bit); \
|
||||
- bcm_writel(val, irq_mask_addr + reg * sizeof(u32)); \
|
||||
+ bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32)); \
|
||||
}
|
||||
|
||||
BUILD_IPIC_INTERNAL(32);
|
||||
@@ -339,20 +340,20 @@ static void bcm63xx_init_irq(void)
|
||||
{
|
||||
int irq_bits;
|
||||
|
||||
- irq_stat_addr = bcm63xx_regset_address(RSET_PERF);
|
||||
- irq_mask_addr = bcm63xx_regset_address(RSET_PERF);
|
||||
+ irq_stat_addr[0] = bcm63xx_regset_address(RSET_PERF);
|
||||
+ irq_mask_addr[0] = bcm63xx_regset_address(RSET_PERF);
|
||||
|
||||
switch (bcm63xx_get_cpu_id()) {
|
||||
case BCM3368_CPU_ID:
|
||||
- irq_stat_addr += PERF_IRQSTAT_3368_REG;
|
||||
- irq_mask_addr += PERF_IRQMASK_3368_REG;
|
||||
+ irq_stat_addr[0] += PERF_IRQSTAT_3368_REG;
|
||||
+ irq_mask_addr[0] += PERF_IRQMASK_3368_REG;
|
||||
irq_bits = 32;
|
||||
ext_irq_count = 4;
|
||||
ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
|
||||
break;
|
||||
case BCM6328_CPU_ID:
|
||||
- irq_stat_addr += PERF_IRQSTAT_6328_REG;
|
||||
- irq_mask_addr += PERF_IRQMASK_6328_REG;
|
||||
+ irq_stat_addr[0] += PERF_IRQSTAT_6328_REG(0);
|
||||
+ irq_mask_addr[0] += PERF_IRQMASK_6328_REG(0);
|
||||
irq_bits = 64;
|
||||
ext_irq_count = 4;
|
||||
is_ext_irq_cascaded = 1;
|
||||
@@ -361,29 +362,29 @@ static void bcm63xx_init_irq(void)
|
||||
ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6328;
|
||||
break;
|
||||
case BCM6338_CPU_ID:
|
||||
- irq_stat_addr += PERF_IRQSTAT_6338_REG;
|
||||
- irq_mask_addr += PERF_IRQMASK_6338_REG;
|
||||
+ irq_stat_addr[0] += PERF_IRQSTAT_6338_REG;
|
||||
+ irq_mask_addr[0] += PERF_IRQMASK_6338_REG;
|
||||
irq_bits = 32;
|
||||
ext_irq_count = 4;
|
||||
ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
|
||||
break;
|
||||
case BCM6345_CPU_ID:
|
||||
- irq_stat_addr += PERF_IRQSTAT_6345_REG;
|
||||
- irq_mask_addr += PERF_IRQMASK_6345_REG;
|
||||
+ irq_stat_addr[0] += PERF_IRQSTAT_6345_REG;
|
||||
+ irq_mask_addr[0] += PERF_IRQMASK_6345_REG;
|
||||
irq_bits = 32;
|
||||
ext_irq_count = 4;
|
||||
ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
|
||||
break;
|
||||
case BCM6348_CPU_ID:
|
||||
- irq_stat_addr += PERF_IRQSTAT_6348_REG;
|
||||
- irq_mask_addr += PERF_IRQMASK_6348_REG;
|
||||
+ irq_stat_addr[0] += PERF_IRQSTAT_6348_REG;
|
||||
+ irq_mask_addr[0] += PERF_IRQMASK_6348_REG;
|
||||
irq_bits = 32;
|
||||
ext_irq_count = 4;
|
||||
ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348;
|
||||
break;
|
||||
case BCM6358_CPU_ID:
|
||||
- irq_stat_addr += PERF_IRQSTAT_6358_REG;
|
||||
- irq_mask_addr += PERF_IRQMASK_6358_REG;
|
||||
+ irq_stat_addr[0] += PERF_IRQSTAT_6358_REG(0);
|
||||
+ irq_mask_addr[0] += PERF_IRQMASK_6358_REG(0);
|
||||
irq_bits = 32;
|
||||
ext_irq_count = 4;
|
||||
is_ext_irq_cascaded = 1;
|
||||
@@ -392,8 +393,8 @@ static void bcm63xx_init_irq(void)
|
||||
ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358;
|
||||
break;
|
||||
case BCM6362_CPU_ID:
|
||||
- irq_stat_addr += PERF_IRQSTAT_6362_REG;
|
||||
- irq_mask_addr += PERF_IRQMASK_6362_REG;
|
||||
+ irq_stat_addr[0] += PERF_IRQSTAT_6362_REG(0);
|
||||
+ irq_mask_addr[0] += PERF_IRQMASK_6362_REG(0);
|
||||
irq_bits = 64;
|
||||
ext_irq_count = 4;
|
||||
is_ext_irq_cascaded = 1;
|
||||
@@ -402,8 +403,8 @@ static void bcm63xx_init_irq(void)
|
||||
ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6362;
|
||||
break;
|
||||
case BCM6368_CPU_ID:
|
||||
- irq_stat_addr += PERF_IRQSTAT_6368_REG;
|
||||
- irq_mask_addr += PERF_IRQMASK_6368_REG;
|
||||
+ irq_stat_addr[0] += PERF_IRQSTAT_6368_REG(0);
|
||||
+ irq_mask_addr[0] += PERF_IRQMASK_6368_REG(0);
|
||||
irq_bits = 64;
|
||||
ext_irq_count = 6;
|
||||
is_ext_irq_cascaded = 1;
|
||||
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
|
||||
@@ -215,23 +215,23 @@
|
||||
|
||||
/* Interrupt Mask register */
|
||||
#define PERF_IRQMASK_3368_REG 0xc
|
||||
-#define PERF_IRQMASK_6328_REG 0x20
|
||||
+#define PERF_IRQMASK_6328_REG(x) (0x20 + (x) * 0x10)
|
||||
#define PERF_IRQMASK_6338_REG 0xc
|
||||
#define PERF_IRQMASK_6345_REG 0xc
|
||||
#define PERF_IRQMASK_6348_REG 0xc
|
||||
-#define PERF_IRQMASK_6358_REG 0xc
|
||||
-#define PERF_IRQMASK_6362_REG 0x20
|
||||
-#define PERF_IRQMASK_6368_REG 0x20
|
||||
+#define PERF_IRQMASK_6358_REG(x) (0xc + (x) * 0x2c)
|
||||
+#define PERF_IRQMASK_6362_REG(x) (0x20 + (x) * 0x10)
|
||||
+#define PERF_IRQMASK_6368_REG(x) (0x20 + (x) * 0x10)
|
||||
|
||||
/* Interrupt Status register */
|
||||
#define PERF_IRQSTAT_3368_REG 0x10
|
||||
-#define PERF_IRQSTAT_6328_REG 0x28
|
||||
+#define PERF_IRQSTAT_6328_REG(x) (0x28 + (x) * 0x10)
|
||||
#define PERF_IRQSTAT_6338_REG 0x10
|
||||
#define PERF_IRQSTAT_6345_REG 0x10
|
||||
#define PERF_IRQSTAT_6348_REG 0x10
|
||||
-#define PERF_IRQSTAT_6358_REG 0x10
|
||||
-#define PERF_IRQSTAT_6362_REG 0x28
|
||||
-#define PERF_IRQSTAT_6368_REG 0x28
|
||||
+#define PERF_IRQSTAT_6358_REG(x) (0x10 + (x) * 0x2c)
|
||||
+#define PERF_IRQSTAT_6362_REG(x) (0x28 + (x) * 0x10)
|
||||
+#define PERF_IRQSTAT_6368_REG(x) (0x28 + (x) * 0x10)
|
||||
|
||||
/* External Interrupt Configuration register */
|
||||
#define PERF_EXTIRQ_CFG_REG_3368 0x14
|
|
@ -1,94 +0,0 @@
|
|||
From ff61c72a7a260ab4c4abbddb72c3cd2aea5e0687 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Thu, 25 Apr 2013 00:31:29 +0200
|
||||
Subject: [PATCH 05/10] MIPS: BCM63XX: populate irq_{stat,mask}_addr for second
|
||||
cpu
|
||||
|
||||
Set it to zero if there is no second set.
|
||||
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/irq.c | 18 ++++++++++++++++++
|
||||
1 file changed, 18 insertions(+)
|
||||
|
||||
--- a/arch/mips/bcm63xx/irq.c
|
||||
+++ b/arch/mips/bcm63xx/irq.c
|
||||
@@ -342,11 +342,15 @@ static void bcm63xx_init_irq(void)
|
||||
|
||||
irq_stat_addr[0] = bcm63xx_regset_address(RSET_PERF);
|
||||
irq_mask_addr[0] = bcm63xx_regset_address(RSET_PERF);
|
||||
+ irq_stat_addr[1] = bcm63xx_regset_address(RSET_PERF);
|
||||
+ irq_mask_addr[1] = bcm63xx_regset_address(RSET_PERF);
|
||||
|
||||
switch (bcm63xx_get_cpu_id()) {
|
||||
case BCM3368_CPU_ID:
|
||||
irq_stat_addr[0] += PERF_IRQSTAT_3368_REG;
|
||||
irq_mask_addr[0] += PERF_IRQMASK_3368_REG;
|
||||
+ irq_stat_addr[1] = 0;
|
||||
+ irq_stat_addr[1] = 0;
|
||||
irq_bits = 32;
|
||||
ext_irq_count = 4;
|
||||
ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
|
||||
@@ -354,6 +358,8 @@ static void bcm63xx_init_irq(void)
|
||||
case BCM6328_CPU_ID:
|
||||
irq_stat_addr[0] += PERF_IRQSTAT_6328_REG(0);
|
||||
irq_mask_addr[0] += PERF_IRQMASK_6328_REG(0);
|
||||
+ irq_stat_addr[1] += PERF_IRQSTAT_6328_REG(1);
|
||||
+ irq_stat_addr[1] += PERF_IRQMASK_6328_REG(1);
|
||||
irq_bits = 64;
|
||||
ext_irq_count = 4;
|
||||
is_ext_irq_cascaded = 1;
|
||||
@@ -364,6 +370,8 @@ static void bcm63xx_init_irq(void)
|
||||
case BCM6338_CPU_ID:
|
||||
irq_stat_addr[0] += PERF_IRQSTAT_6338_REG;
|
||||
irq_mask_addr[0] += PERF_IRQMASK_6338_REG;
|
||||
+ irq_stat_addr[1] = 0;
|
||||
+ irq_mask_addr[1] = 0;
|
||||
irq_bits = 32;
|
||||
ext_irq_count = 4;
|
||||
ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
|
||||
@@ -371,6 +379,8 @@ static void bcm63xx_init_irq(void)
|
||||
case BCM6345_CPU_ID:
|
||||
irq_stat_addr[0] += PERF_IRQSTAT_6345_REG;
|
||||
irq_mask_addr[0] += PERF_IRQMASK_6345_REG;
|
||||
+ irq_stat_addr[1] = 0;
|
||||
+ irq_mask_addr[1] = 0;
|
||||
irq_bits = 32;
|
||||
ext_irq_count = 4;
|
||||
ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
|
||||
@@ -378,6 +388,8 @@ static void bcm63xx_init_irq(void)
|
||||
case BCM6348_CPU_ID:
|
||||
irq_stat_addr[0] += PERF_IRQSTAT_6348_REG;
|
||||
irq_mask_addr[0] += PERF_IRQMASK_6348_REG;
|
||||
+ irq_stat_addr[1] = 0;
|
||||
+ irq_mask_addr[1] = 0;
|
||||
irq_bits = 32;
|
||||
ext_irq_count = 4;
|
||||
ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348;
|
||||
@@ -385,6 +397,8 @@ static void bcm63xx_init_irq(void)
|
||||
case BCM6358_CPU_ID:
|
||||
irq_stat_addr[0] += PERF_IRQSTAT_6358_REG(0);
|
||||
irq_mask_addr[0] += PERF_IRQMASK_6358_REG(0);
|
||||
+ irq_stat_addr[1] += PERF_IRQSTAT_6358_REG(1);
|
||||
+ irq_mask_addr[1] += PERF_IRQMASK_6358_REG(1);
|
||||
irq_bits = 32;
|
||||
ext_irq_count = 4;
|
||||
is_ext_irq_cascaded = 1;
|
||||
@@ -395,6 +409,8 @@ static void bcm63xx_init_irq(void)
|
||||
case BCM6362_CPU_ID:
|
||||
irq_stat_addr[0] += PERF_IRQSTAT_6362_REG(0);
|
||||
irq_mask_addr[0] += PERF_IRQMASK_6362_REG(0);
|
||||
+ irq_stat_addr[1] += PERF_IRQSTAT_6362_REG(1);
|
||||
+ irq_mask_addr[1] += PERF_IRQMASK_6362_REG(1);
|
||||
irq_bits = 64;
|
||||
ext_irq_count = 4;
|
||||
is_ext_irq_cascaded = 1;
|
||||
@@ -405,6 +421,8 @@ static void bcm63xx_init_irq(void)
|
||||
case BCM6368_CPU_ID:
|
||||
irq_stat_addr[0] += PERF_IRQSTAT_6368_REG(0);
|
||||
irq_mask_addr[0] += PERF_IRQMASK_6368_REG(0);
|
||||
+ irq_stat_addr[1] += PERF_IRQSTAT_6368_REG(1);
|
||||
+ irq_mask_addr[1] += PERF_IRQMASK_6368_REG(1);
|
||||
irq_bits = 64;
|
||||
ext_irq_count = 6;
|
||||
is_ext_irq_cascaded = 1;
|
|
@ -1,70 +0,0 @@
|
|||
From 43ebef8162adfa7789cb915e60e46103965d7efd Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Fri, 26 Apr 2013 11:21:16 +0200
|
||||
Subject: [PATCH 06/10] MIPS: BCM63XX: add cpu argument to dispatch internal
|
||||
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/irq.c | 18 ++++++++++--------
|
||||
1 file changed, 10 insertions(+), 8 deletions(-)
|
||||
|
||||
--- a/arch/mips/bcm63xx/irq.c
|
||||
+++ b/arch/mips/bcm63xx/irq.c
|
||||
@@ -19,9 +19,10 @@
|
||||
#include <bcm63xx_io.h>
|
||||
#include <bcm63xx_irq.h>
|
||||
|
||||
+
|
||||
static u32 irq_stat_addr[2];
|
||||
static u32 irq_mask_addr[2];
|
||||
-static void (*dispatch_internal)(void);
|
||||
+static void (*dispatch_internal)(int cpu);
|
||||
static int is_ext_irq_cascaded;
|
||||
static unsigned int ext_irq_count;
|
||||
static unsigned int ext_irq_start, ext_irq_end;
|
||||
@@ -54,19 +55,20 @@ static inline void handle_internal(int i
|
||||
*/
|
||||
|
||||
#define BUILD_IPIC_INTERNAL(width) \
|
||||
-void __dispatch_internal_##width(void) \
|
||||
+void __dispatch_internal_##width(int cpu) \
|
||||
{ \
|
||||
u32 pending[width / 32]; \
|
||||
unsigned int src, tgt; \
|
||||
bool irqs_pending = false; \
|
||||
- static unsigned int i; \
|
||||
+ static unsigned int i[2]; \
|
||||
+ unsigned int *next = &i[cpu]; \
|
||||
\
|
||||
/* read registers in reverse order */ \
|
||||
for (src = 0, tgt = (width / 32); src < (width / 32); src++) { \
|
||||
u32 val; \
|
||||
\
|
||||
- val = bcm_readl(irq_stat_addr[0] + src * sizeof(u32)); \
|
||||
- val &= bcm_readl(irq_mask_addr[0] + src * sizeof(u32)); \
|
||||
+ val = bcm_readl(irq_stat_addr[cpu] + src * sizeof(u32)); \
|
||||
+ val &= bcm_readl(irq_mask_addr[cpu] + src * sizeof(u32)); \
|
||||
pending[--tgt] = val; \
|
||||
\
|
||||
if (val) \
|
||||
@@ -77,9 +79,9 @@ void __dispatch_internal_##width(void)
|
||||
return; \
|
||||
\
|
||||
while (1) { \
|
||||
- unsigned int to_call = i; \
|
||||
+ unsigned int to_call = *next; \
|
||||
\
|
||||
- i = (i + 1) & (width - 1); \
|
||||
+ *next = (*next + 1) & (width - 1); \
|
||||
if (pending[to_call / 32] & (1 << (to_call & 0x1f))) { \
|
||||
handle_internal(to_call); \
|
||||
break; \
|
||||
@@ -129,7 +131,7 @@ asmlinkage void plat_irq_dispatch(void)
|
||||
if (cause & CAUSEF_IP1)
|
||||
do_IRQ(1);
|
||||
if (cause & CAUSEF_IP2)
|
||||
- dispatch_internal();
|
||||
+ dispatch_internal(0);
|
||||
if (!is_ext_irq_cascaded) {
|
||||
if (cause & CAUSEF_IP3)
|
||||
do_IRQ(IRQ_EXT_0);
|
|
@ -1,162 +0,0 @@
|
|||
From 5e86f3988854c62c0788e4820caf722fec7c791b Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Sun, 21 Apr 2013 15:38:56 +0200
|
||||
Subject: [PATCH 07/10] MIPS: BCM63XX: protect irq register accesses
|
||||
|
||||
Since we will have the chance of accessing the registers concurrently,
|
||||
protect any accesses through a spinlock.
|
||||
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/irq.c | 26 ++++++++++++++++++++++++++
|
||||
1 file changed, 26 insertions(+)
|
||||
|
||||
--- a/arch/mips/bcm63xx/irq.c
|
||||
+++ b/arch/mips/bcm63xx/irq.c
|
||||
@@ -12,6 +12,7 @@
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/irq.h>
|
||||
+#include <linux/spinlock.h>
|
||||
#include <asm/irq_cpu.h>
|
||||
#include <asm/mipsregs.h>
|
||||
#include <bcm63xx_cpu.h>
|
||||
@@ -20,6 +21,9 @@
|
||||
#include <bcm63xx_irq.h>
|
||||
|
||||
|
||||
+static DEFINE_SPINLOCK(ipic_lock);
|
||||
+static DEFINE_SPINLOCK(epic_lock);
|
||||
+
|
||||
static u32 irq_stat_addr[2];
|
||||
static u32 irq_mask_addr[2];
|
||||
static void (*dispatch_internal)(int cpu);
|
||||
@@ -62,8 +66,10 @@ void __dispatch_internal_##width(int cpu
|
||||
bool irqs_pending = false; \
|
||||
static unsigned int i[2]; \
|
||||
unsigned int *next = &i[cpu]; \
|
||||
+ unsigned long flags; \
|
||||
\
|
||||
/* read registers in reverse order */ \
|
||||
+ spin_lock_irqsave(&ipic_lock, flags); \
|
||||
for (src = 0, tgt = (width / 32); src < (width / 32); src++) { \
|
||||
u32 val; \
|
||||
\
|
||||
@@ -74,6 +80,7 @@ void __dispatch_internal_##width(int cpu
|
||||
if (val) \
|
||||
irqs_pending = true; \
|
||||
} \
|
||||
+ spin_unlock_irqrestore(&ipic_lock, flags); \
|
||||
\
|
||||
if (!irqs_pending) \
|
||||
return; \
|
||||
@@ -94,10 +101,13 @@ static void __internal_irq_mask_##width(
|
||||
u32 val; \
|
||||
unsigned reg = (irq / 32) ^ (width/32 - 1); \
|
||||
unsigned bit = irq & 0x1f; \
|
||||
+ unsigned long flags; \
|
||||
\
|
||||
+ spin_lock_irqsave(&ipic_lock, flags); \
|
||||
val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32)); \
|
||||
val &= ~(1 << bit); \
|
||||
bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32)); \
|
||||
+ spin_unlock_irqrestore(&ipic_lock, flags); \
|
||||
} \
|
||||
\
|
||||
static void __internal_irq_unmask_##width(unsigned int irq) \
|
||||
@@ -105,10 +115,13 @@ static void __internal_irq_unmask_##widt
|
||||
u32 val; \
|
||||
unsigned reg = (irq / 32) ^ (width/32 - 1); \
|
||||
unsigned bit = irq & 0x1f; \
|
||||
+ unsigned long flags; \
|
||||
\
|
||||
+ spin_lock_irqsave(&ipic_lock, flags); \
|
||||
val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32)); \
|
||||
val |= (1 << bit); \
|
||||
bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32)); \
|
||||
+ spin_unlock_irqrestore(&ipic_lock, flags); \
|
||||
}
|
||||
|
||||
BUILD_IPIC_INTERNAL(32);
|
||||
@@ -167,8 +180,10 @@ static void bcm63xx_external_irq_mask(st
|
||||
{
|
||||
unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
|
||||
u32 reg, regaddr;
|
||||
+ unsigned long flags;
|
||||
|
||||
regaddr = get_ext_irq_perf_reg(irq);
|
||||
+ spin_lock_irqsave(&epic_lock, flags);
|
||||
reg = bcm_perf_readl(regaddr);
|
||||
|
||||
if (BCMCPU_IS_6348())
|
||||
@@ -177,6 +192,8 @@ static void bcm63xx_external_irq_mask(st
|
||||
reg &= ~EXTIRQ_CFG_MASK(irq % 4);
|
||||
|
||||
bcm_perf_writel(reg, regaddr);
|
||||
+ spin_unlock_irqrestore(&epic_lock, flags);
|
||||
+
|
||||
if (is_ext_irq_cascaded)
|
||||
internal_irq_mask(irq + ext_irq_start);
|
||||
}
|
||||
@@ -185,8 +202,10 @@ static void bcm63xx_external_irq_unmask(
|
||||
{
|
||||
unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
|
||||
u32 reg, regaddr;
|
||||
+ unsigned long flags;
|
||||
|
||||
regaddr = get_ext_irq_perf_reg(irq);
|
||||
+ spin_lock_irqsave(&epic_lock, flags);
|
||||
reg = bcm_perf_readl(regaddr);
|
||||
|
||||
if (BCMCPU_IS_6348())
|
||||
@@ -195,6 +214,7 @@ static void bcm63xx_external_irq_unmask(
|
||||
reg |= EXTIRQ_CFG_MASK(irq % 4);
|
||||
|
||||
bcm_perf_writel(reg, regaddr);
|
||||
+ spin_unlock_irqrestore(&epic_lock, flags);
|
||||
|
||||
if (is_ext_irq_cascaded)
|
||||
internal_irq_unmask(irq + ext_irq_start);
|
||||
@@ -204,8 +224,10 @@ static void bcm63xx_external_irq_clear(s
|
||||
{
|
||||
unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
|
||||
u32 reg, regaddr;
|
||||
+ unsigned long flags;
|
||||
|
||||
regaddr = get_ext_irq_perf_reg(irq);
|
||||
+ spin_lock_irqsave(&epic_lock, flags);
|
||||
reg = bcm_perf_readl(regaddr);
|
||||
|
||||
if (BCMCPU_IS_6348())
|
||||
@@ -214,6 +236,7 @@ static void bcm63xx_external_irq_clear(s
|
||||
reg |= EXTIRQ_CFG_CLEAR(irq % 4);
|
||||
|
||||
bcm_perf_writel(reg, regaddr);
|
||||
+ spin_unlock_irqrestore(&epic_lock, flags);
|
||||
}
|
||||
|
||||
static int bcm63xx_external_irq_set_type(struct irq_data *d,
|
||||
@@ -222,6 +245,7 @@ static int bcm63xx_external_irq_set_type
|
||||
unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
|
||||
u32 reg, regaddr;
|
||||
int levelsense, sense, bothedge;
|
||||
+ unsigned long flags;
|
||||
|
||||
flow_type &= IRQ_TYPE_SENSE_MASK;
|
||||
|
||||
@@ -256,6 +280,7 @@ static int bcm63xx_external_irq_set_type
|
||||
}
|
||||
|
||||
regaddr = get_ext_irq_perf_reg(irq);
|
||||
+ spin_lock_irqsave(&epic_lock, flags);
|
||||
reg = bcm_perf_readl(regaddr);
|
||||
irq %= 4;
|
||||
|
||||
@@ -300,6 +325,7 @@ static int bcm63xx_external_irq_set_type
|
||||
}
|
||||
|
||||
bcm_perf_writel(reg, regaddr);
|
||||
+ spin_unlock_irqrestore(&epic_lock, flags);
|
||||
|
||||
irqd_set_trigger_type(d, flow_type);
|
||||
if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
|
|
@ -1,93 +0,0 @@
|
|||
From 6e74b82aca08a5ecc4d2f0780254468659427e82 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Fri, 26 Apr 2013 12:03:15 +0200
|
||||
Subject: [PATCH 08/10] MIPS: BCM63XX: wire up the second cpu's irq line
|
||||
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/irq.c | 44 +++++++++++++++++++++++++++++++++++++-------
|
||||
1 file changed, 37 insertions(+), 7 deletions(-)
|
||||
|
||||
--- a/arch/mips/bcm63xx/irq.c
|
||||
+++ b/arch/mips/bcm63xx/irq.c
|
||||
@@ -102,11 +102,17 @@ static void __internal_irq_mask_##width(
|
||||
unsigned reg = (irq / 32) ^ (width/32 - 1); \
|
||||
unsigned bit = irq & 0x1f; \
|
||||
unsigned long flags; \
|
||||
+ int cpu; \
|
||||
\
|
||||
spin_lock_irqsave(&ipic_lock, flags); \
|
||||
- val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32)); \
|
||||
- val &= ~(1 << bit); \
|
||||
- bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32)); \
|
||||
+ for_each_present_cpu(cpu) { \
|
||||
+ if (!irq_mask_addr[cpu]) \
|
||||
+ break; \
|
||||
+ \
|
||||
+ val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
|
||||
+ val &= ~(1 << bit); \
|
||||
+ bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\
|
||||
+ } \
|
||||
spin_unlock_irqrestore(&ipic_lock, flags); \
|
||||
} \
|
||||
\
|
||||
@@ -116,11 +122,20 @@ static void __internal_irq_unmask_##widt
|
||||
unsigned reg = (irq / 32) ^ (width/32 - 1); \
|
||||
unsigned bit = irq & 0x1f; \
|
||||
unsigned long flags; \
|
||||
+ int cpu; \
|
||||
\
|
||||
spin_lock_irqsave(&ipic_lock, flags); \
|
||||
- val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32)); \
|
||||
- val |= (1 << bit); \
|
||||
- bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32)); \
|
||||
+ for_each_present_cpu(cpu) { \
|
||||
+ if (!irq_mask_addr[cpu]) \
|
||||
+ break; \
|
||||
+ \
|
||||
+ val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
|
||||
+ if (cpu_online(cpu)) \
|
||||
+ val |= (1 << bit); \
|
||||
+ else \
|
||||
+ val &= ~(1 << bit); \
|
||||
+ bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\
|
||||
+ } \
|
||||
spin_unlock_irqrestore(&ipic_lock, flags); \
|
||||
}
|
||||
|
||||
@@ -145,7 +160,10 @@ asmlinkage void plat_irq_dispatch(void)
|
||||
do_IRQ(1);
|
||||
if (cause & CAUSEF_IP2)
|
||||
dispatch_internal(0);
|
||||
- if (!is_ext_irq_cascaded) {
|
||||
+ if (is_ext_irq_cascaded) {
|
||||
+ if (cause & CAUSEF_IP3)
|
||||
+ dispatch_internal(1);
|
||||
+ } else {
|
||||
if (cause & CAUSEF_IP3)
|
||||
do_IRQ(IRQ_EXT_0);
|
||||
if (cause & CAUSEF_IP4)
|
||||
@@ -358,6 +376,14 @@ static struct irqaction cpu_ip2_cascade_
|
||||
.flags = IRQF_NO_THREAD,
|
||||
};
|
||||
|
||||
+#ifdef CONFIG_SMP
|
||||
+static struct irqaction cpu_ip3_cascade_action = {
|
||||
+ .handler = no_action,
|
||||
+ .name = "cascade_ip3",
|
||||
+ .flags = IRQF_NO_THREAD,
|
||||
+};
|
||||
+#endif
|
||||
+
|
||||
static struct irqaction cpu_ext_cascade_action = {
|
||||
.handler = no_action,
|
||||
.name = "cascade_extirq",
|
||||
@@ -494,4 +520,8 @@ void __init arch_init_irq(void)
|
||||
}
|
||||
|
||||
setup_irq(MIPS_CPU_IRQ_BASE + 2, &cpu_ip2_cascade_action);
|
||||
+#ifdef CONFIG_SMP
|
||||
+ if (is_ext_irq_cascaded)
|
||||
+ setup_irq(MIPS_CPU_IRQ_BASE + 3, &cpu_ip3_cascade_action);
|
||||
+#endif
|
||||
}
|
|
@ -1,83 +0,0 @@
|
|||
From e23dc903cd69d32d407ea1b7310bc9a71e00d359 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Tue, 30 Apr 2013 11:26:53 +0200
|
||||
Subject: [PATCH 09/10] MIPS: BCM63XX: use irq_desc as argument for (un)mask
|
||||
|
||||
In preparation for applying affinity, use the irq descriptor as the
|
||||
argument for (un)mask.
|
||||
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/irq.c | 18 ++++++++++--------
|
||||
1 file changed, 10 insertions(+), 8 deletions(-)
|
||||
|
||||
--- a/arch/mips/bcm63xx/irq.c
|
||||
+++ b/arch/mips/bcm63xx/irq.c
|
||||
@@ -31,8 +31,8 @@ static int is_ext_irq_cascaded;
|
||||
static unsigned int ext_irq_count;
|
||||
static unsigned int ext_irq_start, ext_irq_end;
|
||||
static unsigned int ext_irq_cfg_reg1, ext_irq_cfg_reg2;
|
||||
-static void (*internal_irq_mask)(unsigned int irq);
|
||||
-static void (*internal_irq_unmask)(unsigned int irq);
|
||||
+static void (*internal_irq_mask)(struct irq_data *d);
|
||||
+static void (*internal_irq_unmask)(struct irq_data *d);
|
||||
|
||||
|
||||
static inline u32 get_ext_irq_perf_reg(int irq)
|
||||
@@ -96,9 +96,10 @@ void __dispatch_internal_##width(int cpu
|
||||
} \
|
||||
} \
|
||||
\
|
||||
-static void __internal_irq_mask_##width(unsigned int irq) \
|
||||
+static void __internal_irq_mask_##width(struct irq_data *d) \
|
||||
{ \
|
||||
u32 val; \
|
||||
+ unsigned irq = d->irq - IRQ_INTERNAL_BASE; \
|
||||
unsigned reg = (irq / 32) ^ (width/32 - 1); \
|
||||
unsigned bit = irq & 0x1f; \
|
||||
unsigned long flags; \
|
||||
@@ -116,9 +117,10 @@ static void __internal_irq_mask_##width(
|
||||
spin_unlock_irqrestore(&ipic_lock, flags); \
|
||||
} \
|
||||
\
|
||||
-static void __internal_irq_unmask_##width(unsigned int irq) \
|
||||
+static void __internal_irq_unmask_##width(struct irq_data *d) \
|
||||
{ \
|
||||
u32 val; \
|
||||
+ unsigned irq = d->irq - IRQ_INTERNAL_BASE; \
|
||||
unsigned reg = (irq / 32) ^ (width/32 - 1); \
|
||||
unsigned bit = irq & 0x1f; \
|
||||
unsigned long flags; \
|
||||
@@ -182,12 +184,12 @@ asmlinkage void plat_irq_dispatch(void)
|
||||
*/
|
||||
static void bcm63xx_internal_irq_mask(struct irq_data *d)
|
||||
{
|
||||
- internal_irq_mask(d->irq - IRQ_INTERNAL_BASE);
|
||||
+ internal_irq_mask(d);
|
||||
}
|
||||
|
||||
static void bcm63xx_internal_irq_unmask(struct irq_data *d)
|
||||
{
|
||||
- internal_irq_unmask(d->irq - IRQ_INTERNAL_BASE);
|
||||
+ internal_irq_unmask(d);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -213,7 +215,7 @@ static void bcm63xx_external_irq_mask(st
|
||||
spin_unlock_irqrestore(&epic_lock, flags);
|
||||
|
||||
if (is_ext_irq_cascaded)
|
||||
- internal_irq_mask(irq + ext_irq_start);
|
||||
+ internal_irq_mask(irq_get_irq_data(irq + ext_irq_start));
|
||||
}
|
||||
|
||||
static void bcm63xx_external_irq_unmask(struct irq_data *d)
|
||||
@@ -235,7 +237,7 @@ static void bcm63xx_external_irq_unmask(
|
||||
spin_unlock_irqrestore(&epic_lock, flags);
|
||||
|
||||
if (is_ext_irq_cascaded)
|
||||
- internal_irq_unmask(irq + ext_irq_start);
|
||||
+ internal_irq_unmask(irq_get_irq_data(irq + ext_irq_start));
|
||||
}
|
||||
|
||||
static void bcm63xx_external_irq_clear(struct irq_data *d)
|
|
@ -1,118 +0,0 @@
|
|||
From 23493b47d8caaa59b18627a01bf443c3b50bb530 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Fri, 26 Apr 2013 12:06:03 +0200
|
||||
Subject: [PATCH 10/10] MIPS: BCM63XX: allow setting affinity for IPIC
|
||||
|
||||
Wire up the set_affinity call for the internal PIC if booting on
|
||||
a cpu supporting it.
|
||||
Affinity is kept to boot cpu as default.
|
||||
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/irq.c | 46 ++++++++++++++++++++++++++++++++++++++++------
|
||||
1 file changed, 40 insertions(+), 6 deletions(-)
|
||||
|
||||
--- a/arch/mips/bcm63xx/irq.c
|
||||
+++ b/arch/mips/bcm63xx/irq.c
|
||||
@@ -32,7 +32,7 @@ static unsigned int ext_irq_count;
|
||||
static unsigned int ext_irq_start, ext_irq_end;
|
||||
static unsigned int ext_irq_cfg_reg1, ext_irq_cfg_reg2;
|
||||
static void (*internal_irq_mask)(struct irq_data *d);
|
||||
-static void (*internal_irq_unmask)(struct irq_data *d);
|
||||
+static void (*internal_irq_unmask)(struct irq_data *d, const struct cpumask *m);
|
||||
|
||||
|
||||
static inline u32 get_ext_irq_perf_reg(int irq)
|
||||
@@ -51,6 +51,20 @@ static inline void handle_internal(int i
|
||||
do_IRQ(intbit + IRQ_INTERNAL_BASE);
|
||||
}
|
||||
|
||||
+static inline int enable_irq_for_cpu(int cpu, struct irq_data *d,
|
||||
+ const struct cpumask *m)
|
||||
+{
|
||||
+ bool enable = cpu_online(cpu);
|
||||
+
|
||||
+#ifdef CONFIG_SMP
|
||||
+ if (m)
|
||||
+ enable &= cpu_isset(cpu, *m);
|
||||
+ else if (irqd_affinity_was_set(d))
|
||||
+ enable &= cpu_isset(cpu, *d->affinity);
|
||||
+#endif
|
||||
+ return enable;
|
||||
+}
|
||||
+
|
||||
/*
|
||||
* dispatch internal devices IRQ (uart, enet, watchdog, ...). do not
|
||||
* prioritize any interrupt relatively to another. the static counter
|
||||
@@ -117,7 +131,8 @@ static void __internal_irq_mask_##width(
|
||||
spin_unlock_irqrestore(&ipic_lock, flags); \
|
||||
} \
|
||||
\
|
||||
-static void __internal_irq_unmask_##width(struct irq_data *d) \
|
||||
+static void __internal_irq_unmask_##width(struct irq_data *d, \
|
||||
+ const struct cpumask *m) \
|
||||
{ \
|
||||
u32 val; \
|
||||
unsigned irq = d->irq - IRQ_INTERNAL_BASE; \
|
||||
@@ -132,7 +147,7 @@ static void __internal_irq_unmask_##widt
|
||||
break; \
|
||||
\
|
||||
val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
|
||||
- if (cpu_online(cpu)) \
|
||||
+ if (enable_irq_for_cpu(cpu, d, m)) \
|
||||
val |= (1 << bit); \
|
||||
else \
|
||||
val &= ~(1 << bit); \
|
||||
@@ -189,7 +204,7 @@ static void bcm63xx_internal_irq_mask(st
|
||||
|
||||
static void bcm63xx_internal_irq_unmask(struct irq_data *d)
|
||||
{
|
||||
- internal_irq_unmask(d);
|
||||
+ internal_irq_unmask(d, NULL);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -237,7 +252,8 @@ static void bcm63xx_external_irq_unmask(
|
||||
spin_unlock_irqrestore(&epic_lock, flags);
|
||||
|
||||
if (is_ext_irq_cascaded)
|
||||
- internal_irq_unmask(irq_get_irq_data(irq + ext_irq_start));
|
||||
+ internal_irq_unmask(irq_get_irq_data(irq + ext_irq_start),
|
||||
+ NULL);
|
||||
}
|
||||
|
||||
static void bcm63xx_external_irq_clear(struct irq_data *d)
|
||||
@@ -356,6 +372,18 @@ static int bcm63xx_external_irq_set_type
|
||||
return IRQ_SET_MASK_OK_NOCOPY;
|
||||
}
|
||||
|
||||
+#ifdef CONFIG_SMP
|
||||
+static int bcm63xx_internal_set_affinity(struct irq_data *data,
|
||||
+ const struct cpumask *dest,
|
||||
+ bool force)
|
||||
+{
|
||||
+ if (!irqd_irq_disabled(data))
|
||||
+ internal_irq_unmask(data, dest);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+#endif
|
||||
+
|
||||
static struct irq_chip bcm63xx_internal_irq_chip = {
|
||||
.name = "bcm63xx_ipic",
|
||||
.irq_mask = bcm63xx_internal_irq_mask,
|
||||
@@ -523,7 +551,13 @@ void __init arch_init_irq(void)
|
||||
|
||||
setup_irq(MIPS_CPU_IRQ_BASE + 2, &cpu_ip2_cascade_action);
|
||||
#ifdef CONFIG_SMP
|
||||
- if (is_ext_irq_cascaded)
|
||||
+ if (is_ext_irq_cascaded) {
|
||||
setup_irq(MIPS_CPU_IRQ_BASE + 3, &cpu_ip3_cascade_action);
|
||||
+ bcm63xx_internal_irq_chip.irq_set_affinity =
|
||||
+ bcm63xx_internal_set_affinity;
|
||||
+
|
||||
+ cpumask_clear(irq_default_affinity);
|
||||
+ cpumask_set_cpu(smp_processor_id(), irq_default_affinity);
|
||||
+ }
|
||||
#endif
|
||||
}
|
|
@ -1,20 +0,0 @@
|
|||
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_board.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_board.h
|
||||
@@ -1,6 +1,8 @@
|
||||
#ifndef BCM63XX_BOARD_H_
|
||||
#define BCM63XX_BOARD_H_
|
||||
|
||||
+#include <asm/bootinfo.h>
|
||||
+
|
||||
const char *board_get_name(void);
|
||||
|
||||
void board_prom_init(void);
|
||||
@@ -9,4 +11,8 @@ void board_setup(void);
|
||||
|
||||
int board_register_devices(void);
|
||||
|
||||
+static inline bool bcm63xx_is_cfe_present(void) {
|
||||
+ return fw_arg3 == 0x43464531;
|
||||
+}
|
||||
+
|
||||
#endif /* ! BCM63XX_BOARD_H_ */
|
|
@ -1,51 +0,0 @@
|
|||
--- a/drivers/mtd/bcm63xxpart.c
|
||||
+++ b/drivers/mtd/bcm63xxpart.c
|
||||
@@ -35,7 +35,7 @@
|
||||
|
||||
#include <asm/mach-bcm63xx/bcm63xx_nvram.h>
|
||||
#include <linux/bcm963xx_tag.h>
|
||||
-#include <asm/mach-bcm63xx/board_bcm963xx.h>
|
||||
+#include <asm/mach-bcm63xx/bcm63xx_board.h>
|
||||
|
||||
#define BCM63XX_EXTENDED_SIZE 0xBFC00000 /* Extended flash address */
|
||||
|
||||
@@ -43,30 +43,6 @@
|
||||
|
||||
#define BCM63XX_CFE_MAGIC_OFFSET 0x4e0
|
||||
|
||||
-static int bcm63xx_detect_cfe(struct mtd_info *master)
|
||||
-{
|
||||
- char buf[9];
|
||||
- int ret;
|
||||
- size_t retlen;
|
||||
-
|
||||
- ret = mtd_read(master, BCM963XX_CFE_VERSION_OFFSET, 5, &retlen,
|
||||
- (void *)buf);
|
||||
- buf[retlen] = 0;
|
||||
-
|
||||
- if (ret)
|
||||
- return ret;
|
||||
-
|
||||
- if (strncmp("cfe-v", buf, 5) == 0)
|
||||
- return 0;
|
||||
-
|
||||
- /* very old CFE's do not have the cfe-v string, so check for magic */
|
||||
- ret = mtd_read(master, BCM63XX_CFE_MAGIC_OFFSET, 8, &retlen,
|
||||
- (void *)buf);
|
||||
- buf[retlen] = 0;
|
||||
-
|
||||
- return strncmp("CFE1CFE1", buf, 8);
|
||||
-}
|
||||
-
|
||||
static int bcm63xx_parse_cfe_partitions(struct mtd_info *master,
|
||||
struct mtd_partition **pparts,
|
||||
struct mtd_part_parser_data *data)
|
||||
@@ -85,7 +61,7 @@ static int bcm63xx_parse_cfe_partitions(
|
||||
u32 computed_crc;
|
||||
bool rootfs_first = false;
|
||||
|
||||
- if (bcm63xx_detect_cfe(master))
|
||||
+ if (!bcm63xx_is_cfe_present())
|
||||
return -EINVAL;
|
||||
|
||||
cfe_erasesize = max_t(uint32_t, master->erasesize,
|
|
@ -1,77 +0,0 @@
|
|||
From c50acd37b425a8a907a6f7f93aa2e658256e79ce Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Sat, 7 Dec 2013 14:08:36 +0100
|
||||
Subject: [PATCH 40/53] MIPS: BCM63XX: add a new cpu variant helper
|
||||
|
||||
---
|
||||
arch/mips/bcm63xx/cpu.c | 10 ++++++++++
|
||||
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 18 ++++++++++++++++++
|
||||
2 files changed, 28 insertions(+)
|
||||
|
||||
--- a/arch/mips/bcm63xx/cpu.c
|
||||
+++ b/arch/mips/bcm63xx/cpu.c
|
||||
@@ -27,6 +27,8 @@ EXPORT_SYMBOL(bcm63xx_irqs);
|
||||
u16 bcm63xx_cpu_id __read_mostly;
|
||||
EXPORT_SYMBOL(bcm63xx_cpu_id);
|
||||
|
||||
+static u32 bcm63xx_cpu_variant __read_mostly;
|
||||
+
|
||||
static u8 bcm63xx_cpu_rev;
|
||||
static unsigned int bcm63xx_cpu_freq;
|
||||
static unsigned int bcm63xx_memory_size;
|
||||
@@ -99,6 +101,13 @@ static const int bcm6368_irqs[] = {
|
||||
|
||||
};
|
||||
|
||||
+u32 bcm63xx_get_cpu_variant(void)
|
||||
+{
|
||||
+ return bcm63xx_cpu_variant;
|
||||
+}
|
||||
+
|
||||
+EXPORT_SYMBOL(bcm63xx_get_cpu_variant);
|
||||
+
|
||||
u8 bcm63xx_get_cpu_rev(void)
|
||||
{
|
||||
return bcm63xx_cpu_rev;
|
||||
@@ -334,6 +343,7 @@ void __init bcm63xx_cpu_init(void)
|
||||
/* read out CPU type */
|
||||
tmp = bcm_readl(chipid_reg);
|
||||
bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
|
||||
+ bcm63xx_cpu_variant = bcm63xx_cpu_id;
|
||||
bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
|
||||
|
||||
switch (bcm63xx_cpu_id) {
|
||||
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
|
||||
@@ -19,6 +19,7 @@
|
||||
#define BCM6368_CPU_ID 0x6368
|
||||
|
||||
void __init bcm63xx_cpu_init(void);
|
||||
+u32 bcm63xx_get_cpu_variant(void);
|
||||
u8 bcm63xx_get_cpu_rev(void);
|
||||
unsigned int bcm63xx_get_cpu_freq(void);
|
||||
|
||||
@@ -82,6 +83,23 @@ static inline u16 __pure bcm63xx_get_cpu
|
||||
#define BCMCPU_IS_6362() (bcm63xx_get_cpu_id() == BCM6362_CPU_ID)
|
||||
#define BCMCPU_IS_6368() (bcm63xx_get_cpu_id() == BCM6368_CPU_ID)
|
||||
|
||||
+#define BCMCPU_VARIANT_IS_3368() \
|
||||
+ (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
|
||||
+#define BCMCPU_VARIANT_IS_6328() \
|
||||
+ (bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
|
||||
+#define BCMCPU_VARIANT_IS_6338() \
|
||||
+ (bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
|
||||
+#define BCMCPU_VARIANT_IS_6345() \
|
||||
+ (bcm63xx_get_cpu_variant() == BCM6345_CPU_ID)
|
||||
+#define BCMCPU_VARIANT_IS_6348() \
|
||||
+ (bcm63xx_get_cpu_variant() == BCM6348_CPU_ID)
|
||||
+#define BCMCPU_VARIANT_IS_6358() \
|
||||
+ (bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID)
|
||||
+#define BCMCPU_VARIANT_IS_6362() \
|
||||
+ (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
|
||||
+#define BCMCPU_VARIANT_IS_6368() \
|
||||
+ (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
|
||||
+
|
||||
/*
|
||||
* While registers sets are (mostly) the same across 63xx CPU, base
|
||||
* address of these sets do change.
|
|
@ -1,23 +0,0 @@
|
|||
From 3bd8e2535265f06f79ed9c0ad788405441e091dc Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Sat, 7 Dec 2013 14:22:41 +0100
|
||||
Subject: [PATCH 21/45] MIPS: BCM63XX: define variant id field
|
||||
|
||||
Some SoC have a variant id field in the chip id register.
|
||||
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 ++
|
||||
1 file changed, 2 insertions(+)
|
||||
|
||||
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
|
||||
@@ -9,6 +9,8 @@
|
||||
#define PERF_REV_REG 0x0
|
||||
#define REV_CHIPID_SHIFT 16
|
||||
#define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT)
|
||||
+#define REV_VARID_SHIFT 12
|
||||
+#define REV_VARID_MASK (0xf << REV_VARID_SHIFT)
|
||||
#define REV_REVID_SHIFT 0
|
||||
#define REV_REVID_MASK (0xff << REV_REVID_SHIFT)
|
||||
|
|
@ -1,68 +0,0 @@
|
|||
From d59120f23279ef62a48d9f94847254b061d0a8b6 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Sat, 7 Dec 2013 14:30:59 +0100
|
||||
Subject: [PATCH 22/45] MIPS: BCM63XX: detect BCM6328 variants
|
||||
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/cpu.c | 10 ++++++++++
|
||||
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 8 ++++++--
|
||||
2 files changed, 16 insertions(+), 2 deletions(-)
|
||||
|
||||
--- a/arch/mips/bcm63xx/cpu.c
|
||||
+++ b/arch/mips/bcm63xx/cpu.c
|
||||
@@ -306,6 +306,7 @@ void __init bcm63xx_cpu_init(void)
|
||||
struct cpuinfo_mips *c = ¤t_cpu_data;
|
||||
unsigned int cpu = smp_processor_id();
|
||||
u32 chipid_reg;
|
||||
+ u8 __maybe_unused varid = 0;
|
||||
|
||||
/* soc registers location depends on cpu type */
|
||||
chipid_reg = 0;
|
||||
@@ -345,6 +346,7 @@ void __init bcm63xx_cpu_init(void)
|
||||
bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
|
||||
bcm63xx_cpu_variant = bcm63xx_cpu_id;
|
||||
bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
|
||||
+ varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
|
||||
|
||||
switch (bcm63xx_cpu_id) {
|
||||
case BCM3368_CPU_ID:
|
||||
@@ -354,6 +356,14 @@ void __init bcm63xx_cpu_init(void)
|
||||
case BCM6328_CPU_ID:
|
||||
bcm63xx_regs_base = bcm6328_regs_base;
|
||||
bcm63xx_irqs = bcm6328_irqs;
|
||||
+
|
||||
+ if (varid == 1)
|
||||
+ bcm63xx_cpu_variant = BCM63281_CPU_ID;
|
||||
+ else if (varid == 3)
|
||||
+ bcm63xx_cpu_variant = BCM63283_CPU_ID;
|
||||
+ else
|
||||
+ pr_warn("unknown BCM6328 variant: %x\n", varid);
|
||||
+
|
||||
break;
|
||||
case BCM6338_CPU_ID:
|
||||
bcm63xx_regs_base = bcm6338_regs_base;
|
||||
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
|
||||
@@ -11,6 +11,8 @@
|
||||
*/
|
||||
#define BCM3368_CPU_ID 0x3368
|
||||
#define BCM6328_CPU_ID 0x6328
|
||||
+#define BCM63281_CPU_ID 0x63281
|
||||
+#define BCM63283_CPU_ID 0x63283
|
||||
#define BCM6338_CPU_ID 0x6338
|
||||
#define BCM6345_CPU_ID 0x6345
|
||||
#define BCM6348_CPU_ID 0x6348
|
||||
@@ -85,8 +87,10 @@ static inline u16 __pure bcm63xx_get_cpu
|
||||
|
||||
#define BCMCPU_VARIANT_IS_3368() \
|
||||
(bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
|
||||
-#define BCMCPU_VARIANT_IS_6328() \
|
||||
- (bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
|
||||
+#define BCMCPU_VARIANT_IS_63281() \
|
||||
+ (bcm63xx_get_cpu_variant() == BCM63281_CPU_ID)
|
||||
+#define BCMCPU_VARIANT_IS_63283() \
|
||||
+ (bcm63xx_get_cpu_variant() == BCM63283_CPU_ID)
|
||||
#define BCMCPU_VARIANT_IS_6338() \
|
||||
(bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
|
||||
#define BCMCPU_VARIANT_IS_6345() \
|
|
@ -1,46 +0,0 @@
|
|||
From 04458c3db8eb79da21ecde40ab36a1dde52bef06 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Sat, 7 Dec 2013 14:33:28 +0100
|
||||
Subject: [PATCH 23/45] MIPS: BCM63XX: detect BCM6362 variants
|
||||
|
||||
---
|
||||
arch/mips/bcm63xx/cpu.c | 8 ++++++++
|
||||
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++
|
||||
2 files changed, 11 insertions(+)
|
||||
|
||||
--- a/arch/mips/bcm63xx/cpu.c
|
||||
+++ b/arch/mips/bcm63xx/cpu.c
|
||||
@@ -384,6 +384,14 @@ void __init bcm63xx_cpu_init(void)
|
||||
case BCM6362_CPU_ID:
|
||||
bcm63xx_regs_base = bcm6362_regs_base;
|
||||
bcm63xx_irqs = bcm6362_irqs;
|
||||
+
|
||||
+ if (varid == 1)
|
||||
+ bcm63xx_cpu_variant = BCM6362_CPU_ID;
|
||||
+ else if (varid == 2)
|
||||
+ bcm63xx_cpu_variant = BCM6361_CPU_ID;
|
||||
+ else
|
||||
+ pr_warn("unknown BCM6362 variant: %x\n", varid);
|
||||
+
|
||||
break;
|
||||
case BCM6368_CPU_ID:
|
||||
bcm63xx_regs_base = bcm6368_regs_base;
|
||||
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
|
||||
@@ -17,6 +17,7 @@
|
||||
#define BCM6345_CPU_ID 0x6345
|
||||
#define BCM6348_CPU_ID 0x6348
|
||||
#define BCM6358_CPU_ID 0x6358
|
||||
+#define BCM6361_CPU_ID 0x6361
|
||||
#define BCM6362_CPU_ID 0x6362
|
||||
#define BCM6368_CPU_ID 0x6368
|
||||
|
||||
@@ -99,6 +100,8 @@ static inline u16 __pure bcm63xx_get_cpu
|
||||
(bcm63xx_get_cpu_variant() == BCM6348_CPU_ID)
|
||||
#define BCMCPU_VARIANT_IS_6358() \
|
||||
(bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID)
|
||||
+#define BCMCPU_VARIANT_IS_6361() \
|
||||
+ (bcm63xx_get_cpu_variant() == BCM6361_CPU_ID)
|
||||
#define BCMCPU_VARIANT_IS_6362() \
|
||||
(bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
|
||||
#define BCMCPU_VARIANT_IS_6368() \
|
|
@ -1,48 +0,0 @@
|
|||
From 825cc67e56b5e624a05f6850a86d91508b786848 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Sat, 7 Dec 2013 14:36:56 +0100
|
||||
Subject: [PATCH 24/44] MIPS: BCM63XX: detect BCM6368 variants
|
||||
|
||||
The DSL-less BCM6368 variant BCM6367 uses a different chip id. Apart
|
||||
from missing DSL, there is no difference to BCM6368, so treat it such.
|
||||
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/cpu.c | 4 ++++
|
||||
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++
|
||||
2 files changed, 7 insertions(+)
|
||||
|
||||
--- a/arch/mips/bcm63xx/cpu.c
|
||||
+++ b/arch/mips/bcm63xx/cpu.c
|
||||
@@ -394,8 +394,12 @@ void __init bcm63xx_cpu_init(void)
|
||||
|
||||
break;
|
||||
case BCM6368_CPU_ID:
|
||||
+ case BCM6369_CPU_ID:
|
||||
bcm63xx_regs_base = bcm6368_regs_base;
|
||||
bcm63xx_irqs = bcm6368_irqs;
|
||||
+
|
||||
+ /* BCM6369 is a BCM6368 without xDSL, so treat it the same */
|
||||
+ bcm63xx_cpu_id = BCM6368_CPU_ID;
|
||||
break;
|
||||
default:
|
||||
panic("unsupported broadcom CPU %x", bcm63xx_cpu_id);
|
||||
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
|
||||
@@ -20,6 +20,7 @@
|
||||
#define BCM6361_CPU_ID 0x6361
|
||||
#define BCM6362_CPU_ID 0x6362
|
||||
#define BCM6368_CPU_ID 0x6368
|
||||
+#define BCM6369_CPU_ID 0x6369
|
||||
|
||||
void __init bcm63xx_cpu_init(void);
|
||||
u32 bcm63xx_get_cpu_variant(void);
|
||||
@@ -106,6 +107,8 @@ static inline u16 __pure bcm63xx_get_cpu
|
||||
(bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
|
||||
#define BCMCPU_VARIANT_IS_6368() \
|
||||
(bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
|
||||
+#define BCMCPU_VARIANT_IS_6369() \
|
||||
+ (bcm63xx_get_cpu_variant() == BCM6369_CPU_ID)
|
||||
|
||||
/*
|
||||
* While registers sets are (mostly) the same across 63xx CPU, base
|
|
@ -1,20 +0,0 @@
|
|||
From f67f8134b4537c8bbafe7e1975edfe808b813997 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Sun, 8 Dec 2013 03:05:54 +0100
|
||||
Subject: [PATCH 45/53] MIPS: BCM63XX: fix PCIe memory window size
|
||||
|
||||
---
|
||||
arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
|
||||
@@ -41,7 +41,7 @@
|
||||
BCM_CB_MEM_SIZE - 1)
|
||||
|
||||
#define BCM_PCIE_MEM_BASE_PA 0x10f00000
|
||||
-#define BCM_PCIE_MEM_SIZE (16 * 1024 * 1024)
|
||||
+#define BCM_PCIE_MEM_SIZE (1 * 1024 * 1024)
|
||||
#define BCM_PCIE_MEM_END_PA (BCM_PCIE_MEM_BASE_PA + \
|
||||
BCM_PCIE_MEM_SIZE - 1)
|
||||
|
|
@ -1,70 +0,0 @@
|
|||
From aa05464973bc176478af462ca7c53a9239c651d4 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Sun, 8 Dec 2013 03:13:06 +0100
|
||||
Subject: [PATCH 46/53] MIPS: BCM63XX: dynamically set the pcie memory windows
|
||||
|
||||
Different SoCs use different memory windows (and sizes), so don't
|
||||
hardcode it.
|
||||
---
|
||||
arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 8 ++++----
|
||||
arch/mips/pci/pci-bcm63xx.c | 15 ++++++++++-----
|
||||
2 files changed, 14 insertions(+), 9 deletions(-)
|
||||
|
||||
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
|
||||
@@ -40,10 +40,10 @@
|
||||
#define BCM_CB_MEM_END_PA (BCM_CB_MEM_BASE_PA + \
|
||||
BCM_CB_MEM_SIZE - 1)
|
||||
|
||||
-#define BCM_PCIE_MEM_BASE_PA 0x10f00000
|
||||
-#define BCM_PCIE_MEM_SIZE (1 * 1024 * 1024)
|
||||
-#define BCM_PCIE_MEM_END_PA (BCM_PCIE_MEM_BASE_PA + \
|
||||
- BCM_PCIE_MEM_SIZE - 1)
|
||||
+#define BCM_PCIE_MEM_BASE_PA_6328 0x10f00000
|
||||
+#define BCM_PCIE_MEM_SIZE_6328 (1 * 1024 * 1024)
|
||||
+#define BCM_PCIE_MEM_END_PA_6328 (BCM_PCIE_MEM_BASE_PA_6328 + \
|
||||
+ BCM_PCIE_MEM_SIZE_6328 - 1)
|
||||
|
||||
/*
|
||||
* Internal registers are accessed through KSEG3
|
||||
--- a/arch/mips/pci/pci-bcm63xx.c
|
||||
+++ b/arch/mips/pci/pci-bcm63xx.c
|
||||
@@ -77,8 +77,8 @@ struct pci_controller bcm63xx_cb_control
|
||||
|
||||
static struct resource bcm_pcie_mem_resource = {
|
||||
.name = "bcm63xx PCIe memory space",
|
||||
- .start = BCM_PCIE_MEM_BASE_PA,
|
||||
- .end = BCM_PCIE_MEM_END_PA,
|
||||
+ .start = 0,
|
||||
+ .end = 0,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
@@ -195,12 +195,12 @@ static int __init bcm63xx_register_pcie(
|
||||
bcm_pcie_writel(val, PCIE_CONFIG2_REG);
|
||||
|
||||
/* set bar0 to little endian */
|
||||
- val = (BCM_PCIE_MEM_BASE_PA >> 20) << BASEMASK_BASE_SHIFT;
|
||||
- val |= (BCM_PCIE_MEM_BASE_PA >> 20) << BASEMASK_MASK_SHIFT;
|
||||
+ val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT;
|
||||
+ val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT;
|
||||
val |= BASEMASK_REMAP_EN;
|
||||
bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG);
|
||||
|
||||
- val = (BCM_PCIE_MEM_BASE_PA >> 20) << REBASE_ADDR_BASE_SHIFT;
|
||||
+ val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT;
|
||||
bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG);
|
||||
|
||||
register_pci_controller(&bcm63xx_pcie_controller);
|
||||
@@ -334,6 +334,11 @@ static int __init bcm63xx_pci_init(void)
|
||||
if (!bcm63xx_pci_enabled)
|
||||
return -ENODEV;
|
||||
|
||||
+ if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
|
||||
+ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
|
||||
+ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
|
||||
+ }
|
||||
+
|
||||
switch (bcm63xx_get_cpu_id()) {
|
||||
case BCM6328_CPU_ID:
|
||||
case BCM6362_CPU_ID:
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue