Port0 is uplink/PD port (IDC)
Port1-3 are downink/PSE ports (IDC)
Port4 is admin port (RJ45)
* we only have 8 MByte flash
* we use the hardware LEDs for switch ports 1-5
The image boots and is able to establish links on both eth0 and eth1.
However, the LED support is not yet working as expected.
This patch fixes LED definitions for the DRAGINO2 board.
1. It renames the Router/USB led to System, as it is now marked "SYS" on the board.
2. It gives control of the LAN and WAN leds and some other GPIOs to Linux.
3. It fixes the active_low property for the LAN and WAN leds.
4. It sets up WLAN, LAN and WAN leds in the UCI defaults.
5. It allows usage of the System led by the diag.sh script, so it will be used to indicate boot and failsafe status.
Signed-off-by: Vittorio Gambaletta <openwrt@vittgam.net>
Backport of r42897
git-svn-id: svn://svn.openwrt.org/openwrt/branches/barrier_breaker@43867 3c298f89-4303-0410-b956-a3cf2f4a3e73
While the AR9331 has a gigabit MAC towards the internal switch, the
integrated PHYs however are only 100-base-tx capable. The existing code
however advertieses gigabit capability in the link status word. If you
attach such a PHY to a gigabit capable switch on the remote end, with
some probability it attempts to negotiate gigabit and fails, falling
baco to the AR9331 assuming a 10mbit half-duplex link. This has been
observed quite frequently with the Carambola2 and gigabit capable
switches.
In ath79_register_eth(), "pdata->has_gbit = 1;" is set unconditionally
for both AR9331 ethernet ports. This is most likely wrong. Despite the
two MAC IP cores being gigabit MACs, the MAC for eth1 is connected to a
100base-T PHY via MII. The has_gbit attribute is used in the ethernet
driver to determine the supported link modes.
So either pdata->has_gbit is not set to 1 anymore, or the ethernet
driver needs to be modified to determine the advertised link code word
on another criteria than pdata->has_gbit. This patch implements the
former solution.
Signed-off-by: Harald Welte <laforge@gnumonks.org>
Backport of r42432
git-svn-id: svn://svn.openwrt.org/openwrt/branches/barrier_breaker@42434 3c298f89-4303-0410-b956-a3cf2f4a3e73
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Backport of r42130
git-svn-id: svn://svn.openwrt.org/openwrt/branches/barrier_breaker@42393 3c298f89-4303-0410-b956-a3cf2f4a3e73
This sets the MAC address of the WLAN interface to the "official" primary MAC
address (the one on the label under the devices, and the one used with the stock
firmware). The MAC address used so far (primary-1) isn't even used at all with
the stock firmware, which sets (primary) on LAN and WLAN and (primary+1) on the
WAN interface (like OpenWrt does with this patch).
Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
Backport of r42193
git-svn-id: svn://svn.openwrt.org/openwrt/branches/barrier_breaker@42367 3c298f89-4303-0410-b956-a3cf2f4a3e73
The OpenMesh MR600(v1) can only enable the 2.4G WiFi PHY LED through the
mini-PCIe device. Not configuring the LED pin inside the platform data
makes it impossible to configure it through any standard OpenWrt tool.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
Backport of r42184
git-svn-id: svn://svn.openwrt.org/openwrt/branches/barrier_breaker@42363 3c298f89-4303-0410-b956-a3cf2f4a3e73
Change list:
* Remove button info on GPIO12, there is no button there.
* Remove nvram mtd partition, as it's not used for anything, saves 64k for user data.
Tested building for carambola2 target.
Signed-off-by: Mantas Pucka <mantas@8devices.com>
Backport of r41993
git-svn-id: svn://svn.openwrt.org/openwrt/branches/barrier_breaker@42013 3c298f89-4303-0410-b956-a3cf2f4a3e73
this caused factory resets when reboot was pressed
Signed-off-by: Brent Thomson <brentthomson@gmail.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Backport of r41932
git-svn-id: svn://svn.openwrt.org/openwrt/branches/barrier_breaker@41972 3c298f89-4303-0410-b956-a3cf2f4a3e73