--- a/gcc/config/mips/sync.md +++ b/gcc/config/mips/sync.md @@ -136,7 +136,7 @@ [(match_operand:SI 1 "register_operand" "d") (match_operand:SI 2 "register_operand" "d") (atomic_hiqi_op:SI (match_dup 0) - (match_operand:SI 3 "register_operand" "dJ"))] + (match_operand:SI 3 "reg_or_0_operand" "dJ"))] UNSPEC_SYNC_OLD_OP_12)) (clobber (match_scratch:SI 4 "=&d"))] "GENERATE_LL_SC" @@ -177,7 +177,7 @@ [(match_operand:SI 2 "register_operand" "d") (match_operand:SI 3 "register_operand" "d") (atomic_hiqi_op:SI (match_dup 0) - (match_operand:SI 4 "register_operand" "dJ"))] + (match_operand:SI 4 "reg_or_0_operand" "dJ"))] UNSPEC_SYNC_OLD_OP_12)) (clobber (match_scratch:SI 5 "=&d"))] "GENERATE_LL_SC" @@ -218,7 +218,7 @@ (match_operand:SI 2 "register_operand" "d") (match_operand:SI 3 "register_operand" "d") (atomic_hiqi_op:SI (match_dup 0) - (match_operand:SI 4 "register_operand" "dJ"))] + (match_operand:SI 4 "reg_or_0_operand" "dJ"))] UNSPEC_SYNC_NEW_OP_12)) (set (match_dup 1) (unspec_volatile:SI @@ -259,7 +259,7 @@ [(match_operand:SI 1 "register_operand" "d") (match_operand:SI 2 "register_operand" "d") (match_dup 0) - (match_operand:SI 3 "register_operand" "dJ")] + (match_operand:SI 3 "reg_or_0_operand" "dJ")] UNSPEC_SYNC_OLD_OP_12)) (clobber (match_scratch:SI 4 "=&d"))] "GENERATE_LL_SC" @@ -298,7 +298,7 @@ (unspec_volatile:SI [(match_operand:SI 2 "register_operand" "d") (match_operand:SI 3 "register_operand" "d") - (match_operand:SI 4 "register_operand" "dJ")] + (match_operand:SI 4 "reg_or_0_operand" "dJ")] UNSPEC_SYNC_OLD_OP_12)) (clobber (match_scratch:SI 5 "=&d"))] "GENERATE_LL_SC" @@ -337,7 +337,7 @@ [(match_operand:SI 1 "memory_operand" "+R") (match_operand:SI 2 "register_operand" "d") (match_operand:SI 3 "register_operand" "d") - (match_operand:SI 4 "register_operand" "dJ")] + (match_operand:SI 4 "reg_or_0_operand" "dJ")] UNSPEC_SYNC_NEW_OP_12)) (set (match_dup 1) (unspec_volatile:SI @@ -546,7 +546,7 @@ (set (match_dup 1) (unspec_volatile:SI [(match_operand:SI 2 "register_operand" "d") (match_operand:SI 3 "register_operand" "d") - (match_operand:SI 4 "arith_operand" "dJ")] + (match_operand:SI 4 "reg_or_0_operand" "dJ")] UNSPEC_SYNC_EXCHANGE_12))] "GENERATE_LL_SC" { return mips_output_sync_loop (insn, operands); }