From 1be15a87eea5f26fb24b6aac332530cd3e2d984e Mon Sep 17 00:00:00 2001 From: John Crispin Date: Sun, 14 Jul 2013 23:08:11 +0200 Subject: [PATCH 100/133] MIPS: use set_mode() to enable/disable the cevt-r4k irq Signed-off-by: John Crispin --- arch/mips/kernel/cevt-r4k.c | 39 ++++++++++++++++++++++++++------------- 1 file changed, 26 insertions(+), 13 deletions(-) --- a/arch/mips/kernel/cevt-r4k.c +++ b/arch/mips/kernel/cevt-r4k.c @@ -38,12 +38,6 @@ static int mips_next_event(unsigned long #endif /* CONFIG_MIPS_MT_SMTC */ -void mips_set_clock_mode(enum clock_event_mode mode, - struct clock_event_device *evt) -{ - /* Nothing to do ... */ -} - DEFINE_PER_CPU(struct clock_event_device, mips_clockevent_device); int cp0_timer_irq_installed; @@ -90,9 +84,38 @@ struct irqaction c0_compare_irqaction = .name = "timer", }; +void mips_set_clock_mode(enum clock_event_mode mode, + struct clock_event_device *evt) +{ +#ifdef CONFIG_CEVT_SYSTICK_QUIRK + switch (mode) { + case CLOCK_EVT_MODE_ONESHOT: + if (cp0_timer_irq_installed) + break; + + cp0_timer_irq_installed = 1; + + setup_irq(evt->irq, &c0_compare_irqaction); + break; + + case CLOCK_EVT_MODE_SHUTDOWN: + if (!cp0_timer_irq_installed) + break; + + cp0_timer_irq_installed = 0; + free_irq(evt->irq, &c0_compare_irqaction); + break; + + default: + pr_err("Unhandeled mips clock_mode\n"); + break; + } +#endif +} void mips_event_handler(struct clock_event_device *dev) { + } /* @@ -215,12 +238,14 @@ int __cpuinit r4k_clockevent_init(void) #endif clockevents_register_device(cd); +#ifndef CONFIG_CEVT_SYSTICK_QUIRK if (cp0_timer_irq_installed) return 0; cp0_timer_irq_installed = 1; setup_irq(irq, &c0_compare_irqaction); +#endif return 0; }