70 lines
1.4 KiB
Diff
70 lines
1.4 KiB
Diff
--- a/arch/arm/Kconfig
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+++ b/arch/arm/Kconfig
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@@ -365,6 +365,7 @@ config ARCH_CNS3XXX
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select MIGHT_HAVE_CACHE_L2X0
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select MIGHT_HAVE_PCI
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select PCI_DOMAINS if PCI
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+ select CLKDEV_LOOKUP
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help
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Support for Cavium Networks CNS3XXX platform.
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--- a/arch/arm/mach-cns3xxx/core.c
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+++ b/arch/arm/mach-cns3xxx/core.c
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@@ -9,8 +9,11 @@
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*/
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#include <linux/init.h>
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+#include <linux/export.h>
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#include <linux/interrupt.h>
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#include <linux/clockchips.h>
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+#include <linux/clk.h>
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+#include <linux/clkdev.h>
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#include <linux/io.h>
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#include <asm/mach/map.h>
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#include <asm/mach/time.h>
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@@ -20,6 +23,10 @@
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#include <mach/cns3xxx.h>
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#include "core.h"
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+struct clk {
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+ unsigned long rate;
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+};
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+
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static struct map_desc cns3xxx_io_desc[] __initdata = {
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{
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.virtual = CNS3XXX_TC11MP_SCU_BASE_VIRT,
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@@ -277,3 +284,33 @@ void __init cns3xxx_l2x0_init(void)
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}
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#endif /* CONFIG_CACHE_L2X0 */
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+
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+int clk_enable(struct clk *clk)
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+{
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+ return 0;
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+}
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+EXPORT_SYMBOL(clk_enable);
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+
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+void clk_disable(struct clk *clk)
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+{
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+}
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+EXPORT_SYMBOL(clk_disable);
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+
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+unsigned long clk_get_rate(struct clk *clk)
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+{
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+ return clk->rate;
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+}
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+EXPORT_SYMBOL(clk_get_rate);
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+
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+static struct clk_lookup cns3xxx_clocks[] = {
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+ {
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+ /* TODO */
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+ },
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+};
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+
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+int __init cns3xxx_clocks_init(void)
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+{
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+ clkdev_add_table(cns3xxx_clocks, ARRAY_SIZE(cns3xxx_clocks));
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+ return 0;
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+}
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+postcore_initcall(cns3xxx_clocks_init);
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