2009-10-25 09:07:11 +00:00
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#include <common.h>
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#include <gpio.h>
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#include <init.h>
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#include <asm/hardware.h>
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#include <mach/at91_pmc.h>
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#include "generic.h"
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#include "clock.h"
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/* --------------------------------------------------------------------
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* Clocks
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* -------------------------------------------------------------------- */
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/*
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* The peripheral clocks.
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*/
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static struct clk pioA_clk = {
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.name = "pioA_clk",
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.pmc_mask = 1 << AT91SAM9261_ID_PIOA,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk pioB_clk = {
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.name = "pioB_clk",
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.pmc_mask = 1 << AT91SAM9261_ID_PIOB,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk pioC_clk = {
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.name = "pioC_clk",
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.pmc_mask = 1 << AT91SAM9261_ID_PIOC,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk usart0_clk = {
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.name = "usart0_clk",
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.pmc_mask = 1 << AT91SAM9261_ID_US0,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk usart1_clk = {
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.name = "usart1_clk",
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.pmc_mask = 1 << AT91SAM9261_ID_US1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk usart2_clk = {
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.name = "usart2_clk",
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.pmc_mask = 1 << AT91SAM9261_ID_US2,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk mmc_clk = {
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.name = "mci_clk",
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.pmc_mask = 1 << AT91SAM9261_ID_MCI,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk udc_clk = {
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.name = "udc_clk",
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.pmc_mask = 1 << AT91SAM9261_ID_UDP,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk twi_clk = {
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.name = "twi_clk",
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.pmc_mask = 1 << AT91SAM9261_ID_TWI,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk spi0_clk = {
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.name = "spi0_clk",
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.pmc_mask = 1 << AT91SAM9261_ID_SPI0,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk spi1_clk = {
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.name = "spi1_clk",
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.pmc_mask = 1 << AT91SAM9261_ID_SPI1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ssc0_clk = {
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.name = "ssc0_clk",
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.pmc_mask = 1 << AT91SAM9261_ID_SSC0,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ssc1_clk = {
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.name = "ssc1_clk",
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.pmc_mask = 1 << AT91SAM9261_ID_SSC1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ssc2_clk = {
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.name = "ssc2_clk",
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.pmc_mask = 1 << AT91SAM9261_ID_SSC2,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk tc0_clk = {
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.name = "tc0_clk",
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.pmc_mask = 1 << AT91SAM9261_ID_TC0,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk tc1_clk = {
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.name = "tc1_clk",
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.pmc_mask = 1 << AT91SAM9261_ID_TC1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk tc2_clk = {
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.name = "tc2_clk",
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.pmc_mask = 1 << AT91SAM9261_ID_TC2,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ohci_clk = {
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.name = "ohci_clk",
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.pmc_mask = 1 << AT91SAM9261_ID_UHP,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk lcdc_clk = {
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.name = "lcdc_clk",
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.pmc_mask = 1 << AT91SAM9261_ID_LCDC,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk *periph_clocks[] = {
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&pioA_clk,
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&pioB_clk,
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&pioC_clk,
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&usart0_clk,
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&usart1_clk,
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&usart2_clk,
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&mmc_clk,
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&udc_clk,
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&twi_clk,
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&spi0_clk,
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&spi1_clk,
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&ssc0_clk,
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&ssc1_clk,
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&ssc2_clk,
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&tc0_clk,
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&tc1_clk,
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&tc2_clk,
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&ohci_clk,
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&lcdc_clk,
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// irq0 .. irq2
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};
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2011-09-15 16:57:05 +00:00
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static struct clk_lookup periph_clocks_lookups[] = {
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CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi0", &spi0_clk),
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CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi1", &spi1_clk),
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};
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2011-08-08 21:17:12 +00:00
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static struct clk_lookup usart_clocks_lookups[] = {
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CLKDEV_CON_DEV_ID("usart", "atmel_usart0", &mck),
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CLKDEV_CON_DEV_ID("usart", "atmel_usart1", &usart0_clk),
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CLKDEV_CON_DEV_ID("usart", "atmel_usart2", &usart1_clk),
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CLKDEV_CON_DEV_ID("usart", "atmel_usart3", &usart2_clk),
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};
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2009-10-25 09:07:11 +00:00
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/*
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* The four programmable clocks.
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* You must configure pin multiplexing to bring these signals out.
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*/
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static struct clk pck0 = {
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.name = "pck0",
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.pmc_mask = AT91_PMC_PCK0,
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.type = CLK_TYPE_PROGRAMMABLE,
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.id = 0,
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};
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static struct clk pck1 = {
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.name = "pck1",
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.pmc_mask = AT91_PMC_PCK1,
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.type = CLK_TYPE_PROGRAMMABLE,
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.id = 1,
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};
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static struct clk pck2 = {
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.name = "pck2",
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.pmc_mask = AT91_PMC_PCK2,
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.type = CLK_TYPE_PROGRAMMABLE,
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.id = 2,
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};
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static struct clk pck3 = {
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.name = "pck3",
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.pmc_mask = AT91_PMC_PCK3,
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.type = CLK_TYPE_PROGRAMMABLE,
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.id = 3,
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};
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/* HClocks */
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static struct clk hck0 = {
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.name = "hck0",
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.pmc_mask = AT91_PMC_HCK0,
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.type = CLK_TYPE_SYSTEM,
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.id = 0,
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};
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static struct clk hck1 = {
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.name = "hck1",
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.pmc_mask = AT91_PMC_HCK1,
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.type = CLK_TYPE_SYSTEM,
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.id = 1,
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};
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static void at91sam9261_register_clocks(void)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
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clk_register(periph_clocks[i]);
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2011-09-15 16:57:05 +00:00
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clkdev_add_table(periph_clocks_lookups,
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ARRAY_SIZE(periph_clocks_lookups));
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2011-08-08 21:17:12 +00:00
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clkdev_add_table(usart_clocks_lookups,
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ARRAY_SIZE(usart_clocks_lookups));
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2009-10-25 09:07:11 +00:00
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clk_register(&pck0);
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clk_register(&pck1);
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clk_register(&pck2);
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clk_register(&pck3);
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clk_register(&hck0);
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clk_register(&hck1);
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}
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/* --------------------------------------------------------------------
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* GPIO
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* -------------------------------------------------------------------- */
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static struct at91_gpio_bank at91sam9261_gpio[] = {
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{
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2011-12-31 15:21:34 +00:00
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.regbase = IOMEM(AT91_BASE_PIOA),
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2009-10-25 09:07:11 +00:00
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.clock = &pioA_clk,
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}, {
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2011-12-31 15:21:34 +00:00
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.regbase = IOMEM(AT91_BASE_PIOB),
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2009-10-25 09:07:11 +00:00
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.clock = &pioB_clk,
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}, {
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2011-12-31 15:21:34 +00:00
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.regbase = IOMEM(AT91_BASE_PIOC),
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2009-10-25 09:07:11 +00:00
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.clock = &pioC_clk,
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}
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};
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static int at91sam9261_initialize(void)
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{
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/* Init clock subsystem */
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at91_clock_init(AT91_MAIN_CLOCK);
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/* Register the processor-specific clocks */
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at91sam9261_register_clocks();
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/* Register GPIO subsystem */
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at91_gpio_init(at91sam9261_gpio, 3);
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return 0;
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}
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core_initcall(at91sam9261_initialize);
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