2008-06-04 07:31:15 +00:00
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/*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Alex Zuepke <azu@sysgo.de>
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*
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* (C) Copyright 2002
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* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <common.h>
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#include <init.h>
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#include <clock.h>
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#include <asm/hardware.h>
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2009-10-22 12:21:25 +00:00
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#include <mach/at91_pit.h>
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#include <mach/io.h>
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2011-09-22 17:02:57 +00:00
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#include <io.h>
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2012-11-23 15:55:01 +00:00
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#include <linux/clk.h>
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2012-12-28 19:16:03 +00:00
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#include <linux/err.h>
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2008-06-04 07:31:15 +00:00
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2012-12-28 19:16:09 +00:00
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#define PIT_CPIV(x) ((x) & AT91_PIT_CPIV)
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#define pit_write(reg, val) __raw_writel(val, pit_base + reg)
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#define pit_read(reg) __raw_readl(pit_base + reg)
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static __iomem void *pit_base;
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2008-06-04 07:31:15 +00:00
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uint64_t at91sam9_clocksource_read(void)
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{
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2012-12-28 19:16:09 +00:00
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return pit_read(AT91_PIT_PIIR);
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2008-06-04 07:31:15 +00:00
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}
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static struct clocksource cs = {
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.read = at91sam9_clocksource_read,
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2010-11-29 14:14:04 +00:00
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.mask = CLOCKSOURCE_MASK(32),
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2008-06-04 07:31:15 +00:00
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.shift = 10,
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};
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2012-12-28 19:16:09 +00:00
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static void at91_pit_stop(void)
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{
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/* Disable timer and irqs */
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pit_write(AT91_PIT_MR, 0);
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/* Clear any pending interrupts, wait for PIT to stop counting */
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while (PIT_CPIV(pit_read(AT91_PIT_PIVR)) != 0);
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}
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static void at91sam926x_pit_reset(void)
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{
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at91_pit_stop();
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/* Start PIT but don't enable IRQ */
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pit_write(AT91_PIT_MR, 0xfffff | AT91_PIT_PITEN);
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}
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static int at91_pit_probe(struct device_d *dev)
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2008-06-04 07:31:15 +00:00
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{
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2012-12-28 19:16:03 +00:00
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struct clk *clk;
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2012-11-23 15:55:01 +00:00
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u32 pit_rate;
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2012-12-28 19:16:03 +00:00
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int ret;
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2012-11-23 15:55:01 +00:00
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2012-12-28 19:16:09 +00:00
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clk = clk_get(dev, NULL);
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2012-12-28 19:16:03 +00:00
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if (IS_ERR(clk)) {
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ret = PTR_ERR(clk);
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2012-12-28 19:16:09 +00:00
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dev_err(dev, "clock not found: %d\n", ret);
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2012-12-28 19:16:03 +00:00
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return ret;
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}
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2008-06-04 07:31:15 +00:00
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2012-12-28 19:16:03 +00:00
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ret = clk_enable(clk);
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if (ret < 0) {
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2012-12-28 19:16:09 +00:00
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dev_err(dev, "clock failed to enable: %d\n", ret);
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2012-12-28 19:16:03 +00:00
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clk_put(clk);
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return ret;
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}
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2012-12-28 19:16:09 +00:00
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pit_base = dev_request_mem_region(dev, 0);
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2012-12-28 19:16:03 +00:00
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pit_rate = clk_get_rate(clk) / 16;
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2012-11-23 15:55:01 +00:00
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2012-12-28 19:16:09 +00:00
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at91sam926x_pit_reset();
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2008-06-04 07:31:15 +00:00
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2012-11-23 15:55:01 +00:00
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cs.mult = clocksource_hz2mult(pit_rate, cs.shift);
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2008-06-04 07:31:15 +00:00
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init_clock(&cs);
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return 0;
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}
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2012-12-28 19:16:09 +00:00
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static struct driver_d at91_pit_driver = {
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.name = "at91-pit",
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.probe = at91_pit_probe,
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};
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static int at91_pit_init(void)
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{
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return platform_driver_register(&at91_pit_driver);
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}
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postcore_initcall(at91_pit_init);
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