2007-07-05 16:01:59 +00:00
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#include <common.h>
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#include <command.h>
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2007-07-05 16:01:58 +00:00
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/* read co-processor 15, register #1 (control register) */
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static unsigned long read_p15_c1 (void)
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{
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unsigned long value;
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__asm__ __volatile__(
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"mrc p15, 0, %0, c1, c0, 0 @ read control reg\n"
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: "=r" (value)
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:
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: "memory");
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#ifdef MMU_DEBUG
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printf ("p15/c1 is = %08lx\n", value);
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#endif
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return value;
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}
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/* write to co-processor 15, register #1 (control register) */
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static void write_p15_c1 (unsigned long value)
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{
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#ifdef MMU_DEBUG
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printf ("write %08lx to p15/c1\n", value);
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#endif
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__asm__ __volatile__(
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"mcr p15, 0, %0, c1, c0, 0 @ write it back\n"
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:
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: "r" (value)
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: "memory");
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read_p15_c1 ();
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}
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static void cp_delay (void)
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{
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volatile int i;
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/* copro seems to need some delay between reading and writing */
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for (i = 0; i < 100; i++);
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}
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#define C1_MMU (1<<0) /* mmu off/on */
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#define C1_ALIGN (1<<1) /* alignment faults off/on */
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#define C1_DC (1<<2) /* dcache off/on */
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#define C1_BIG_ENDIAN (1<<7) /* big endian off/on */
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#define C1_SYS_PROT (1<<8) /* system protection */
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#define C1_ROM_PROT (1<<9) /* ROM protection */
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#define C1_IC (1<<12) /* icache off/on */
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#define C1_HIGH_VECTORS (1<<13) /* location of vectors: low/high addresses */
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void icache_enable (void)
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{
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ulong reg;
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reg = read_p15_c1 (); /* get control reg. */
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cp_delay ();
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write_p15_c1 (reg | C1_IC);
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}
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void icache_disable (void)
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{
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ulong reg;
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reg = read_p15_c1 ();
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cp_delay ();
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write_p15_c1 (reg & ~C1_IC);
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}
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int icache_status (void)
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{
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return (read_p15_c1 () & C1_IC) != 0;
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}
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int cleanup_before_linux (void)
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{
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2007-07-05 16:01:59 +00:00
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int i;
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2007-07-05 16:01:58 +00:00
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/*
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* this function is called just before we call linux
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* it prepares the processor for linux
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*/
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disable_interrupts ();
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/*
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* we never enable dcache so we do not need to disable
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* it. Linux can be called with icache enabled, so just
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* do nothing here
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*/
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/* flush I/D-cache */
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i = 0;
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asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i));
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return (0);
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}
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#ifdef CONFIG_USE_IRQ
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static int cpu_init (void)
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{
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/*
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* setup up stacks if necessary
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*/
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IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
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FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
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return 0;
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}
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core_initcall(cpu_init);
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#endif
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2007-07-05 16:02:11 +00:00
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void do_reset (void)
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2007-07-05 16:01:58 +00:00
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{
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2007-07-05 16:01:59 +00:00
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disable_interrupts();
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reset_cpu(0);
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2007-07-05 16:01:58 +00:00
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/* NOT REACHED */
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}
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