2011-06-06 17:32:06 +00:00
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/*
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* Atmel AT91 MCI driver
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*
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* Copyright (C) 2011 Hubert Feurstein <h.feurstein@gmail.com>
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*
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* based on imx.c by:
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* Copyright (C) 2009 Ilya Yanok, <yanok@emcraft.com>
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* Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
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* Copyright (C) 2006 Pavel Pisa, PiKRON <ppisa@pikron.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <common.h>
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#include <init.h>
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#include <mci.h>
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#include <errno.h>
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#include <clock.h>
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#include <gpio.h>
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2011-09-22 17:02:57 +00:00
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#include <io.h>
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2011-06-06 17:32:06 +00:00
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#include <mach/board.h>
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#include <linux/clk.h>
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2011-09-09 11:46:48 +00:00
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#include <linux/err.h>
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2011-06-06 17:32:06 +00:00
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#include "at91_mci.h"
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struct atmel_mci_host {
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struct mci_host mci;
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void __iomem *base;
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struct device_d *hw_dev;
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struct clk *clk;
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u32 datasize;
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struct mci_cmd *cmd;
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struct mci_data *data;
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2012-01-13 15:55:24 +00:00
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unsigned slot_b;
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2011-06-06 17:32:06 +00:00
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};
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#define to_mci_host(mci) container_of(mci, struct atmel_mci_host, mci)
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#define STATUS_ERROR_MASK (AT91_MCI_RINDE \
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| AT91_MCI_RDIRE \
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| AT91_MCI_RCRCE \
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| AT91_MCI_RENDE \
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| AT91_MCI_RTOE \
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| AT91_MCI_DCRCE \
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| AT91_MCI_DTOE \
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| AT91_MCI_OVRE \
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| AT91_MCI_UNRE)
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static inline u32 atmel_mci_readl(struct atmel_mci_host *host, u32 offset)
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{
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return readl(host->base + offset);
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}
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static inline void atmel_mci_writel(struct atmel_mci_host *host, u32 offset,
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u32 value)
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{
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writel(value, host->base + offset);
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}
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static void atmel_mci_reset(struct atmel_mci_host *host)
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{
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atmel_mci_writel(host, AT91_MCI_CR, AT91_MCI_SWRST | AT91_MCI_MCIDIS);
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atmel_mci_writel(host, AT91_MCI_DTOR, 0x7f);
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atmel_mci_writel(host, AT91_MCI_IDR, ~0UL);
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}
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static void atmel_set_clk_rate(struct atmel_mci_host *host,
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unsigned int clk_ios)
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{
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unsigned int divider;
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unsigned int clk_in = clk_get_rate(host->clk);
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if (clk_ios > 0) {
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divider = (clk_in / clk_ios) / 2;
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if (divider > 0)
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divider -= 1;
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}
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if (clk_ios == 0 || divider > 255)
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divider = 255;
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dev_dbg(host->hw_dev, "atmel_set_clk_rate: clkIn=%d clkIos=%d divider=%d\n",
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clk_in, clk_ios, divider);
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atmel_mci_writel(host, AT91_MCI_MR, (AT91_MCI_CLKDIV & divider)
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| AT91_MCI_RDPROOF | AT91_MCI_WRPROOF);
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}
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static int atmel_poll_status(struct atmel_mci_host *host, u32 mask)
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{
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u32 stat;
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uint64_t start = get_time_ns();
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do {
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stat = atmel_mci_readl(host, AT91_MCI_SR);
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if (stat & STATUS_ERROR_MASK)
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return stat;
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if (is_timeout(start, SECOND)) {
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dev_err(host->hw_dev, "timeout\n");
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return AT91_MCI_RTOE | stat;
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}
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if (stat & mask)
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return 0;
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} while (1);
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}
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static int atmel_pull(struct atmel_mci_host *host, void *_buf, int bytes)
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{
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unsigned int stat;
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u32 *buf = _buf;
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while (bytes > 3) {
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stat = atmel_poll_status(host, AT91_MCI_RXRDY);
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if (stat)
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return stat;
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*buf++ = atmel_mci_readl(host, AT91_MCI_RDR);
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bytes -= 4;
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}
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if (WARN_ON(bytes))
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return -EIO;
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return 0;
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}
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#ifdef CONFIG_MCI_WRITE
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static int atmel_push(struct atmel_mci_host *host, const void *_buf, int bytes)
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{
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unsigned int stat;
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const u32 *buf = _buf;
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while (bytes > 3) {
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stat = atmel_poll_status(host, AT91_MCI_TXRDY);
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if (stat)
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return stat;
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atmel_mci_writel(host, AT91_MCI_TDR, *buf++);
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bytes -= 4;
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}
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stat = atmel_poll_status(host, AT91_MCI_TXRDY);
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if (stat)
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return stat;
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if (WARN_ON(bytes))
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return -EIO;
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return 0;
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}
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#endif /* CONFIG_MCI_WRITE */
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static int atmel_transfer_data(struct atmel_mci_host *host)
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{
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struct mci_data *data = host->data;
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int stat;
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unsigned long length;
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length = data->blocks * data->blocksize;
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host->datasize = 0;
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if (data->flags & MMC_DATA_READ) {
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stat = atmel_pull(host, data->dest, length);
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if (stat)
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return stat;
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stat = atmel_poll_status(host, AT91_MCI_NOTBUSY);
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if (stat)
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return stat;
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host->datasize += length;
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} else {
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#ifdef CONFIG_MCI_WRITE
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stat = atmel_push(host, (const void *)(data->src), length);
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if (stat)
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return stat;
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host->datasize += length;
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stat = atmel_poll_status(host, AT91_MCI_NOTBUSY);
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if (stat)
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return stat;
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#endif /* CONFIG_MCI_WRITE */
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}
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return 0;
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}
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static void atmel_finish_request(struct atmel_mci_host *host)
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{
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host->cmd = NULL;
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host->data = NULL;
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}
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static int atmel_finish_data(struct atmel_mci_host *host, unsigned int stat)
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{
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int data_error = 0;
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if (stat & STATUS_ERROR_MASK) {
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dev_err(host->hw_dev, "request failed (status=0x%08x)\n", stat);
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if (stat & AT91_MCI_DCRCE)
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data_error = -EILSEQ;
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else if (stat & (AT91_MCI_RTOE | AT91_MCI_DTOE))
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data_error = -ETIMEDOUT;
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else
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data_error = -EIO;
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}
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host->data = NULL;
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return data_error;
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}
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static void atmel_setup_data(struct atmel_mci_host *host, struct mci_data *data)
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{
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unsigned int nob = data->blocks;
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unsigned int blksz = data->blocksize;
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unsigned int datasize = nob * blksz;
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BUG_ON(data->blocksize & 3);
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BUG_ON(nob == 0);
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host->data = data;
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dev_dbg(host->hw_dev, "atmel_setup_data: nob=%d blksz=%d\n",
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nob, blksz);
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atmel_mci_writel(host, AT91_MCI_BLKR, AT91_MCI_BLKR_BCNT(nob)
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| AT91_MCI_BLKR_BLKLEN(blksz));
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host->datasize = datasize;
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}
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static int atmel_read_response(struct atmel_mci_host *host, unsigned int stat)
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{
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struct mci_cmd *cmd = host->cmd;
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int i;
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u32 *resp = (u32 *)cmd->response;
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if (!cmd)
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return 0;
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if (stat & (AT91_MCI_RTOE | AT91_MCI_DTOE)) {
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dev_err(host->hw_dev, "command/data timeout\n");
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return -ETIMEDOUT;
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} else if ((stat & AT91_MCI_RCRCE) && (cmd->resp_type & MMC_RSP_CRC)) {
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dev_err(host->hw_dev, "cmd crc error\n");
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return -EILSEQ;
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}
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if (cmd->resp_type & MMC_RSP_PRESENT) {
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if (cmd->resp_type & MMC_RSP_136) {
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for (i = 0; i < 4; i++)
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resp[i] = atmel_mci_readl(host, AT91_MCI_RSPR(0));
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} else {
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resp[0] = atmel_mci_readl(host, AT91_MCI_RSPR(0));
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}
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}
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return 0;
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}
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static int atmel_cmd_done(struct atmel_mci_host *host, unsigned int stat)
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{
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int datastat;
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int ret;
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ret = atmel_read_response(host, stat);
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if (ret) {
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atmel_finish_request(host);
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return ret;
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}
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if (!host->data) {
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atmel_finish_request(host);
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return 0;
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}
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datastat = atmel_transfer_data(host);
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ret = atmel_finish_data(host, datastat);
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atmel_finish_request(host);
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return ret;
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}
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static int atmel_start_cmd(struct atmel_mci_host *host, struct mci_cmd *cmd,
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unsigned int cmdat)
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{
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unsigned flags = 0;
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unsigned cmdval = 0;
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if (host->cmd != NULL)
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dev_err(host->hw_dev, "error!\n");
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if ((atmel_mci_readl(host, AT91_MCI_SR) & AT91_MCI_CMDRDY) == 0) {
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dev_err(host->hw_dev, "mci not ready!\n");
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return -EBUSY;
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}
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host->cmd = cmd;
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cmdval = AT91_MCI_CMDNB & cmd->cmdidx;
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switch (cmd->resp_type) {
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case MMC_RSP_R1: /* short CRC, OPCODE */
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case MMC_RSP_R1b:/* short CRC, OPCODE, BUSY */
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flags |= AT91_MCI_RSPTYP_48;
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break;
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case MMC_RSP_R2: /* long 136 bit + CRC */
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flags |= AT91_MCI_RSPTYP_136;
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break;
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case MMC_RSP_R3: /* short */
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flags |= AT91_MCI_RSPTYP_48;
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break;
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case MMC_RSP_NONE:
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flags |= AT91_MCI_RSPTYP_NONE;
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break;
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default:
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dev_err(host->hw_dev, "unhandled response type 0x%x\n",
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cmd->resp_type);
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return -EINVAL;
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}
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cmdval |= AT91_MCI_RSPTYP & flags;
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cmdval |= cmdat & ~(AT91_MCI_CMDNB | AT91_MCI_RSPTYP);
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atmel_mci_writel(host, AT91_MCI_ARGR, cmd->cmdarg);
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atmel_mci_writel(host, AT91_MCI_CMDR, cmdval);
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return 0;
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}
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/** init the host interface */
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static int mci_reset(struct mci_host *mci, struct device_d *mci_dev)
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{
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int ret;
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struct atmel_mci_host *host = to_mci_host(mci);
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struct atmel_mci_platform_data *pd = host->hw_dev->platform_data;
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ret = gpio_get_value(pd->detect_pin);
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dev_dbg(host->hw_dev, "card %sdetected\n", ret != 0 ? "not " : "");
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if (pd->detect_pin && ret == 1)
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return -ENODEV;
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clk_enable(host->clk);
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atmel_mci_reset(host);
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return 0;
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}
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/** change host interface settings */
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2012-02-08 15:25:13 +00:00
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static void mci_set_ios(struct mci_host *mci, struct mci_ios *ios)
|
2011-06-06 17:32:06 +00:00
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{
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struct atmel_mci_host *host = to_mci_host(mci);
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dev_dbg(host->hw_dev, "atmel_mci_set_ios: bus_width=%d clk=%d\n",
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2012-02-08 14:49:14 +00:00
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ios->bus_width, ios->clock);
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2011-06-06 17:32:06 +00:00
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2012-02-08 14:49:14 +00:00
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switch (ios->bus_width) {
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case MMC_BUS_WIDTH_4:
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2011-06-06 17:32:06 +00:00
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atmel_mci_writel(host, AT91_MCI_SDCR, AT91_MCI_SDCBUS_4BIT);
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break;
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2012-02-08 14:49:14 +00:00
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|
|
case MMC_BUS_WIDTH_8:
|
2011-06-06 17:32:06 +00:00
|
|
|
atmel_mci_writel(host, AT91_MCI_SDCR, AT91_MCI_SDCBUS_8BIT);
|
|
|
|
break;
|
2012-02-08 14:49:14 +00:00
|
|
|
case MMC_BUS_WIDTH_1:
|
2011-06-06 17:32:06 +00:00
|
|
|
atmel_mci_writel(host, AT91_MCI_SDCR, AT91_MCI_SDCBUS_1BIT);
|
|
|
|
break;
|
2012-02-08 14:49:14 +00:00
|
|
|
default:
|
|
|
|
return;
|
2011-06-06 17:32:06 +00:00
|
|
|
}
|
2011-12-06 16:10:12 +00:00
|
|
|
atmel_mci_writel(host, AT91_MCI_SDCR, atmel_mci_readl(host, AT91_MCI_SDCR)
|
2012-01-13 15:55:24 +00:00
|
|
|
| host->slot_b);
|
2011-06-06 17:32:06 +00:00
|
|
|
|
2012-02-08 14:49:14 +00:00
|
|
|
if (ios->clock) {
|
|
|
|
atmel_set_clk_rate(host, ios->clock);
|
2011-06-06 17:32:06 +00:00
|
|
|
atmel_mci_writel(host, AT91_MCI_CR, AT91_MCI_MCIEN
|
|
|
|
);
|
|
|
|
} else {
|
|
|
|
atmel_mci_writel(host, AT91_MCI_CR, AT91_MCI_MCIDIS);
|
|
|
|
}
|
|
|
|
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/** handle a command */
|
|
|
|
static int mci_request(struct mci_host *mci, struct mci_cmd *cmd, struct mci_data *data)
|
|
|
|
{
|
|
|
|
struct atmel_mci_host *host = to_mci_host(mci);
|
|
|
|
u32 stat, cmdat = 0;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (cmd->resp_type != MMC_RSP_NONE)
|
|
|
|
cmdat |= AT91_MCI_MAXLAT;
|
|
|
|
|
|
|
|
if (data) {
|
|
|
|
atmel_setup_data(host, data);
|
|
|
|
|
|
|
|
cmdat |= AT91_MCI_TRCMD_START | AT91_MCI_TRTYP_MULTIPLE;
|
|
|
|
|
|
|
|
if (data->flags & MMC_DATA_READ)
|
|
|
|
cmdat |= AT91_MCI_TRDIR_RX;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = atmel_start_cmd(host, cmd, cmdat);
|
|
|
|
if (ret) {
|
|
|
|
atmel_finish_request(host);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
stat = atmel_poll_status(host, AT91_MCI_CMDRDY);
|
|
|
|
return atmel_cmd_done(host, stat);
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_MCI_INFO
|
|
|
|
static void mci_info(struct device_d *mci_dev)
|
|
|
|
{
|
|
|
|
struct atmel_mci_host *host = mci_dev->priv;
|
|
|
|
struct atmel_mci_platform_data *pd = host->hw_dev->platform_data;
|
|
|
|
|
|
|
|
printf(" Bus data width: %d bit\n", host->mci.bus_width);
|
|
|
|
|
|
|
|
printf(" Bus frequency: %u Hz\n", host->mci.clock);
|
|
|
|
printf(" Frequency limits: ");
|
|
|
|
if (host->mci.f_min == 0)
|
|
|
|
printf("no lower limit ");
|
|
|
|
else
|
|
|
|
printf("%u Hz lower limit ", host->mci.f_min);
|
|
|
|
if (host->mci.f_max == 0)
|
|
|
|
printf("- no upper limit");
|
|
|
|
else
|
|
|
|
printf("- %u Hz upper limit", host->mci.f_max);
|
|
|
|
|
|
|
|
printf("\n Card detection support: %s\n",
|
|
|
|
pd->detect_pin != 0 ? "yes" : "no");
|
|
|
|
|
|
|
|
}
|
|
|
|
#endif /* CONFIG_MCI_INFO */
|
|
|
|
|
|
|
|
static int mci_probe(struct device_d *hw_dev)
|
|
|
|
{
|
|
|
|
unsigned long clk_rate;
|
|
|
|
struct atmel_mci_host *host;
|
|
|
|
struct atmel_mci_platform_data *pd = hw_dev->platform_data;
|
|
|
|
|
|
|
|
if (!pd) {
|
|
|
|
dev_err(hw_dev, "missing platform data\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
host = xzalloc(sizeof(*host));
|
|
|
|
host->mci.send_cmd = mci_request;
|
|
|
|
host->mci.set_ios = mci_set_ios;
|
|
|
|
host->mci.init = mci_reset;
|
2011-08-15 07:44:04 +00:00
|
|
|
host->mci.hw_dev = hw_dev;
|
2011-06-06 17:32:06 +00:00
|
|
|
|
|
|
|
host->mci.host_caps = pd->host_caps;
|
2011-06-21 22:10:16 +00:00
|
|
|
if (pd->bus_width >= 4)
|
2011-06-06 17:32:06 +00:00
|
|
|
host->mci.host_caps |= MMC_MODE_4BIT;
|
2011-06-21 22:10:16 +00:00
|
|
|
if (pd->bus_width == 8)
|
2011-06-06 17:32:06 +00:00
|
|
|
host->mci.host_caps |= MMC_MODE_8BIT;
|
2012-01-13 15:55:24 +00:00
|
|
|
host->slot_b = pd->slot_b;
|
2011-06-06 17:32:06 +00:00
|
|
|
|
2011-07-19 17:17:23 +00:00
|
|
|
host->base = dev_request_mem_region(hw_dev, 0);
|
2011-06-06 17:32:06 +00:00
|
|
|
host->hw_dev = hw_dev;
|
|
|
|
hw_dev->priv = host;
|
|
|
|
host->clk = clk_get(hw_dev, "mci_clk");
|
2011-09-09 11:46:48 +00:00
|
|
|
if (IS_ERR(host->clk)) {
|
2011-06-06 17:32:06 +00:00
|
|
|
dev_err(hw_dev, "no mci_clk\n");
|
2011-09-09 11:46:48 +00:00
|
|
|
return PTR_ERR(host->clk);
|
2011-06-06 17:32:06 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
clk_rate = clk_get_rate(host->clk);
|
|
|
|
|
|
|
|
host->mci.voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
|
|
|
|
|
|
|
|
host->mci.f_min = clk_rate >> 9;
|
|
|
|
host->mci.f_max = clk_rate >> 1;
|
|
|
|
|
|
|
|
mci_register(&host->mci);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct driver_d atmel_mci_driver = {
|
|
|
|
.name = "atmel_mci",
|
|
|
|
.probe = mci_probe,
|
|
|
|
#ifdef CONFIG_MCI_INFO
|
|
|
|
.info = mci_info,
|
|
|
|
#endif
|
|
|
|
};
|
|
|
|
|
|
|
|
static int atmel_mci_init_driver(void)
|
|
|
|
{
|
|
|
|
register_driver(&atmel_mci_driver);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
device_initcall(atmel_mci_init_driver);
|