arm: add Nomadik 8815 SoC support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Andrea GALLO <andrea.gallo@stericsson.com> Cc: Gael SALLES <gael.salles@stericsson.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
parent
907d7cb909
commit
7bb277f370
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@ -47,6 +47,12 @@ config ARCH_NETX
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bool "Hilscher NetX based"
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select CPU_ARM926T
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config ARCH_NOMADIK
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bool "STMicroelectronics Nomadik"
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select CPU_ARM926T
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help
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Support for the Nomadik platform by ST-Ericsson
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config ARCH_OMAP
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bool "TI OMAP"
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@ -63,6 +69,7 @@ source arch/arm/mach-at91rm9200/Kconfig
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source arch/arm/mach-ep93xx/Kconfig
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source arch/arm/mach-imx/Kconfig
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source arch/arm/mach-netx/Kconfig
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source arch/arm/mach-nomadik/Kconfig
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source arch/arm/mach-omap/Kconfig
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source arch/arm/mach-s3c24xx/Kconfig
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@ -42,6 +42,7 @@ machine-$(CONFIG_ARCH_AT91) := at91
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machine-$(CONFIG_ARCH_AT91RM9200) := at91rm9200
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machine-$(CONFIG_ARCH_EP93XX) := ep93xx
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machine-$(CONFIG_ARCH_IMX) := imx
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machine-$(CONFIG_ARCH_NOMADIK) := nomadik
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machine-$(CONFIG_ARCH_NETX) := netx
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machine-$(CONFIG_ARCH_OMAP) := omap
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machine-$(CONFIG_ARCH_S3C24xx) := s3c24xx
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@ -0,0 +1,76 @@
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/*
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* Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnio@jcrosoft.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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#include <common.h>
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#include <init.h>
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#include <asm/hardware.h>
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#include <mach/hardware.h>
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#include <asm/armlinux.h>
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#include <asm/mach-types.h>
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#include "clock.h"
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static struct clk st8815_clk_48 = {
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.rate = 48 * 1000 * 1000,
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};
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static struct memory_platform_data ram_pdata = {
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.name = "ram0",
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.flags = DEVFS_RDWR,
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};
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static struct device_d sdram_dev = {
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.name = "mem",
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.map_base = 0x00000000,
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.platform_data = &ram_pdata,
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};
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void st8815_add_device_sdram(u32 size)
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{
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sdram_dev.size = size;
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register_device(&sdram_dev);
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armlinux_add_dram(&sdram_dev);
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}
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static struct device_d uart0_serial_device = {
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.name = "uart-pl011",
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.map_base = NOMADIK_UART0_BASE,
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.size = 4096,
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};
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static struct device_d uart1_serial_device = {
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.name = "uart-pl011",
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.map_base = NOMADIK_UART1_BASE,
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.size = 4096,
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};
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void st8815_register_uart(unsigned id)
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{
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switch (id) {
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case 0:
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nmdk_clk_create(&st8815_clk_48, uart0_serial_device.name);
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register_device(&uart0_serial_device);
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break;
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case 1:
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nmdk_clk_create(&st8815_clk_48, uart1_serial_device.name);
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register_device(&uart1_serial_device);
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break;
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}
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}
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@ -0,0 +1,11 @@
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if ARCH_NOMADIK
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choice
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prompt "Nomadik boards"
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endchoice
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config NOMADIK_8815
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bool
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endif
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@ -0,0 +1,3 @@
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obj-y += clock.o reset.o timer.o
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obj-y += 8815.o
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@ -0,0 +1,52 @@
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/*
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* linux/arch/arm/mach-nomadik/clock.c
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*
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* Copyright (C) 2009 Alessandro Rubini
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*/
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#include <common.h>
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#include <errno.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <init.h>
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#include <asm/clkdev.h>
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#include "clock.h"
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/*
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* The nomadik board uses generic clocks, but the serial pl011 file
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* calls clk_enable(), clk_disable(), clk_get_rate(), so we provide them
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*/
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unsigned long clk_get_rate(struct clk *clk)
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{
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return clk->rate;
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}
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EXPORT_SYMBOL(clk_get_rate);
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/* enable and disable do nothing */
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int clk_enable(struct clk *clk)
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{
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return 0;
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}
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EXPORT_SYMBOL(clk_enable);
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void clk_disable(struct clk *clk)
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{
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}
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EXPORT_SYMBOL(clk_disable);
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int __clk_get(struct clk *clk)
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{
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return 1;
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}
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/* Create a clock structure with the given name */
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int nmdk_clk_create(struct clk *clk, const char *dev_id)
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{
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struct clk_lookup *clkdev;
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clkdev = clkdev_alloc(clk, NULL, dev_id);
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if (!clkdev)
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return -ENOMEM;
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clkdev_add(clkdev);
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return 0;
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}
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@ -0,0 +1,14 @@
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/*
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* linux/arch/arm/mach-nomadik/clock.h
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*
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* Copyright (C) 2009 Alessandro Rubini
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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struct clk {
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unsigned long rate;
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};
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int nmdk_clk_create(struct clk *clk, const char *dev_id);
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@ -0,0 +1,28 @@
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/*
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* Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnio@jcrosoft.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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#ifndef __ASM_ARCH_BOARD_H
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#define __ASM_ARCH_BOARD_H
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void st8815_add_device_sdram(u32 size);
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void st8815_register_uart(unsigned id);
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#endif
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@ -0,0 +1,7 @@
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#ifndef __ASM_MACH_CLKDEV_H
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#define __ASM_MACH_CLKDEV_H
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#define __clk_get(clk) ({ 1; })
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#define __clk_put(clk) do { } while (0)
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#endif
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@ -0,0 +1,28 @@
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/* Definitions for the Nomadik FSMC "Flexible Static Memory controller" */
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#ifndef __ASM_ARCH_FSMC_H
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#define __ASM_ARCH_FSMC_H
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#include <mach/hardware.h>
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/*
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* Register list
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*/
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/* bus control reg. and bus timing reg. for CS0..CS3 */
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#define FSMC_BCR(x) (NOMADIK_FSMC_VA + (x << 3))
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#define FSMC_BTR(x) (NOMADIK_FSMC_VA + (x << 3) + 0x04)
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/* PC-card and NAND:
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* PCR = control register
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* PMEM = memory timing
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* PATT = attribute timing
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* PIO = I/O timing
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* PECCR = ECC result
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*/
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#define FSMC_PCR(x) (NOMADIK_FSMC_VA + ((2 + x) << 5) + 0x00)
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#define FSMC_PMEM(x) (NOMADIK_FSMC_VA + ((2 + x) << 5) + 0x08)
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#define FSMC_PATT(x) (NOMADIK_FSMC_VA + ((2 + x) << 5) + 0x0c)
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#define FSMC_PIO(x) (NOMADIK_FSMC_VA + ((2 + x) << 5) + 0x10)
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#define FSMC_PECCR(x) (NOMADIK_FSMC_VA + ((2 + x) << 5) + 0x14)
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#endif /* __ASM_ARCH_FSMC_H */
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@ -0,0 +1,91 @@
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/*
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* This file contains the hardware definitions of the Nomadik.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* YOU should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __ASM_ARCH_HARDWARE_H
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#define __ASM_ARCH_HARDWARE_H
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/* Nomadik registers live from 0x1000.0000 to 0x1023.0000 -- currently */
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#define NOMADIK_IO_VIRTUAL 0xF0000000 /* VA of IO */
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#define NOMADIK_IO_PHYSICAL 0x10000000 /* PA of IO */
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#define NOMADIK_IO_SIZE 0x00300000 /* 3MB for all regs */
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#ifndef CONFIG_MMU
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#define io_p2v(x) (x)
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#define io_v2p(x) (x)
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#else
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#define io_p2v(x) ((x) - NOMADIK_IO_PHYSICAL + NOMADIK_IO_VIRTUAL)
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#define io_v2p(x) ((x) - NOMADIK_IO_VIRTUAL + NOMADIK_IO_PHYSICAL)
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#endif
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#define IO_ADDRESS(x) (io_p2v(x)) /* used in asm and more */
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/*
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* Base address defination for Nomadik Onchip Logic Block
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*/
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#define NOMADIK_FSMC_BASE 0x10100000 /* FSMC registers */
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#define NOMADIK_SDRAMC_BASE 0x10110000 /* SDRAM Controller */
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#define NOMADIK_CLCDC_BASE 0x10120000 /* CLCD Controller */
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#define NOMADIK_MDIF_BASE 0x10120000 /* MDIF */
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#define NOMADIK_DMA0_BASE 0x10130000 /* DMA0 Controller */
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#define NOMADIK_IC_BASE 0x10140000 /* Vectored Irq Controller */
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#define NOMADIK_DMA1_BASE 0x10150000 /* DMA1 Controller */
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#define NOMADIK_USB_BASE 0x10170000 /* USB-OTG conf reg base */
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#define NOMADIK_CRYP_BASE 0x10180000 /* Crypto processor */
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#define NOMADIK_SHA1_BASE 0x10190000 /* SHA-1 Processor */
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#define NOMADIK_XTI_BASE 0x101A0000 /* XTI */
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#define NOMADIK_RNG_BASE 0x101B0000 /* Random number generator */
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#define NOMADIK_SRC_BASE 0x101E0000 /* SRC base */
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#define NOMADIK_WDOG_BASE 0x101E1000 /* Watchdog */
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#define NOMADIK_MTU0_BASE 0x101E2000 /* Multiple Timer 0 */
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#define NOMADIK_MTU1_BASE 0x101E3000 /* Multiple Timer 1 */
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#define NOMADIK_GPIO0_BASE 0x101E4000 /* GPIO0 */
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#define NOMADIK_GPIO1_BASE 0x101E5000 /* GPIO1 */
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#define NOMADIK_GPIO2_BASE 0x101E6000 /* GPIO2 */
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#define NOMADIK_GPIO3_BASE 0x101E7000 /* GPIO3 */
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#define NOMADIK_RTC_BASE 0x101E8000 /* Real Time Clock base */
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#define NOMADIK_PMU_BASE 0x101E9000 /* Power Management Unit */
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#define NOMADIK_OWM_BASE 0x101EA000 /* One wire master */
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#define NOMADIK_SCR_BASE 0x101EF000 /* Secure Control registers */
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#define NOMADIK_MSP2_BASE 0x101F0000 /* MSP 2 interface */
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#define NOMADIK_MSP1_BASE 0x101F1000 /* MSP 1 interface */
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#define NOMADIK_UART2_BASE 0x101F2000 /* UART 2 interface */
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#define NOMADIK_SSIRx_BASE 0x101F3000 /* SSI 8-ch rx interface */
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#define NOMADIK_SSITx_BASE 0x101F4000 /* SSI 8-ch tx interface */
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#define NOMADIK_MSHC_BASE 0x101F5000 /* Memory Stick(Pro) Host */
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#define NOMADIK_SDI_BASE 0x101F6000 /* SD-card/MM-Card */
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#define NOMADIK_I2C1_BASE 0x101F7000 /* I2C1 interface */
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#define NOMADIK_I2C0_BASE 0x101F8000 /* I2C0 interface */
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#define NOMADIK_MSP0_BASE 0x101F9000 /* MSP 0 interface */
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#define NOMADIK_FIRDA_BASE 0x101FA000 /* FIrDA interface */
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#define NOMADIK_UART1_BASE 0x101FB000 /* UART 1 interface */
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#define NOMADIK_SSP_BASE 0x101FC000 /* SSP interface */
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#define NOMADIK_UART0_BASE 0x101FD000 /* UART 0 interface */
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#define NOMADIK_SGA_BASE 0x101FE000 /* SGA interface */
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#define NOMADIK_L2CC_BASE 0x10210000 /* L2 Cache controller */
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/* Other ranges, not for p2v/v2p */
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#define NOMADIK_BACKUP_RAM 0x80010000
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#define NOMADIK_EBROM 0x80000000 /* Embedded boot ROM */
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#define NOMADIK_HAMACV_DMEM_BASE 0xA0100000 /* HAMACV Data Memory Start */
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#define NOMADIK_HAMACV_DMEM_END 0xA01FFFFF /* HAMACV Data Memory End */
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#define NOMADIK_HAMACA_DMEM 0xA0200000 /* HAMACA Data Memory Space */
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#define NOMADIK_FSMC_VA IO_ADDRESS(NOMADIK_FSMC_BASE)
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#define NOMADIK_MTU0_VA IO_ADDRESS(NOMADIK_MTU0_BASE)
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#define NOMADIK_MTU1_VA IO_ADDRESS(NOMADIK_MTU1_BASE)
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#endif /* __ASM_ARCH_HARDWARE_H */
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@ -0,0 +1,46 @@
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#ifndef __ASM_ARCH_MTU_H
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#define __ASM_ARCH_MTU_H
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/*
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* The MTU device hosts four different counters, with 4 set of
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* registers. These are register names.
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*/
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#define MTU_IMSC 0x00 /* Interrupt mask set/clear */
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#define MTU_RIS 0x04 /* Raw interrupt status */
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#define MTU_MIS 0x08 /* Masked interrupt status */
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#define MTU_ICR 0x0C /* Interrupt clear register */
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/* per-timer registers take 0..3 as argument */
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#define MTU_LR(x) (0x10 + 0x10 * (x) + 0x00) /* Load value */
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#define MTU_VAL(x) (0x10 + 0x10 * (x) + 0x04) /* Current value */
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#define MTU_CR(x) (0x10 + 0x10 * (x) + 0x08) /* Control reg */
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#define MTU_BGLR(x) (0x10 + 0x10 * (x) + 0x0c) /* At next overflow */
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/* bits for the control register */
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#define MTU_CRn_ENA 0x80
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#define MTU_CRn_PERIODIC 0x40 /* if 0 = free-running */
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#define MTU_CRn_PRESCALE_MASK 0x0c
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#define MTU_CRn_PRESCALE_1 0x00
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#define MTU_CRn_PRESCALE_16 0x04
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#define MTU_CRn_PRESCALE_256 0x08
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#define MTU_CRn_32BITS 0x02
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#define MTU_CRn_ONESHOT 0x01 /* if 0 = wraps reloading from BGLR*/
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/* Other registers are usual amba/primecell registers, currently not used */
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#define MTU_ITCR 0xff0
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#define MTU_ITOP 0xff4
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#define MTU_PERIPH_ID0 0xfe0
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#define MTU_PERIPH_ID1 0xfe4
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#define MTU_PERIPH_ID2 0xfe8
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#define MTU_PERIPH_ID3 0xfeC
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#define MTU_PCELL0 0xff0
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#define MTU_PCELL1 0xff4
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#define MTU_PCELL2 0xff8
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#define MTU_PCELL3 0xffC
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#endif /* __ASM_ARCH_MTU_H */
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@ -0,0 +1,6 @@
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#ifndef __ASM_ARCH_TIMEX_H
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#define __ASM_ARCH_TIMEX_H
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#define CLOCK_TICK_RATE 2400000
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#endif
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@ -0,0 +1,36 @@
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/*
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* mach-nomadik/include/mach/system.h
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*
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* Copyright (C) 2008 STMicroelectronics
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*
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* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
void __noreturn reset_cpu(unsigned long addr)
|
||||
{
|
||||
void __iomem *src_rstsr = (void *)(NOMADIK_SRC_BASE + 0x18);
|
||||
|
||||
/* FIXME: use egpio when implemented */
|
||||
|
||||
/* Write anything to Reset status register */
|
||||
writel(1, src_rstsr);
|
||||
|
||||
/* Not reached */
|
||||
while (1);
|
||||
}
|
||||
EXPORT_SYMBOL(reset_cpu);
|
|
@ -0,0 +1,81 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-nomadik/timer.c
|
||||
*
|
||||
* Copyright (C) 2008 STMicroelectronics
|
||||
* Copyright (C) 2009 Alessandro Rubini, somewhat based on at91sam926x
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2, as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <common.h>
|
||||
#include <init.h>
|
||||
#include <clock.h>
|
||||
#include <asm/io.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/mtu.h>
|
||||
#include <mach/timex.h>
|
||||
|
||||
/* Initial value for SRC control register: all timers use MXTAL/8 source */
|
||||
#define SRC_CR_INIT_MASK 0x00007fff
|
||||
#define SRC_CR_INIT_VAL 0x2aaa8000
|
||||
|
||||
static u32 nmdk_cycle; /* write-once */
|
||||
static __iomem void *mtu_base;
|
||||
|
||||
/*
|
||||
* clocksource: the MTU device is a decrementing counters, so we negate
|
||||
* the value being read.
|
||||
*/
|
||||
static uint64_t nmdk_read_timer(void)
|
||||
{
|
||||
return nmdk_cycle - readl(mtu_base + MTU_VAL(0));
|
||||
}
|
||||
|
||||
static struct clocksource nmdk_clksrc = {
|
||||
.read = nmdk_read_timer,
|
||||
.shift = 20,
|
||||
.mask = 0xffffffff,
|
||||
};
|
||||
|
||||
static void nmdk_timer_reset(void)
|
||||
{
|
||||
u32 cr;
|
||||
|
||||
writel(0, mtu_base + MTU_CR(0)); /* off */
|
||||
|
||||
/* configure load and background-load, and fire it up */
|
||||
writel(nmdk_cycle, mtu_base + MTU_LR(0));
|
||||
writel(nmdk_cycle, mtu_base + MTU_BGLR(0));
|
||||
cr = MTU_CRn_PRESCALE_1 | MTU_CRn_32BITS;
|
||||
writel(cr, mtu_base + MTU_CR(0));
|
||||
writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(0));
|
||||
}
|
||||
|
||||
static int nmdk_timer_init(void)
|
||||
{
|
||||
u32 src_cr;
|
||||
unsigned long rate;
|
||||
|
||||
rate = CLOCK_TICK_RATE; /* 2.4MHz */
|
||||
nmdk_cycle = (rate + 1000 / 2) / 1000;
|
||||
|
||||
/* Configure timer sources in "system reset controller" ctrl reg */
|
||||
src_cr = readl(NOMADIK_SRC_BASE);
|
||||
src_cr &= SRC_CR_INIT_MASK;
|
||||
src_cr |= SRC_CR_INIT_VAL;
|
||||
writel(src_cr, NOMADIK_SRC_BASE);
|
||||
|
||||
/* Save global pointer to mtu, used by functions above */
|
||||
mtu_base = (void *)NOMADIK_MTU0_BASE;
|
||||
|
||||
/* Init the timer and register clocksource */
|
||||
nmdk_timer_reset();
|
||||
|
||||
nmdk_clksrc.mult = clocksource_hz2mult(rate, nmdk_clksrc.shift);
|
||||
|
||||
init_clock(&nmdk_clksrc);
|
||||
|
||||
return 0;
|
||||
}
|
||||
core_initcall(nmdk_timer_init);
|
Loading…
Reference in New Issue