eeprom: add at24 support
This driver to get read/write support to most I2C EEPROMs, after you configure the driver to know about each EEPROM on your target board. Use these generic chip names, instead of vendor-specific ones like at24c64 or 24lc02: 24c00, 24c01, 24c02, spd (readonly 24c02), 24c04, 24c08, 24c16, 24c32, 24c64, 24c128, 24c256, 24c512, 24c1024 Unless you like data loss puzzles, always be sure that any chip you configure as a 24c32 (32 kbit) or larger is NOT really a 24c16 (16 kbit) or smaller, and vice versa. Marking the chip as read-only won't help recover from this. Also, if your chip has any software write-protect mechanism you may want to review the code to make sure this driver won't turn it on by accident. Based on linux 3.6 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Jean-Christophe PLAGNIOL-VILLARD
Sascha Hauer
parent
eaa821788d
commit
7f8547648c
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@ -8,4 +8,23 @@ config EEPROM_AT25
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after you configure the board init code to know about each eeprom
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after you configure the board init code to know about each eeprom
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on your target board.
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on your target board.
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config EEPROM_AT24
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bool "at24 based eeprom"
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depends on I2C
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help
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Enable this driver to get read/write support to most I2C EEPROMs,
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after you configure the driver to know about each EEPROM on
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your target board. Use these generic chip names, instead of
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vendor-specific ones like at24c64 or 24lc02:
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24c00, 24c01, 24c02, spd (readonly 24c02), 24c04, 24c08,
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24c16, 24c32, 24c64, 24c128, 24c256, 24c512, 24c1024
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Unless you like data loss puzzles, always be sure that any chip
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you configure as a 24c32 (32 kbit) or larger is NOT really a
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24c16 (16 kbit) or smaller, and vice versa. Marking the chip
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as read-only won't help recover from this. Also, if your chip
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has any software write-protect mechanism you may want to review the
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code to make sure this driver won't turn it on by accident.
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endmenu
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endmenu
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@ -1 +1,2 @@
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obj-$(CONFIG_EEPROM_AT25) += at25.o
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obj-$(CONFIG_EEPROM_AT25) += at25.o
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obj-$(CONFIG_EEPROM_AT24) += at24.o
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@ -0,0 +1,460 @@
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/*
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* at24.c - handle most I2C EEPROMs
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*
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* Copyright (C) 2005-2007 David Brownell
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* Copyright (C) 2008 Wolfram Sang, Pengutronix
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <common.h>
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#include <init.h>
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#include <malloc.h>
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#include <clock.h>
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#include <driver.h>
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#include <xfuncs.h>
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#include <errno.h>
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#include <linux/math64.h>
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#include <linux/log2.h>
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#include <i2c/i2c.h>
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#include <i2c/at24.h>
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/*
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* I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
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* Differences between different vendor product lines (like Atmel AT24C or
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* MicroChip 24LC, etc) won't much matter for typical read/write access.
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* There are also I2C RAM chips, likewise interchangeable. One example
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* would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
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*
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* However, misconfiguration can lose data. "Set 16-bit memory address"
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* to a part with 8-bit addressing will overwrite data. Writing with too
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* big a page size also loses data. And it's not safe to assume that the
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* conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
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* uses 0x51, for just one example.
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*
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* So this driver uses "new style" I2C driver binding, expecting to be
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* told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
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* similar kernel-resident tables; or, configuration data coming from
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* a bootloader.
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*
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* Other than binding model, current differences from "eeprom" driver are
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* that this one handles write access and isn't restricted to 24c02 devices.
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* It also handles larger devices (32 kbit and up) with two-byte addresses,
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* which won't work on pure SMBus systems.
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*/
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struct at24_data {
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struct at24_platform_data chip;
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struct cdev cdev;
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struct file_operations fops;
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u8 *writebuf;
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unsigned write_max;
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unsigned num_addresses;
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/*
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* Some chips tie up multiple I2C addresses; dummy devices reserve
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* them for us.
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*/
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struct i2c_client *client[];
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};
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/*
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* This parameter is to help this driver avoid blocking other drivers out
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* of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
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* clock, one 256 byte read takes about 1/43 second which is excessive;
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* but the 1/170 second it takes at 400 kHz may be quite reasonable; and
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* at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
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*
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* This value is forced to be a power of two so that writes align on pages.
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*/
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static unsigned io_limit = 128;
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/*
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* Specs often allow 5 msec for a page write, sometimes 20 msec;
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* it's important to recover from write timeouts.
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*/
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static unsigned write_timeout = 25;
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#define AT24_SIZE_BYTELEN 5
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#define AT24_SIZE_FLAGS 8
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#define AT24_BITMASK(x) (BIT(x) - 1)
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/* create non-zero magic value for given eeprom parameters */
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#define AT24_DEVICE_MAGIC(_len, _flags) \
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((1 << AT24_SIZE_FLAGS | (_flags)) \
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<< AT24_SIZE_BYTELEN | ilog2(_len))
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static struct platform_device_id at24_ids[] = {
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/* needs 8 addresses as A0-A2 are ignored */
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{ "24c00", AT24_DEVICE_MAGIC(128 / 8, AT24_FLAG_TAKE8ADDR) },
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/* old variants can't be handled with this generic entry! */
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{ "24c01", AT24_DEVICE_MAGIC(1024 / 8, 0) },
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{ "24c02", AT24_DEVICE_MAGIC(2048 / 8, 0) },
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/* spd is a 24c02 in memory DIMMs */
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{ "spd", AT24_DEVICE_MAGIC(2048 / 8,
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AT24_FLAG_READONLY | AT24_FLAG_IRUGO) },
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{ "24c04", AT24_DEVICE_MAGIC(4096 / 8, 0) },
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/* 24rf08 quirk is handled at i2c-core */
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{ "24c08", AT24_DEVICE_MAGIC(8192 / 8, 0) },
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{ "24c16", AT24_DEVICE_MAGIC(16384 / 8, 0) },
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{ "24c32", AT24_DEVICE_MAGIC(32768 / 8, AT24_FLAG_ADDR16) },
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{ "24c64", AT24_DEVICE_MAGIC(65536 / 8, AT24_FLAG_ADDR16) },
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{ "24c128", AT24_DEVICE_MAGIC(131072 / 8, AT24_FLAG_ADDR16) },
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{ "24c256", AT24_DEVICE_MAGIC(262144 / 8, AT24_FLAG_ADDR16) },
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{ "24c512", AT24_DEVICE_MAGIC(524288 / 8, AT24_FLAG_ADDR16) },
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{ "24c1024", AT24_DEVICE_MAGIC(1048576 / 8, AT24_FLAG_ADDR16) },
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{ "at24", 0 },
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{ /* END OF LIST */ }
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};
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/*-------------------------------------------------------------------------*/
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/*
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* This routine supports chips which consume multiple I2C addresses. It
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* computes the addressing information to be used for a given r/w request.
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* Assumes that sanity checks for offset happened at sysfs-layer.
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*/
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static struct i2c_client *at24_translate_offset(struct at24_data *at24,
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unsigned *offset)
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{
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unsigned i;
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if (at24->chip.flags & AT24_FLAG_ADDR16) {
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i = *offset >> 16;
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*offset &= 0xffff;
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} else {
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i = *offset >> 8;
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*offset &= 0xff;
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}
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return at24->client[i];
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}
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static ssize_t at24_eeprom_read(struct at24_data *at24, char *buf,
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unsigned offset, size_t count)
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{
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struct i2c_msg msg[2];
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u8 msgbuf[2];
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struct i2c_client *client;
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int status, i;
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uint64_t start, read_time;
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memset(msg, 0, sizeof(msg));
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/*
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* REVISIT some multi-address chips don't rollover page reads to
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* the next slave address, so we may need to truncate the count.
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* Those chips might need another quirk flag.
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*
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* If the real hardware used four adjacent 24c02 chips and that
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* were misconfigured as one 24c08, that would be a similar effect:
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* one "eeprom" file not four, but larger reads would fail when
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* they crossed certain pages.
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*/
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/*
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* Slave address and byte offset derive from the offset. Always
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* set the byte address; on a multi-master board, another master
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* may have changed the chip's "current" address pointer.
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*/
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client = at24_translate_offset(at24, &offset);
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if (count > io_limit)
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count = io_limit;
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i = 0;
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if (at24->chip.flags & AT24_FLAG_ADDR16)
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msgbuf[i++] = offset >> 8;
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msgbuf[i++] = offset;
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msg[0].addr = client->addr;
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msg[0].buf = msgbuf;
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msg[0].len = i;
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msg[1].addr = client->addr;
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msg[1].flags = I2C_M_RD;
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msg[1].buf = buf;
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msg[1].len = count;
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/*
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* Reads fail if the previous write didn't complete yet. We may
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* loop a few times until this one succeeds, waiting at least
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* long enough for one entire page write to work.
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*/
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start = get_time_ns();
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do {
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read_time = get_time_ns();
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status = i2c_transfer(client->adapter, msg, 2);
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if (status == 2)
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status = count;
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dev_dbg(&client->dev, "read %zu@%d --> %d (%llu)\n",
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count, offset, status, read_time);
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if (status == count)
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return count;
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/* REVISIT: at HZ=100, this is sloooow */
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mdelay(1);
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} while (!is_timeout(start, write_timeout * MSECOND));
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return -ETIMEDOUT;
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}
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static ssize_t at24_read(struct at24_data *at24,
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char *buf, loff_t off, size_t count)
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{
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ssize_t retval = 0;
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if (unlikely(!count))
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return count;
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/*
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* Read data from chip, protecting against concurrent updates
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* from this host, but not from other I2C masters.
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*/
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while (count) {
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ssize_t status;
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status = at24_eeprom_read(at24, buf, off, count);
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if (status <= 0) {
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if (retval == 0)
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retval = status;
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break;
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}
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buf += status;
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off += status;
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count -= status;
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retval += status;
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}
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return retval;
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}
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static ssize_t at24_cdev_read(struct cdev *cdev, void *buf, size_t count,
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loff_t off, ulong flags)
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{
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struct at24_data *at24 = cdev->priv;
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return at24_read(at24, buf, off, count);
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}
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/*
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* Note that if the hardware write-protect pin is pulled high, the whole
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* chip is normally write protected. But there are plenty of product
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* variants here, including OTP fuses and partial chip protect.
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*
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* We only use page mode writes; the alternative is sloooow. This routine
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* writes at most one page.
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*/
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static ssize_t at24_eeprom_write(struct at24_data *at24, const char *buf,
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unsigned offset, size_t count)
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{
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struct i2c_client *client;
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struct i2c_msg msg;
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ssize_t status;
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uint64_t start, write_time;
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unsigned next_page;
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int i = 0;
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/* Get corresponding I2C address and adjust offset */
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client = at24_translate_offset(at24, &offset);
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/* write_max is at most a page */
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if (count > at24->write_max)
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count = at24->write_max;
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/* Never roll over backwards, to the start of this page */
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next_page = roundup(offset + 1, at24->chip.page_size);
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if (offset + count > next_page)
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count = next_page - offset;
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msg.addr = client->addr;
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msg.flags = 0;
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/* msg.buf is u8 and casts will mask the values */
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msg.buf = at24->writebuf;
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if (at24->chip.flags & AT24_FLAG_ADDR16)
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msg.buf[i++] = offset >> 8;
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msg.buf[i++] = offset;
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memcpy(&msg.buf[i], buf, count);
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msg.len = i + count;
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/*
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* Writes fail if the previous one didn't complete yet. We may
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* loop a few times until this one succeeds, waiting at least
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* long enough for one entire page write to work.
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*/
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start = get_time_ns();
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do {
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write_time = get_time_ns();
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status = i2c_transfer(client->adapter, &msg, 1);
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if (status == 1)
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status = count;
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dev_dbg(&client->dev, "write %zu@%d --> %zd (%llu)\n",
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count, offset, status, write_time);
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if (status == count)
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return count;
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/* REVISIT: at HZ=100, this is sloooow */
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mdelay(1);
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} while (!is_timeout(start, write_timeout * MSECOND));
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return -ETIMEDOUT;
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}
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static ssize_t at24_write(struct at24_data *at24, const char *buf, loff_t off,
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size_t count)
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{
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ssize_t retval = 0;
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if (unlikely(!count))
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return count;
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while (count) {
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ssize_t status;
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status = at24_eeprom_write(at24, buf, off, count);
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if (status <= 0) {
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if (retval == 0)
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retval = status;
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break;
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}
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buf += status;
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off += status;
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count -= status;
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retval += status;
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}
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return retval;
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}
|
||||||
|
|
||||||
|
static ssize_t at24_cdev_write(struct cdev *cdev, const void *buf, size_t count,
|
||||||
|
loff_t off, ulong flags)
|
||||||
|
{
|
||||||
|
struct at24_data *at24 = cdev->priv;
|
||||||
|
|
||||||
|
return at24_write(at24, buf, off, count);
|
||||||
|
}
|
||||||
|
|
||||||
|
static int at24_probe(struct device_d *dev)
|
||||||
|
{
|
||||||
|
struct i2c_client *client = to_i2c_client(dev);
|
||||||
|
struct at24_platform_data chip;
|
||||||
|
bool writable;
|
||||||
|
struct at24_data *at24;
|
||||||
|
int err;
|
||||||
|
unsigned i, num_addresses;
|
||||||
|
|
||||||
|
if (dev->platform_data) {
|
||||||
|
chip = *(struct at24_platform_data *)dev->platform_data;
|
||||||
|
} else {
|
||||||
|
unsigned long magic;
|
||||||
|
|
||||||
|
err = dev_get_drvdata(dev, (unsigned long *)&magic);
|
||||||
|
if (err)
|
||||||
|
return err;
|
||||||
|
|
||||||
|
chip.byte_len = BIT(magic & AT24_BITMASK(AT24_SIZE_BYTELEN));
|
||||||
|
magic >>= AT24_SIZE_BYTELEN;
|
||||||
|
chip.flags = magic & AT24_BITMASK(AT24_SIZE_FLAGS);
|
||||||
|
/*
|
||||||
|
* This is slow, but we can't know all eeproms, so we better
|
||||||
|
* play safe. Specifying custom eeprom-types via platform_data
|
||||||
|
* is recommended anyhow.
|
||||||
|
*/
|
||||||
|
chip.page_size = 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (!is_power_of_2(chip.byte_len))
|
||||||
|
dev_warn(&client->dev,
|
||||||
|
"byte_len looks suspicious (no power of 2)!\n");
|
||||||
|
if (!chip.page_size) {
|
||||||
|
dev_err(&client->dev, "page_size must not be 0!\n");
|
||||||
|
err = -EINVAL;
|
||||||
|
goto err_out;
|
||||||
|
}
|
||||||
|
if (!is_power_of_2(chip.page_size))
|
||||||
|
dev_warn(&client->dev,
|
||||||
|
"page_size looks suspicious (no power of 2)!\n");
|
||||||
|
|
||||||
|
if (chip.flags & AT24_FLAG_TAKE8ADDR)
|
||||||
|
num_addresses = 8;
|
||||||
|
else
|
||||||
|
num_addresses = DIV_ROUND_UP(chip.byte_len,
|
||||||
|
(chip.flags & AT24_FLAG_ADDR16) ? 65536 : 256);
|
||||||
|
|
||||||
|
at24 = xzalloc(sizeof(struct at24_data) +
|
||||||
|
num_addresses * sizeof(struct i2c_client *));
|
||||||
|
|
||||||
|
at24->chip = chip;
|
||||||
|
at24->num_addresses = num_addresses;
|
||||||
|
at24->cdev.name = asprintf("eeprom%d", dev->id);
|
||||||
|
at24->cdev.priv = at24;
|
||||||
|
at24->cdev.dev = dev;
|
||||||
|
at24->cdev.ops = &at24->fops;
|
||||||
|
at24->fops.lseek = dev_lseek_default;
|
||||||
|
at24->fops.read = at24_cdev_read,
|
||||||
|
at24->cdev.size = chip.byte_len;
|
||||||
|
|
||||||
|
writable = !(chip.flags & AT24_FLAG_READONLY);
|
||||||
|
if (writable) {
|
||||||
|
unsigned write_max = chip.page_size;
|
||||||
|
|
||||||
|
at24->fops.write = at24_cdev_write;
|
||||||
|
|
||||||
|
if (write_max > io_limit)
|
||||||
|
write_max = io_limit;
|
||||||
|
at24->write_max = write_max;
|
||||||
|
|
||||||
|
/* buffer (data + address at the beginning) */
|
||||||
|
at24->writebuf = xmalloc(write_max + 2);
|
||||||
|
}
|
||||||
|
|
||||||
|
at24->client[0] = client;
|
||||||
|
|
||||||
|
/* use dummy devices for multiple-address chips */
|
||||||
|
for (i = 1; i < num_addresses; i++) {
|
||||||
|
at24->client[i] = i2c_new_dummy(client->adapter,
|
||||||
|
client->addr + i);
|
||||||
|
if (!at24->client[i]) {
|
||||||
|
dev_err(&client->dev, "address 0x%02x unavailable\n",
|
||||||
|
client->addr + i);
|
||||||
|
err = -EADDRINUSE;
|
||||||
|
goto err_clients;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
devfs_create(&at24->cdev);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
err_clients:
|
||||||
|
kfree(at24->writebuf);
|
||||||
|
kfree(at24);
|
||||||
|
err_out:
|
||||||
|
dev_dbg(&client->dev, "probe error %d\n", err);
|
||||||
|
return err;
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
static struct driver_d at24_driver = {
|
||||||
|
.name = "at24",
|
||||||
|
.probe = at24_probe,
|
||||||
|
.id_table = at24_ids,
|
||||||
|
};
|
||||||
|
|
||||||
|
static int at24_init(void)
|
||||||
|
{
|
||||||
|
i2c_register_driver(&at24_driver);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
device_initcall(at24_init);
|
||||||
|
|
@ -0,0 +1,35 @@
|
||||||
|
/*
|
||||||
|
* at24.h - platform_data for the at24 (generic eeprom) driver
|
||||||
|
* (C) Copyright 2008 by Pengutronix
|
||||||
|
* (C) Copyright 2012 by Wolfram Sang
|
||||||
|
* same license as the driver
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _LINUX_AT24_H
|
||||||
|
#define _LINUX_AT24_H
|
||||||
|
|
||||||
|
#include <linux/types.h>
|
||||||
|
|
||||||
|
/**
|
||||||
|
* struct at24_platform_data - data to set up at24 (generic eeprom) driver
|
||||||
|
* @byte_len: size of eeprom in byte
|
||||||
|
* @page_size: number of byte which can be written in one go
|
||||||
|
* @flags: tunable options, check AT24_FLAG_* defines
|
||||||
|
*
|
||||||
|
* If you set up a custom eeprom type, please double-check the parameters.
|
||||||
|
* Especially page_size needs extra care, as you risk data loss if your value
|
||||||
|
* is bigger than what the chip actually supports!
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
struct at24_platform_data {
|
||||||
|
u32 byte_len; /* size (sum of all addr) */
|
||||||
|
u16 page_size; /* for writes */
|
||||||
|
u8 flags;
|
||||||
|
#define AT24_FLAG_ADDR16 0x80 /* address pointer is 16 bit */
|
||||||
|
#define AT24_FLAG_READONLY 0x40 /* sysfs-entry will be read-only */
|
||||||
|
#define AT24_FLAG_IRUGO 0x20 /* sysfs-entry will be world-readable */
|
||||||
|
#define AT24_FLAG_TAKE8ADDR 0x10 /* take always 8 addresses (24c00) */
|
||||||
|
};
|
||||||
|
|
||||||
|
#endif /* _LINUX_AT24_H */
|
||||||
Loading…
Reference in New Issue