Merge branch 'for-next/imx-usb-chipidea'
This commit is contained in:
commit
9c5172fac2
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@ -231,8 +231,8 @@ static struct esdhc_platform_data sabrelite_sd4_data = {
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static void sabrelite_ehci_init(void)
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{
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imx6_usb_phy1_disable_oc();
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imx6_usb_phy1_enable();
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imx6_usb_phy2_disable_oc();
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imx6_usb_phy2_enable();
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/* hub reset */
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gpio_direction_output(204, 0);
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@ -205,6 +205,9 @@ static int imx6_ccm_probe(struct device_d *dev)
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clks[pll7_usb_host] = imx_clk_pllv3(IMX_PLLV3_USB, "pll7_usb_host","osc", base + 0x20, 0x3);
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clks[pll6_enet] = imx_clk_pllv3(IMX_PLLV3_ENET, "pll6_enet", "osc", base + 0xe0, 0x3);
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clks[usbphy1] = imx_clk_gate("usbphy1", "pll3_usb_otg", base + 0x10, 6);
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clks[usbphy2] = imx_clk_gate("usbphy2", "pll7_usb_host", base + 0x20, 6);
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clks[sata_ref] = imx_clk_fixed_factor("sata_ref", "pll6_enet", 1, 5);
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clks[pcie_ref] = imx_clk_fixed_factor("pcie_ref", "pll6_enet", 1, 4);
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clks[sata_ref_100m] = imx_clk_gate("sata_ref_100m", "sata_ref", base + 0xe0, 20);
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@ -298,6 +301,8 @@ static int imx6_ccm_probe(struct device_d *dev)
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clkdev_add_physbase(clks[ipg_per], MX6_I2C2_BASE_ADDR, NULL);
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clkdev_add_physbase(clks[ipg_per], MX6_I2C3_BASE_ADDR, NULL);
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clkdev_add_physbase(clks[ahb], MX6_SATA_BASE_ADDR, NULL);
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clkdev_add_physbase(clks[usbphy1], MX6_USBPHY1_BASE_ADDR, NULL);
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clkdev_add_physbase(clks[usbphy2], MX6_USBPHY2_BASE_ADDR, NULL);
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writel(0xffffffff, ccm_base + CCGR0);
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writel(0xffffffff, ccm_base + CCGR1);
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@ -68,6 +68,7 @@ static int imx6_init(void)
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add_generic_device("imx31-gpio", 5, NULL, MX6_GPIO6_BASE_ADDR, 0x4000, IORESOURCE_MEM, NULL);
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add_generic_device("imx31-gpio", 6, NULL, MX6_GPIO7_BASE_ADDR, 0x4000, IORESOURCE_MEM, NULL);
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add_generic_device("imx21-wdt", 0, NULL, MX6_WDOG1_BASE_ADDR, 0x4000, IORESOURCE_MEM, NULL);
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add_generic_device("imx6-usb-misc", 0, NULL, MX6_USBOH3_USB_BASE_ADDR + 0x800, 0x100, IORESOURCE_MEM, NULL);
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return 0;
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}
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@ -69,3 +69,29 @@ static inline struct device_d *imx6_add_sata(void)
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{
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return add_generic_device("imx6-sata", 0, NULL, MX6_SATA_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL);
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}
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static inline struct device_d *imx6_add_usbotg(void *pdata)
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{
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add_generic_device("imx-usb-phy", 0, NULL, MX6_USBPHY1_BASE_ADDR, 0x1000,
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IORESOURCE_MEM, NULL);
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return imx_add_usb((void *)MX6_USBOH3_USB_BASE_ADDR, 0, pdata);
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}
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static inline struct device_d *imx6_add_usbh1(void *pdata)
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{
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add_generic_device("imx-usb-phy", 1, NULL, MX6_USBPHY2_BASE_ADDR, 0x1000,
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IORESOURCE_MEM, NULL);
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return imx_add_usb((void *)MX6_USBOH3_USB_BASE_ADDR + 0x200, 1, pdata);
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}
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static inline struct device_d *imx6_add_usbh2(void *pdata)
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{
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return imx_add_usb((void *)MX6_USBOH3_USB_BASE_ADDR + 0x400, 2, pdata);
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}
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static inline struct device_d *imx6_add_usbh3(void *pdata)
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{
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return imx_add_usb((void *)MX6_USBOH3_USB_BASE_ADDR + 0x600, 2, pdata);
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}
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@ -49,7 +49,8 @@
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#define MX6_WDOG2_BASE_ADDR (MX6_AIPS1_OFF_BASE_ADDR + 0x40000)
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#define MX6_CCM_BASE_ADDR (MX6_AIPS1_OFF_BASE_ADDR + 0x44000)
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#define MX6_ANATOP_BASE_ADDR (MX6_AIPS1_OFF_BASE_ADDR + 0x48000)
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#define MX6_USBPHY1_BASE_ADDR (MX6_AIPS1_OFF_BASE_ADDR + 0x4a000)
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#define MX6_USBPHY1_BASE_ADDR (MX6_AIPS1_OFF_BASE_ADDR + 0x49000)
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#define MX6_USBPHY2_BASE_ADDR (MX6_AIPS1_OFF_BASE_ADDR + 0x4a000)
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#define MX6_SNVS_BASE_ADDR (MX6_AIPS1_OFF_BASE_ADDR + 0x4C000)
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#define MX6_EPIT1_BASE_ADDR (MX6_AIPS1_OFF_BASE_ADDR + 0x50000)
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#define MX6_EPIT2_BASE_ADDR (MX6_AIPS1_OFF_BASE_ADDR + 0x54000)
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@ -11,7 +11,7 @@
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#define MX35_H1_USBTE_BIT (1 << 4)
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#define MXC_EHCI_INTERFACE_SINGLE_UNI (2 << 0)
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int imx6_usb_phy1_disable_oc(void);
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int imx6_usb_phy1_enable(void);
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int imx6_usb_phy2_disable_oc(void);
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int imx6_usb_phy2_enable(void);
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#endif /* __MACH_USB_H_*/
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@ -46,7 +46,7 @@
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#define USBPHY1_PLL_480_CTRL_EN_USB_CLK (1 << 6)
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#define USBPHY1_PLL_480_CTRL_BYPASS (1 << 16)
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int imx6_usb_phy1_disable_oc(void)
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int imx6_usb_phy2_disable_oc(void)
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{
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int val;
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@ -64,7 +64,7 @@ int imx6_usb_phy1_disable_oc(void)
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return 0;
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}
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int imx6_usb_phy1_enable(void)
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int imx6_usb_phy2_enable(void)
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{
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int val;
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@ -94,18 +94,18 @@ int imx6_usb_phy1_enable(void)
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while (readl(MX6_USBOH3_USB_BASE_ADDR + USB_UH1_USBCMD) & USB_CMD_RESET);
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/* reset usbphy */
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writel(USBPHY_CTRL_SFTRST, MX6_USBPHY1_BASE_ADDR + USBPHY_CTRL + SET);
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writel(USBPHY_CTRL_SFTRST, MX6_USBPHY2_BASE_ADDR + USBPHY_CTRL + SET);
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udelay(10);
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/* clr reset and clkgate */
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writel(USBPHY_CTRL_SFTRST | USBPHY_CTRL_CLKGATE, MX6_USBPHY1_BASE_ADDR + USBPHY_CTRL + CLR);
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writel(USBPHY_CTRL_SFTRST | USBPHY_CTRL_CLKGATE, MX6_USBPHY2_BASE_ADDR + USBPHY_CTRL + CLR);
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/* clr all pwd bits => power up phy */
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writel(0xffffffff, MX6_USBPHY1_BASE_ADDR + CLR);
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writel(0xffffffff, MX6_USBPHY2_BASE_ADDR + CLR);
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/* set utmilvl2/3 */
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val = readl(MX6_USBPHY1_BASE_ADDR + USBPHY_CTRL);
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val = readl(MX6_USBPHY2_BASE_ADDR + USBPHY_CTRL);
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val |= USBPHY_CTRL_ENUTMILEVEL3 | USBPHY_CTRL_ENUTMILEVEL2;
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writel(val, MX6_USBPHY1_BASE_ADDR + USBPHY_CTRL + SET);
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writel(val, MX6_USBPHY2_BASE_ADDR + USBPHY_CTRL + SET);
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return 0;
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}
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@ -13,3 +13,8 @@ config USB_IMX_CHIPIDEA
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This driver is recommended for new designs, but it needs board
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support to work.
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It's safe to say yes here. Also select EHCI support for USB host.
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config USB_IMX_PHY
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bool
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depends on ARCH_IMX
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default y if ARCH_IMX6
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@ -1 +1,2 @@
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obj-$(CONFIG_USB_IMX_CHIPIDEA) += imx-usb-misc.o chipidea-imx.o
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obj-$(CONFIG_USB_IMX_PHY) += imx-usb-phy.o
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@ -324,6 +324,12 @@ static __maybe_unused int mx5_initialize_usb_hw(void __iomem *base, int port,
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return 0;
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}
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static __maybe_unused int mx6_initialize_usb_hw(void __iomem *base, int port,
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unsigned int flags)
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{
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return 0;
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}
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static struct platform_device_id imx_usbmisc_ids[] = {
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#ifdef CONFIG_ARCH_IMX25
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{
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@ -360,6 +366,12 @@ static struct platform_device_id imx_usbmisc_ids[] = {
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.name = "imx53-usb-misc",
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.driver_data = (unsigned long)&mx5_initialize_usb_hw,
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},
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#endif
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#ifdef CONFIG_ARCH_IMX6
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{
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.name = "imx6-usb-misc",
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.driver_data = (unsigned long)&mx6_initialize_usb_hw,
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},
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#endif
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{
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/* sentinel */
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@ -0,0 +1,105 @@
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/*
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* Copyright (c) 2013 Sascha Hauer <s.hauer@pengutronix.de>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*/
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#include <common.h>
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#include <init.h>
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#include <io.h>
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#include <driver.h>
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#include <malloc.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#define SET 0x4
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#define CLR 0x8
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#define USBPHY_CTRL 0x30
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#define USBPHY_CTRL_SFTRST (1 << 31)
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#define USBPHY_CTRL_CLKGATE (1 << 30)
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#define USBPHY_CTRL_ENUTMILEVEL3 (1 << 15)
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#define USBPHY_CTRL_ENUTMILEVEL2 (1 << 14)
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struct imx_usbphy {
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void __iomem *base;
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struct clk *clk;
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};
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static int imx_usbphy_enable(struct imx_usbphy *imxphy)
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{
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u32 val;
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clk_enable(imxphy->clk);
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/* reset usbphy */
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writel(USBPHY_CTRL_SFTRST, imxphy->base + USBPHY_CTRL + SET);
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udelay(10);
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/* clr reset and clkgate */
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writel(USBPHY_CTRL_SFTRST | USBPHY_CTRL_CLKGATE,
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imxphy->base + USBPHY_CTRL + CLR);
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/* clr all pwd bits => power up phy */
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writel(0xffffffff, imxphy->base + CLR);
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/* set utmilvl2/3 */
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val = readl(imxphy->base + USBPHY_CTRL);
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val |= USBPHY_CTRL_ENUTMILEVEL3 | USBPHY_CTRL_ENUTMILEVEL2;
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writel(val, imxphy->base + USBPHY_CTRL + SET);
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return 0;
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}
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static int imx_usbphy_probe(struct device_d *dev)
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{
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int ret;
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struct imx_usbphy *imxphy;
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imxphy = xzalloc(sizeof(*imxphy));
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imxphy->base = dev_request_mem_region(dev, 0);
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if (!imxphy->base) {
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ret = -ENODEV;
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goto err_free;
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}
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imxphy->clk = clk_get(dev, NULL);
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if (IS_ERR(imxphy->clk)) {
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dev_err(dev, "could not get clk: %s\n", strerror(-PTR_ERR(imxphy->clk)));
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goto err_clk;
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}
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imx_usbphy_enable(imxphy);
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dev_dbg(dev, "phy enabled\n");
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return 0;
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err_clk:
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err_free:
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free(imxphy);
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return ret;
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};
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static struct driver_d imx_usbphy_driver = {
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.name = "imx-usb-phy",
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.probe = imx_usbphy_probe,
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};
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static int imx_usbphy_init(void)
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{
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return platform_driver_register(&imx_usbphy_driver);
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}
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coredevice_initcall(imx_usbphy_init);
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