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ARM i.MX: Enable clocks in common place 

On i.MX we enable all necessary clocks during startup of the clock
controller driver, so we do not need the register hacking in the drivers
anymore.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Sascha Hauer 2012-09-09 21:47:55 +02:00
parent 0ea2ee7866
commit a4c8692240
11 changed files with 1 additions and 51 deletions
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15
arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
View File

@ -250,18 +250,3 @@ void __bare_init nand_boot(void)
imx_nand_load_image(_text, barebox_image_size);
}
#endif
static int eukrea_cpuimx25_core_init(void) {
/* enable UART1, FEC, SDHC, USB & I2C clock */
writel(readl(MX25_CCM_BASE_ADDR + CCM_CGCR0) | (1 << 6) | (1 << 23)
| (1 << 15) | (1 << 21) | (1 << 3) | (1 << 28),
MX25_CCM_BASE_ADDR + CCM_CGCR0);
writel(readl(MX25_CCM_BASE_ADDR + CCM_CGCR1) | (1 << 23) | (1 << 15)
| (1 << 13), MX25_CCM_BASE_ADDR + CCM_CGCR1);
writel(readl(MX25_CCM_BASE_ADDR + CCM_CGCR2) | (1 << 14),
MX25_CCM_BASE_ADDR + CCM_CGCR2);
return 0;
}
core_initcall(eukrea_cpuimx25_core_init);

1
arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c
View File

@ -194,7 +194,6 @@ static int eukrea_cpuimx27_devices_init(void)
#endif
imx27_add_nand(&nand_info);
PCCR0 |= PCCR0_I2C1_EN;
i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
imx27_add_i2c0(NULL);

2
arch/arm/boards/guf-neso/lowlevel.c
View File

@ -35,8 +35,6 @@ static void __bare_init __naked insdram(void)
{
uint32_t r;
PCCR1 |= PCCR1_NFC_BAUDEN;
/* setup a stack to be able to call imx_nand_load_image() */
r = STACK_BASE + STACK_SIZE - 12;
__asm__ __volatile__("mov sp, %0" : : "r"(r));

1
arch/arm/boards/imx21ads/imx21ads.c
View File

@ -193,7 +193,6 @@ console_initcall(mx21ads_console_init);
#ifdef CONFIG_NAND_IMX_BOOT
void __bare_init nand_boot(void)
{
PCCR0 |= PCCR0_NFC_EN;
imx_nand_load_image(_text, barebox_image_size);
board_init_lowlevel_return();
}

2
arch/arm/boards/pcm038/lowlevel.c
View File

@ -36,8 +36,6 @@ static void __bare_init __naked insdram(void)
{
uint32_t r;
PCCR1 |= PCCR1_NFC_BAUDEN;
/* setup a stack to be able to call imx_nand_load_image() */
r = STACK_BASE + STACK_SIZE - 12;
__asm__ __volatile__("mov sp, %0" : : "r"(r));

4
arch/arm/boards/pcm038/pcm038.c
View File

@ -281,9 +281,6 @@ static int pcm038_devices_init(void)
for (i = 0; i < ARRAY_SIZE(mode); i++)
imx_gpio_mode(mode[i]);
PCCR0 |= PCCR0_CSPI1_EN;
PCCR1 |= PCCR1_PERCLK2_EN;
spi_register_board_info(pcm038_spi_board_info, ARRAY_SIZE(pcm038_spi_board_info));
imx27_add_spi0(&pcm038_spi_0_data);
@ -293,7 +290,6 @@ static int pcm038_devices_init(void)
imx27_add_nand(&nand_info);
imx27_add_fb(&pcm038_fb_data);
PCCR0 |= PCCR0_I2C1_EN | PCCR0_I2C2_EN;
imx27_add_i2c0(NULL);
imx27_add_i2c1(NULL);

1
arch/arm/boards/pcm038/pcm970.c
View File

@ -162,7 +162,6 @@ static void pcm970_mmc_init(void)
for (i = 0; i < ARRAY_SIZE(mode); i++)
imx_gpio_mode(mode[i]);
PCCR0 |= PCCR0_SDHC2_EN;
imx27_add_mmc1(NULL);
}

4
arch/arm/boards/phycard-i.MX27/pca100.c
View File

@ -279,8 +279,6 @@ static int pca100_devices_init(void)
PD18_PF_I2C_CLK,
};
PCCR0 |= PCCR0_SDHC2_EN;
pca100_usb_init();
/* initizalize gpios */
@ -292,8 +290,6 @@ static int pca100_devices_init(void)
imx27_add_mmc1(NULL);
imx27_add_fb(&pca100_fb_data);
PCCR1 |= PCCR1_PERCLK2_EN;
#ifdef CONFIG_USB
pca100_usb_register();
#endif

12
arch/arm/mach-imx/clocksource.c
View File

@ -108,18 +108,6 @@ static int imx_gpt_probe(struct device_d *dev)
/* setup GP Timer 1 */
writel(TCTL_SWR, timer_base + GPT_TCTL);
#ifdef CONFIG_ARCH_IMX21
PCCR1 |= PCCR1_GPT1_EN;
#endif
#ifdef CONFIG_ARCH_IMX27
PCCR0 |= PCCR0_GPT1_EN;
PCCR1 |= PCCR1_PERCLK1_EN;
#endif
#ifdef CONFIG_ARCH_IMX25
writel(readl(IMX_CCM_BASE + CCM_CGCR1) | (1 << 19),
IMX_CCM_BASE + CCM_CGCR1);
#endif
for (i = 0; i < 100; i++)
writel(0, timer_base + GPT_TCTL); /* We have no udelay by now */

6
drivers/mtd/nand/nand_imx.c
View File

@ -1107,12 +1107,6 @@ static int __init imxnd_probe(struct device_d *dev)
struct nand_ecclayout *oob_smallpage, *oob_largepage, *oob_4kpage;
int err = 0;
#ifdef CONFIG_ARCH_IMX27
PCCR1 |= PCCR1_NFC_BAUDEN;
#endif
#ifdef CONFIG_ARCH_IMX21
PCCR0 |= PCCR0_NFC_EN;
#endif
/* Allocate memory for MTD device structure and private data */
host = kzalloc(sizeof(struct imx_nand_host) + NAND_MAX_PAGESIZE +
NAND_MAX_OOBSIZE, GFP_KERNEL);

4
drivers/net/fec_imx.c
View File

@ -628,9 +628,7 @@ static int fec_probe(struct device_d *dev)
struct fec_priv *fec;
void *base;
int ret;
#ifdef CONFIG_ARCH_IMX27
PCCR0 |= PCCR0_FEC_EN;
#endif
fec = xzalloc(sizeof(*fec));
edev = &fec->edev;
dev->priv = fec;