sysmo-bts
/
barebox
9
0
Fork 0
Code Releases Activity

Merge branch 'for-next/ppc'

This commit is contained in:
Sascha Hauer 2013-08-05 12:50:09 +02:00
parent 8599b7aec2 89cdacb0cb
commit a67ba6597d
7 changed files with 7 additions and 27 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/ppc/boards/freescale-p2020rdb/config.h
View File

@ -87,8 +87,4 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
/* Leave 256 bytes for global data */
#define CFG_INIT_SP_OFFSET (0x00004000 - 256)
#define CFG_BR0_PRELIM (BR_PHYS_ADDR(CFG_FLASH_BASE_PHYS) | \
BR_PS_16 | BR_V) /* NOR Base Address */
#define CFG_OR0_PRELIM 0xff000ff7 /* NOR Options */
#endif /* __CONFIG_H */

4
arch/ppc/boards/freescale-p2020rdb/p2020rdb.c
View File

@ -235,6 +235,10 @@ static int board_init_r(void)
checkboard();
/* Map the whole boot flash */
fsl_set_lbc_br(0, BR_PHYS_ADDR(CFG_FLASH_BASE_PHYS) | BR_PS_16 | BR_V);
fsl_set_lbc_or(0, 0xff000ff7);
/* Flush d-cache and invalidate i-cache of any FLASH data */
flush_dcache();
invalidate_icache();

1
arch/ppc/cpu-85xx/start.S
View File

@ -300,7 +300,6 @@ _start_cont:
mtmsr r3
isync
bl cpu_init_f
bl initdram
b relocate_code
isync

2
arch/ppc/include/asm/fsl_lbc.h
View File

@ -44,8 +44,6 @@
#ifndef __ASSEMBLY__
#include <asm/io.h>
extern void fsl_init_early_memctl_regs(void);
/* LBC register offsets. */
#define FSL_LBC_BRX(x) ((x) * 8) /* bank register offsets. */
#define FSL_LBC_ORX(x) (4 + ((x) * 8)) /* option register offset. */

1
arch/ppc/mach-mpc85xx/Makefile
View File

@ -1,7 +1,6 @@
obj-y += cpuid.o
obj-y += cpu.o
obj-y += cpu_init.o
obj-y += fsl_lbc.o
obj-y += fsl_law.o
obj-y += speed.o
obj-y +=time.o

5
arch/ppc/mach-mpc85xx/cpu_init.c
View File

@ -114,10 +114,11 @@ void cpu_init_early_f(void)
e500_init_tlbs();
}
void cpu_init_f(void)
static int cpu_init_r(void)
{
e500_disable_tlb(14);
e500_disable_tlb(15);
fsl_init_early_memctl_regs();
return 0;
}
core_initcall(cpu_init_r);

17
arch/ppc/mach-mpc85xx/fsl_lbc.c
View File

@ -1,17 +0,0 @@
/*
* Copyright 2010-2011 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* Version 2 as published by the Free Software Foundation.
*/
#include <common.h>
#include <asm/fsl_lbc.h>
#include <mach/immap_85xx.h>
void fsl_init_early_memctl_regs(void)
{
fsl_set_lbc_br(0, CFG_BR0_PRELIM);
fsl_set_lbc_or(0, CFG_OR0_PRELIM);
}