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ARM boards: remove now unnecessary mmu calls 

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This commit is contained in:
Sascha Hauer 2011-07-29 11:43:50 +02:00
parent 3100ea1466
commit a6c333c7f2
19 changed files with 33 additions and 201 deletions
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10
arch/arm/boards/chumby_falconwing/falconwing.c
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@ -265,16 +265,6 @@ static int falconwing_mem_init(void)
{
arm_add_mem_device("ram0", IMX_MEMORY_BASE, 64 * 1024 * 1024);
#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0x40000000, 0x40000000, 64, PMD_SECT_DEF_CACHED);
arm_create_section(0x50000000, 0x40000000, 64, PMD_SECT_DEF_UNCACHED);
setup_dma_coherent(0x10000000);
mmu_enable();
#endif
return 0;
}
mem_initcall(falconwing_mem_init);

10
arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
View File

@ -160,16 +160,6 @@ static int eukrea_cpuimx25_mem_init(void)
{
arm_add_mem_device("ram0", IMX_SDRAM_CS0, 64 * 1024 * 1024);
#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0x80000000, 0x80000000, 128, PMD_SECT_DEF_CACHED);
arm_create_section(0x90000000, 0x80000000, 128, PMD_SECT_DEF_UNCACHED);
setup_dma_coherent(0x10000000);
mmu_enable();
#endif
return 0;
}
mem_initcall(eukrea_cpuimx25_mem_init);

10
arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c
View File

@ -92,16 +92,6 @@ static int eukrea_cpuimx27_mem_init(void)
{
arm_add_mem_device("ram0", 0xa0000000, SDRAM0 * 1024 * 1024);
#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0xa0000000, 0xa0000000, 128, PMD_SECT_DEF_CACHED);
arm_create_section(0xb0000000, 0xa0000000, 128, PMD_SECT_DEF_UNCACHED);
setup_dma_coherent(0x10000000);
mmu_enable();
#endif
return 0;
}
mem_initcall(eukrea_cpuimx27_mem_init);

22
arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c
View File

@ -130,24 +130,18 @@ static int eukrea_cpuimx35_mem_init(void)
{
arm_add_mem_device("ram0", IMX_SDRAM_CS0, 128 * 1024 * 1024);
#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0x80000000, 0x80000000, 128, PMD_SECT_DEF_CACHED);
arm_create_section(0x90000000, 0x80000000, 128, PMD_SECT_DEF_UNCACHED);
setup_dma_coherent(0x10000000);
mmu_enable();
#ifdef CONFIG_CACHE_L2X0
l2x0_init((void __iomem *)0x30000000, 0x00030024, 0x00000000);
#endif
#endif
return 0;
}
mem_initcall(eukrea_cpuimx35_mem_init);
static int eukrea_cpuimx35_mmu_init(void)
{
l2x0_init((void __iomem *)0x30000000, 0x00030024, 0x00000000);
return 0;
}
postmmu_initcall(eukrea_cpuimx35_mmu_init);
static int eukrea_cpuimx35_devices_init(void)
{
imx35_add_nand(&nand_info);

16
arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c
View File

@ -97,22 +97,6 @@ static int eukrea_cpuimx51_mem_init(void)
{
arm_add_mem_device("ram0", 0x90000000, 256 * 1024 * 1024);
#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0x90000000, 0x90000000, 256, PMD_SECT_DEF_CACHED);
arm_create_section(0xa0000000, 0x90000000, 256, PMD_SECT_DEF_UNCACHED);
setup_dma_coherent(0x10000000);
#if TEXT_BASE & (0x100000 - 1)
#warning cannot create vector section. Adjust TEXT_BASE to a 1M boundary
#else
arm_create_section(0x0, TEXT_BASE, 1, PMD_SECT_DEF_UNCACHED);
#endif
mmu_enable();
#endif
return 0;
}
mem_initcall(eukrea_cpuimx51_mem_init);

10
arch/arm/boards/freescale-mx51-pdk/board.c
View File

@ -77,16 +77,6 @@ static int babbage_mem_init(void)
{
arm_add_mem_device("ram0", 0x90000000, 512 * 1024 * 1024);
#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0x90000000, 0x90000000, 512, PMD_SECT_DEF_CACHED);
arm_create_section(0xb0000000, 0x90000000, 512, PMD_SECT_DEF_UNCACHED);
setup_dma_coherent(0x20000000);
mmu_enable();
#endif
return 0;
}
mem_initcall(babbage_mem_init);

12
arch/arm/boards/freescale-mx53-loco/board.c
View File

@ -78,18 +78,6 @@ static int loco_mem_init(void)
arm_add_mem_device("ram0", 0x70000000, SZ_512M);
arm_add_mem_device("ram1", 0xb0000000, SZ_512M);
#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0x70000000, 0x70000000, 512, PMD_SECT_DEF_CACHED);
arm_create_section(0x90000000, 0x70000000, 512, PMD_SECT_DEF_UNCACHED);
arm_create_section(0xb0000000, 0xb0000000, 512, PMD_SECT_DEF_CACHED);
arm_create_section(0xd0000000, 0xb0000000, 512, PMD_SECT_DEF_UNCACHED);
setup_dma_coherent(0x20000000);
mmu_enable();
#endif
return 0;
}
mem_initcall(loco_mem_init);

22
arch/arm/boards/guf-cupid/board.c
View File

@ -100,24 +100,18 @@ static int cupid_mem_init(void)
{
arm_add_mem_device("ram0", IMX_SDRAM_CS0, 128 * 1024 * 1024);
#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0x80000000, 0x80000000, 128, PMD_SECT_DEF_CACHED);
arm_create_section(0x90000000, 0x80000000, 128, PMD_SECT_DEF_UNCACHED);
setup_dma_coherent(0x10000000);
mmu_enable();
#ifdef CONFIG_CACHE_L2X0
l2x0_init((void __iomem *)0x30000000, 0x00030024, 0x00000000);
#endif
#endif
return 0;
}
mem_initcall(cupid_mem_init);
static int cupid_mmu_init(void)
{
l2x0_init((void __iomem *)0x30000000, 0x00030024, 0x00000000);
return 0;
}
postmmu_initcall(cupid_mmu_init);
static int cupid_devices_init(void)
{
uint32_t reg;

10
arch/arm/boards/guf-neso/board.c
View File

@ -140,16 +140,6 @@ static int neso_mem_init(void)
{
arm_add_mem_device("ram0", 0xa0000000, 128 * 1024 * 1024);
#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0xa0000000, 0xa0000000, 128, PMD_SECT_DEF_CACHED);
arm_create_section(0xb0000000, 0xa0000000, 128, PMD_SECT_DEF_UNCACHED);
setup_dma_coherent(0x10000000);
mmu_enable();
#endif
return 0;
}
mem_initcall(neso_mem_init);

12
arch/arm/boards/karo-tx25/board.c
View File

@ -59,18 +59,6 @@ static int tx25_mem_init(void)
add_mem_device("ram0", 0x78000000, 128 * 1024,
IORESOURCE_MEM_WRITEABLE);
#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0x80000000, 0x80000000, 32, PMD_SECT_DEF_CACHED);
arm_create_section(0x82000000, 0x80000000, 32, PMD_SECT_DEF_UNCACHED);
arm_create_section(0x90000000, 0x90000000, 32, PMD_SECT_DEF_CACHED);
arm_create_section(0x92000000, 0x90000000, 32, PMD_SECT_DEF_UNCACHED);
setup_dma_coherent(0x02000000);
mmu_enable();
#endif
return 0;
}
mem_initcall(tx25_mem_init);

10
arch/arm/boards/karo-tx28/tx28.c
View File

@ -74,16 +74,6 @@ static int tx28_mem_init(void)
{
arm_add_mem_device("ram0", IMX_MEMORY_BASE, 128 * 1024 * 1024);
#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0x40000000, 0x40000000, 128, PMD_SECT_DEF_CACHED);
arm_create_section(0x50000000, 0x40000000, 128, PMD_SECT_DEF_UNCACHED);
setup_dma_coherent(0x10000000);
mmu_enable();
#endif
return 0;
}
mem_initcall(tx28_mem_init);

8
arch/arm/boards/panda/board.c
View File

@ -48,14 +48,6 @@ static int panda_mem_init(void)
{
arm_add_mem_device("ram0", 0x80000000, SZ_1G);
#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0x80000000, 0x80000000, 256, PMD_SECT_DEF_CACHED);
arm_create_section(0x90000000, 0x80000000, 256, PMD_SECT_DEF_UNCACHED);
mmu_enable();
#endif
return 0;
}
mem_initcall(panda_mem_init);

22
arch/arm/boards/pcm037/pcm037.c
View File

@ -153,24 +153,18 @@ static int pcm037_mem_init(void)
arm_add_mem_device("ram1", IMX_SDRAM_CS1, SDRAM1 * 1024 * 1024);
#endif
#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0x80000000, 0x80000000, 128, PMD_SECT_DEF_CACHED);
arm_create_section(0x90000000, 0x80000000, 128, PMD_SECT_DEF_UNCACHED);
setup_dma_coherent(0x10000000);
mmu_enable();
#ifdef CONFIG_CACHE_L2X0
l2x0_init((void __iomem *)0x30000000, 0x00030024, 0x00000000);
#endif
#endif
return 0;
}
mem_initcall(pcm037_mem_init);
static int pcm037_mmu_init(void)
{
l2x0_init((void __iomem *)0x30000000, 0x00030024, 0x00000000);
return 0;
}
postmmu_initcall(pcm037_mmu_init);
static int imx31_devices_init(void)
{
__REG(CSCR_U(0)) = 0x0000cf03; /* CS0: Nor Flash */

10
arch/arm/boards/pcm038/pcm038.c
View File

@ -135,16 +135,6 @@ static int pcm038_mem_init(void)
add_mem_device("ram0", 0xc8000000, 512 * 1024, /* Can be up to 2MiB */
IORESOURCE_MEM_WRITEABLE);
#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0xa0000000, 0xa0000000, 128, PMD_SECT_DEF_CACHED);
arm_create_section(0xb0000000, 0xa0000000, 128, PMD_SECT_DEF_UNCACHED);
setup_dma_coherent(0x10000000);
mmu_enable();
#endif
return 0;
}
mem_initcall(pcm038_mem_init);

21
arch/arm/boards/pcm043/pcm043.c
View File

@ -103,24 +103,17 @@ static int pcm043_mem_init(void)
{
arm_add_mem_device("ram0", IMX_SDRAM_CS0, 128 * 1024 * 1024);
#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0x80000000, 0x80000000, 128, PMD_SECT_DEF_CACHED);
arm_create_section(0x90000000, 0x80000000, 128, PMD_SECT_DEF_UNCACHED);
setup_dma_coherent(0x10000000);
mmu_enable();
#ifdef CONFIG_CACHE_L2X0
l2x0_init((void __iomem *)0x30000000, 0x00030024, 0x00000000);
#endif
#endif
return 0;
}
mem_initcall(pcm043_mem_init);
static int pcm043_mmu_init(void)
{
l2x0_init((void __iomem *)0x30000000, 0x00030024, 0x00000000);
return 0;
}
postmmu_initcall(pcm043_mmu_init);
struct gpio_led led0 = {
.gpio = 1 * 32 + 6,

9
arch/arm/boards/pcm049/board.c
View File

@ -60,15 +60,6 @@ static int pcm049_mem_init(void)
add_mem_device("sram0", 0x40300000, 48 * 1024,
IORESOURCE_MEM_WRITEABLE);
#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0x80000000, 0x80000000, 256, PMD_SECT_DEF_CACHED);
/* warning: This shadows the second half of our ram */
arm_create_section(0x90000000, 0x80000000, 256, PMD_SECT_DEF_UNCACHED);
mmu_enable();
#endif
return 0;
}
mem_initcall(pcm049_mem_init);

10
arch/arm/boards/phycard-i.MX27/pca100.c
View File

@ -73,16 +73,6 @@ static int pca100_mem_init(void)
{
arm_add_mem_device("ram0", 0xa0000000, 128 * 1024 * 1024);
#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0xa0000000, 0xa0000000, 128, PMD_SECT_DEF_CACHED);
arm_create_section(0xb0000000, 0xa0000000, 128, PMD_SECT_DEF_UNCACHED);
setup_dma_coherent(0x10000000);
mmu_enable();
#endif
return 0;
}
mem_initcall(pca100_mem_init);

3
arch/arm/cpu/mmu.c
View File

@ -180,7 +180,7 @@ static void vectors_init(void)
/*
* Prepare MMU for usage enable it.
*/
int mmu_init(void)
static int mmu_init(void)
{
struct arm_memory *mem;
int i;
@ -227,6 +227,7 @@ int mmu_init(void)
return 0;
}
mmu_initcall(mmu_init);
struct outer_cache_fns outer_cache;

7
arch/arm/include/asm/mmu.h
View File

@ -24,8 +24,6 @@ static inline void setup_dma_coherent(unsigned long offset)
}
#ifdef CONFIG_MMU
int mmu_init(void);
void *dma_alloc_coherent(size_t size);
void dma_free_coherent(void *mem, size_t size);
@ -36,11 +34,6 @@ unsigned long virt_to_phys(void *virt);
void *phys_to_virt(unsigned long phys);
#else
static inline int mmu_init(void)
{
return -EINVAL;
}
static inline void *dma_alloc_coherent(size_t size)
{
return xmemalign(4096, size);