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Merge branch 'for-next/clk' into for-next/imx 

Conflicts:
	drivers/net/fec_imx.c
This commit is contained in:
Sascha Hauer 2012-10-17 20:21:46 +02:00
parent 09efce4ad3 a4c8692240
commit aaad5cbad7
19 changed files with 123 additions and 107 deletions
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15
arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
View File

@ -250,18 +250,3 @@ void __bare_init nand_boot(void)
imx_nand_load_image(_text, barebox_image_size);
}
#endif
static int eukrea_cpuimx25_core_init(void) {
/* enable UART1, FEC, SDHC, USB & I2C clock */
writel(readl(MX25_CCM_BASE_ADDR + CCM_CGCR0) | (1 << 6) | (1 << 23)
| (1 << 15) | (1 << 21) | (1 << 3) | (1 << 28),
MX25_CCM_BASE_ADDR + CCM_CGCR0);
writel(readl(MX25_CCM_BASE_ADDR + CCM_CGCR1) | (1 << 23) | (1 << 15)
| (1 << 13), MX25_CCM_BASE_ADDR + CCM_CGCR1);
writel(readl(MX25_CCM_BASE_ADDR + CCM_CGCR2) | (1 << 14),
MX25_CCM_BASE_ADDR + CCM_CGCR2);
return 0;
}
core_initcall(eukrea_cpuimx25_core_init);

1
arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c
View File

@ -194,7 +194,6 @@ static int eukrea_cpuimx27_devices_init(void)
#endif
imx27_add_nand(&nand_info);
PCCR0 |= PCCR0_I2C1_EN;
i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
imx27_add_i2c0(NULL);

2
arch/arm/boards/guf-neso/lowlevel.c
View File

@ -35,8 +35,6 @@ static void __bare_init __naked insdram(void)
{
uint32_t r;
PCCR1 |= PCCR1_NFC_BAUDEN;
/* setup a stack to be able to call imx_nand_load_image() */
r = STACK_BASE + STACK_SIZE - 12;
__asm__ __volatile__("mov sp, %0" : : "r"(r));

1
arch/arm/boards/imx21ads/imx21ads.c
View File

@ -193,7 +193,6 @@ console_initcall(mx21ads_console_init);
#ifdef CONFIG_NAND_IMX_BOOT
void __bare_init nand_boot(void)
{
PCCR0 |= PCCR0_NFC_EN;
imx_nand_load_image(_text, barebox_image_size);
board_init_lowlevel_return();
}

2
arch/arm/boards/pcm038/lowlevel.c
View File

@ -36,8 +36,6 @@ static void __bare_init __naked insdram(void)
{
uint32_t r;
PCCR1 |= PCCR1_NFC_BAUDEN;
/* setup a stack to be able to call imx_nand_load_image() */
r = STACK_BASE + STACK_SIZE - 12;
__asm__ __volatile__("mov sp, %0" : : "r"(r));

4
arch/arm/boards/pcm038/pcm038.c
View File

@ -282,9 +282,6 @@ static int pcm038_devices_init(void)
for (i = 0; i < ARRAY_SIZE(mode); i++)
imx_gpio_mode(mode[i]);
PCCR0 |= PCCR0_CSPI1_EN;
PCCR1 |= PCCR1_PERCLK2_EN;
spi_register_board_info(pcm038_spi_board_info, ARRAY_SIZE(pcm038_spi_board_info));
imx27_add_spi0(&pcm038_spi_0_data);
@ -294,7 +291,6 @@ static int pcm038_devices_init(void)
imx27_add_nand(&nand_info);
imx27_add_fb(&pcm038_fb_data);
PCCR0 |= PCCR0_I2C1_EN | PCCR0_I2C2_EN;
imx27_add_i2c0(NULL);
imx27_add_i2c1(NULL);

1
arch/arm/boards/pcm038/pcm970.c
View File

@ -162,7 +162,6 @@ static void pcm970_mmc_init(void)
for (i = 0; i < ARRAY_SIZE(mode); i++)
imx_gpio_mode(mode[i]);
PCCR0 |= PCCR0_SDHC2_EN;
imx27_add_mmc1(NULL);
}

4
arch/arm/boards/phycard-i.MX27/pca100.c
View File

@ -279,8 +279,6 @@ static int pca100_devices_init(void)
PD18_PF_I2C_CLK,
};
PCCR0 |= PCCR0_SDHC2_EN;
pca100_usb_init();
/* initizalize gpios */
@ -292,8 +290,6 @@ static int pca100_devices_init(void)
imx27_add_mmc1(NULL);
imx27_add_fb(&pca100_fb_data);
PCCR1 |= PCCR1_PERCLK2_EN;
#ifdef CONFIG_USB
pca100_usb_register();
#endif

17
arch/arm/mach-imx/clk-imx21.c
View File

@ -47,7 +47,7 @@
enum imx21_clks {
ckil, ckih, fpm, mpll_sel, spll_sel, mpll, spll, fclk, hclk, ipg, per1,
per2, per3, per4, usb_div, nfc_div, clk_max
per2, per3, per4, usb_div, nfc_div, lcdc_per_gate, clk_max
};
static struct clk *clks[clk_max];
@ -70,6 +70,16 @@ static int imx21_ccm_probe(struct device_d *dev)
base = dev_request_mem_region(dev, 0);
writel((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) | (1 << 5) |
(1 << 9) | (1 << 10) | (1 << 11) | (1 << 12) |
(1 << 13) | (1 << 14) | (1 << 19) | (1 << 22) |
(1 << 24) | (1 << 26) | (1 << 30),
base + CCM_PCCR0);
writel((1 << 23) | (1 << 24) | (1 << 25) | (1 << 26) | (1 << 27) |
(1 << 28) | (1 << 29) | (1 << 30) | (1 << 31),
base + CCM_PCCR1);
clks[ckil] = clk_fixed("ckil", lref);
clks[ckih] = clk_fixed("ckih", href);
clks[fpm] = imx_clk_fixed_factor("fpm", "ckil", 512, 1);
@ -88,6 +98,7 @@ static int imx21_ccm_probe(struct device_d *dev)
clks[per4] = imx_clk_divider("per4", "mpll", base + CCM_PCDR1, 24, 6);
clks[usb_div] = imx_clk_divider("usb_div", "spll", base + CCM_CSCR, 26, 3);
clks[nfc_div] = imx_clk_divider("nfc_div", "ipg", base + CCM_PCDR0, 12, 4);
clks[lcdc_per_gate] = imx_clk_gate("lcdc_per_gate", "per3", base + CCM_PCCR0, 18);
clkdev_add_physbase(clks[per1], MX21_GPT1_BASE_ADDR, NULL);
clkdev_add_physbase(clks[per1], MX21_GPT2_BASE_ADDR, NULL);
@ -98,11 +109,11 @@ static int imx21_ccm_probe(struct device_d *dev)
clkdev_add_physbase(clks[per1], MX21_UART4_BASE_ADDR, NULL);
clkdev_add_physbase(clks[per2], MX21_CSPI1_BASE_ADDR, NULL);
clkdev_add_physbase(clks[per2], MX21_CSPI2_BASE_ADDR, NULL);
clkdev_add_physbase(clks[per2], MX21_CSPI3_BASE_ADDR, NULL);
clkdev_add_physbase(clks[ipg], MX21_I2C_BASE_ADDR, NULL);
clkdev_add_physbase(clks[ipg], MX21_SDHC1_BASE_ADDR, NULL);
clkdev_add_physbase(clks[ipg], MX21_SDHC2_BASE_ADDR, NULL);
clkdev_add_physbase(clks[per3], MX21_CSPI3_BASE_ADDR, NULL);
clkdev_add_physbase(clks[per3], MX21_LCDC_BASE_ADDR, NULL);
clkdev_add_physbase(clks[lcdc_per_gate], MX21_LCDC_BASE_ADDR, NULL);
return 0;
}

4
arch/arm/mach-imx/clk-imx25.c
View File

@ -55,7 +55,7 @@ enum mx25_clks {
per7_sel, per8_sel, per9_sel, per10_sel, per11_sel, per12_sel,
per13_sel, per14_sel, per15_sel, per0, per1, per2, per3, per4, per5,
per6, per7, per8, per9, per10, per11, per12, per13, per14, per15,
clk_max
lcdc_per_gate, clk_max
};
static struct clk *clks[clk_max];
@ -132,6 +132,7 @@ static int imx25_ccm_probe(struct device_d *dev)
clks[per13] = imx_clk_divider("per13", "per13_sel", base + CCM_PCDR3, 8, 6);
clks[per14] = imx_clk_divider("per14", "per14_sel", base + CCM_PCDR3, 16, 6);
clks[per15] = imx_clk_divider("per15", "per15_sel", base + CCM_PCDR3, 24, 6);
clks[lcdc_per_gate] = imx_clk_gate("lcdc_per_gate", "per7", base + CCM_CGCR0, 7);
clkdev_add_physbase(clks[per15], MX25_UART1_BASE_ADDR, NULL);
clkdev_add_physbase(clks[per15], MX25_UART2_BASE_ADDR, NULL);
@ -148,6 +149,7 @@ static int imx25_ccm_probe(struct device_d *dev)
clkdev_add_physbase(clks[ipg], MX25_CSPI3_BASE_ADDR, NULL);
clkdev_add_physbase(clks[per3], MX25_ESDHC1_BASE_ADDR, NULL);
clkdev_add_physbase(clks[per4], MX25_ESDHC2_BASE_ADDR, NULL);
clkdev_add_physbase(clks[lcdc_per_gate], MX25_LCDC_BASE_ADDR, NULL);
return 0;
}

25
arch/arm/mach-imx/clk-imx27.c
View File

@ -30,7 +30,7 @@
enum mx27_clks {
dummy, ckih, ckil, mpll, spll, mpll_main2, ahb, ipg, nfc_div, per1_div,
per2_div, per3_div, per4_div, usb_div, cpu_sel, clko_sel, cpu_div, clko_div,
clko_en, clk_max
clko_en, lcdc_per_gate, clk_max
};
static struct clk *clks[clk_max];
@ -73,18 +73,18 @@ static int imx27_ccm_probe(struct device_d *dev)
base = dev_request_mem_region(dev, 0);
writel(PCCR0_SDHC3_EN | PCCR0_SDHC2_EN | PCCR0_SDHC1_EN |
PCCR0_PWM_EN | PCCR0_KPP_EN | PCCR0_IIM_EN | PCCR0_I2C2_EN |
PCCR0_I2C1_EN | PCCR0_GPT6_EN | PCCR0_GPT5_EN | PCCR0_GPT4_EN |
PCCR0_GPT3_EN | PCCR0_GPT2_EN | PCCR0_GPT1_EN | PCCR0_GPIO_EN |
PCCR0_FEC_EN | PCCR0_CSPI3_EN | PCCR0_CSPI2_EN | PCCR0_CSPI1_EN,
PCCR0_PWM_EN | PCCR0_KPP_EN | PCCR0_LCDC_EN | PCCR0_IIM_EN |
PCCR0_I2C2_EN | PCCR0_I2C1_EN | PCCR0_GPT6_EN | PCCR0_GPT5_EN |
PCCR0_GPT4_EN | PCCR0_GPT3_EN | PCCR0_GPT2_EN | PCCR0_GPT1_EN |
PCCR0_GPIO_EN | PCCR0_FEC_EN | PCCR0_CSPI3_EN | PCCR0_CSPI2_EN |
PCCR0_CSPI1_EN,
base + CCM_PCCR0);
writel(PCCR1_NFC_BAUDEN | PCCR1_PERCLK4_EN | PCCR1_PERCLK3_EN |
PCCR1_PERCLK2_EN | PCCR1_PERCLK1_EN | PCCR1_HCLK_USB |
PCCR1_HCLK_FEC | PCCR1_HCLK_EMI | PCCR1_WDT_EN | PCCR1_USB_EN |
PCCR1_UART6_EN | PCCR1_UART5_EN | PCCR1_UART4_EN |
PCCR1_UART3_EN | PCCR1_UART2_EN | PCCR1_UART1_EN,
base + CCM_PCCR1);
writel(PCCR1_NFC_BAUDEN | PCCR1_PERCLK4_EN | PCCR1_PERCLK2_EN | PCCR1_PERCLK1_EN |
PCCR1_HCLK_USB | PCCR1_HCLK_LCDC | PCCR1_HCLK_FEC | PCCR1_HCLK_EMI |
PCCR1_WDT_EN | PCCR1_USB_EN | PCCR1_UART6_EN | PCCR1_UART5_EN |
PCCR1_UART4_EN | PCCR1_UART3_EN | PCCR1_UART2_EN | PCCR1_UART1_EN,
base + CCM_PCCR1);
clks[dummy] = clk_fixed("dummy", 0);
clks[ckih] = clk_fixed("ckih", 26000000);
@ -116,6 +116,7 @@ static int imx27_ccm_probe(struct device_d *dev)
else
clks[cpu_div] = imx_clk_divider("cpu_div", "cpu_sel", base + CCM_CSCR, 13, 3);
clks[clko_div] = imx_clk_divider("clko_div", "clko_sel", base + CCM_PCDR0, 22, 3);
clks[lcdc_per_gate] = imx_clk_gate("lcdc_per_gate", "per3_div", base + CCM_PCCR1, 7);
clkdev_add_physbase(clks[per1_div], MX27_GPT1_BASE_ADDR, NULL);
clkdev_add_physbase(clks[per1_div], MX27_GPT2_BASE_ADDR, NULL);
@ -137,7 +138,7 @@ static int imx27_ccm_probe(struct device_d *dev)
clkdev_add_physbase(clks[per2_div], MX27_SDHC1_BASE_ADDR, NULL);
clkdev_add_physbase(clks[per2_div], MX27_SDHC2_BASE_ADDR, NULL);
clkdev_add_physbase(clks[per2_div], MX27_SDHC3_BASE_ADDR, NULL);
clkdev_add_physbase(clks[per3_div], MX27_LCDC_BASE_ADDR, NULL);
clkdev_add_physbase(clks[lcdc_per_gate], MX27_LCDC_BASE_ADDR, NULL);
clkdev_add_physbase(clks[ipg], MX27_FEC_BASE_ADDR, NULL);
return 0;

6
arch/arm/mach-imx/clk.h
View File

@ -19,6 +19,12 @@ static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
return clk_mux(name, reg, shift, width, parents, num_parents);
}
static inline struct clk *imx_clk_gate(const char *name, const char *parent,
void __iomem *reg, u8 shift)
{
return clk_gate(name, parent, reg, shift);
}
struct clk *imx_clk_pllv1(const char *name, const char *parent,
void __iomem *base);

12
arch/arm/mach-imx/clocksource.c
View File

@ -108,18 +108,6 @@ static int imx_gpt_probe(struct device_d *dev)
/* setup GP Timer 1 */
writel(TCTL_SWR, timer_base + GPT_TCTL);
#ifdef CONFIG_ARCH_IMX21
PCCR1 |= PCCR1_GPT1_EN;
#endif
#ifdef CONFIG_ARCH_IMX27
PCCR0 |= PCCR0_GPT1_EN;
PCCR1 |= PCCR1_PERCLK1_EN;
#endif
#ifdef CONFIG_ARCH_IMX25
writel(readl(IMX_CCM_BASE + CCM_CGCR1) | (1 << 19),
IMX_CCM_BASE + CCM_CGCR1);
#endif
for (i = 0; i < 100; i++)
writel(0, timer_base + GPT_TCTL); /* We have no udelay by now */

3
drivers/clk/Makefile
View File

@ -1,2 +1,3 @@
obj-$(CONFIG_COMMON_CLK) += clk.o clk-fixed.o clk-divider.o clk-fixed-factor.o clk-mux.o
obj-$(CONFIG_COMMON_CLK) += clk.o clk-fixed.o clk-divider.o clk-fixed-factor.o \
clk-mux.o clk-gate.o
obj-$(CONFIG_CLKDEV_LOOKUP) += clkdev.o

78
drivers/clk/clk-gate.c Normal file
View File

@ -0,0 +1,78 @@
/*
* clk-gate.c - generic barebox clock support. Based on Linux clk support
*
* Copyright (c) 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#include <common.h>
#include <io.h>
#include <malloc.h>
#include <linux/clk.h>
#include <linux/err.h>
struct clk_gate {
struct clk clk;
void __iomem *reg;
int shift;
const char *parent;
};
static int clk_gate_enable(struct clk *clk)
{
struct clk_gate *g = container_of(clk, struct clk_gate, clk);
u32 val;
val = readl(g->reg);
val |= 1 << g->shift;
writel(val, g->reg);
return 0;
}
static void clk_gate_disable(struct clk *clk)
{
struct clk_gate *g = container_of(clk, struct clk_gate, clk);
u32 val;
val = readl(g->reg);
val &= ~(1 << g->shift);
writel(val, g->reg);
}
struct clk_ops clk_gate_ops = {
.enable = clk_gate_enable,
.disable = clk_gate_disable,
};
struct clk *clk_gate(const char *name, const char *parent, void __iomem *reg,
u8 shift)
{
struct clk_gate *g = xzalloc(sizeof(*g));
int ret;
g->parent = parent;
g->reg = reg;
g->shift = shift;
g->clk.ops = &clk_gate_ops;
g->clk.name = name;
g->clk.parent_names = &g->parent;
g->clk.num_parents = 1;
ret = clk_register(&g->clk);
if (ret) {
free(g);
return ERR_PTR(ret);
}
return &g->clk;
}

6
drivers/mtd/nand/nand_imx.c
View File

@ -1107,12 +1107,6 @@ static int __init imxnd_probe(struct device_d *dev)
struct nand_ecclayout *oob_smallpage, *oob_largepage, *oob_4kpage;
int err = 0;
#ifdef CONFIG_ARCH_IMX27
PCCR1 |= PCCR1_NFC_BAUDEN;
#endif
#ifdef CONFIG_ARCH_IMX21
PCCR0 |= PCCR0_NFC_EN;
#endif
/* Allocate memory for MTD device structure and private data */
host = kzalloc(sizeof(struct imx_nand_host) + NAND_MAX_PAGESIZE +
NAND_MAX_OOBSIZE, GFP_KERNEL);

3
drivers/net/fec_imx.c
View File

@ -634,9 +634,6 @@ static int fec_probe(struct device_d *dev)
if (ret)
return ret;
#ifdef CONFIG_ARCH_IMX27
PCCR0 |= PCCR0_FEC_EN;
#endif
fec = xzalloc(sizeof(*fec));
fec->type = type;
edev = &fec->edev;

44
drivers/video/imx.c
View File

@ -252,19 +252,9 @@ static void imxfb_enable_controller(struct fb_info *info)
struct imxfb_info *fbi = info->priv;
writel(RMCR_LCDC_EN, fbi->regs + LCDC_RMCR);
#ifdef CONFIG_ARCH_IMX21
PCCR0 |= PCCR0_PERCLK3_EN | PCCR0_HCLK_LCDC_EN;
#endif
#ifdef CONFIG_ARCH_IMX27
PCCR0 |= PCCR0_LCDC_EN;
PCCR1 |= PCCR1_HCLK_LCDC;
#endif
#ifdef CONFIG_ARCH_IMX25
writel(readl(IMX_CCM_BASE + CCM_CGCR0) | (1 << 24) | (1 << 7),
IMX_CCM_BASE + CCM_CGCR0);
writel(readl(IMX_CCM_BASE + CCM_CGCR1) | (1 << 29),
IMX_CCM_BASE + CCM_CGCR1);
#endif
clk_enable(fbi->clk);
if (fbi->enable)
fbi->enable(1);
}
@ -277,19 +267,8 @@ static void imxfb_disable_controller(struct fb_info *info)
fbi->enable(0);
writel(0, fbi->regs + LCDC_RMCR);
#ifdef CONFIG_ARCH_IMX21
PCCR0 &= ~(PCCR0_PERCLK3_EN | PCCR0_HCLK_LCDC_EN);
#endif
#ifdef CONFIG_ARCH_IMX27
PCCR0 &= ~PCCR0_LCDC_EN;
PCCR1 &= ~PCCR1_HCLK_LCDC;
#endif
#ifdef CONFIG_ARCH_IMX25
writel(readl(IMX_CCM_BASE + CCM_CGCR0) & ~((1 << 24) | (1 << 7)),
IMX_CCM_BASE + CCM_CGCR0);
writel(readl(IMX_CCM_BASE + CCM_CGCR1) & ~(1 << 29),
IMX_CCM_BASE + CCM_CGCR1);
#endif
clk_disable(fbi->clk);
}
/*
@ -541,19 +520,6 @@ static int imxfb_probe(struct device_d *dev)
if (!pdata)
return -ENODEV;
#ifdef CONFIG_ARCH_IMX21
PCCR0 &= ~(PCCR0_PERCLK3_EN | PCCR0_HCLK_LCDC_EN);
#endif
#ifdef CONFIG_ARCH_IMX27
PCCR0 &= ~PCCR0_LCDC_EN;
PCCR1 &= ~PCCR1_HCLK_LCDC;
#endif
#ifdef CONFIG_ARCH_IMX25
writel(readl(IMX_CCM_BASE + CCM_CGCR0) & ~((1 << 24) | (1 << 7)),
IMX_CCM_BASE + CCM_CGCR0);
writel(readl(IMX_CCM_BASE + CCM_CGCR1) & ~(1 << 29),
IMX_CCM_BASE + CCM_CGCR1);
#endif
if (!pdata->num_modes) {
dev_err(dev, "no modes. bailing out\n");
return -EINVAL;

2
include/linux/clk.h
View File

@ -188,6 +188,8 @@ struct clk *clk_fixed_factor(const char *name,
const char *parent, unsigned int mult, unsigned int div);
struct clk *clk_mux(const char *name, void __iomem *reg,
u8 shift, u8 width, const char **parents, u8 num_parents);
struct clk *clk_gate(const char *name, const char *parent, void __iomem *reg,
u8 shift);
int clk_register(struct clk *clk);