arm: tegra: enable ARM errata workarounds
Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -18,6 +18,7 @@
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#include <sizes.h>
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#include <sizes.h>
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#include <asm/barebox-arm-head.h>
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#include <asm/barebox-arm-head.h>
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#include <asm/barebox-arm.h>
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#include <asm/barebox-arm.h>
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#include <asm/errata.h>
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#include <mach/lowlevel.h>
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#include <mach/lowlevel.h>
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#include <mach/tegra20-pmc.h>
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#include <mach/tegra20-pmc.h>
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#include <mach/tegra20-car.h>
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#include <mach/tegra20-car.h>
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@ -30,6 +31,23 @@ void tegra_maincomplex_entry(void)
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arm_cpu_lowlevel_init();
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arm_cpu_lowlevel_init();
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chiptype = tegra_get_chiptype();
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/* enable ARM errata workarounds early */
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switch (chiptype) {
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case TEGRA20:
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enable_arm_errata_716044_war();
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enable_arm_errata_742230_war();
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enable_arm_errata_751472_war();
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break;
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case TEGRA30:
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enable_arm_errata_743622_war();
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enable_arm_errata_751472_war();
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break;
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default:
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break;
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}
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/* switch to PLLX */
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/* switch to PLLX */
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writel(CRC_CCLK_BURST_POLICY_SYS_STATE_RUN <<
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writel(CRC_CCLK_BURST_POLICY_SYS_STATE_RUN <<
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CRC_CCLK_BURST_POLICY_SYS_STATE_SHIFT |
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CRC_CCLK_BURST_POLICY_SYS_STATE_SHIFT |
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@ -38,8 +56,6 @@ void tegra_maincomplex_entry(void)
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TEGRA_CLK_RESET_BASE + CRC_CCLK_BURST_POLICY);
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TEGRA_CLK_RESET_BASE + CRC_CCLK_BURST_POLICY);
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writel(CRC_SUPER_CDIV_ENB, TEGRA_CLK_RESET_BASE + CRC_SUPER_CCLK_DIV);
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writel(CRC_SUPER_CDIV_ENB, TEGRA_CLK_RESET_BASE + CRC_SUPER_CCLK_DIV);
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chiptype = tegra_get_chiptype();
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if (chiptype >= TEGRA114) {
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if (chiptype >= TEGRA114) {
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asm("mrc p15, 1, %0, c9, c0, 2" : : "r" (reg));
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asm("mrc p15, 1, %0, c9, c0, 2" : : "r" (reg));
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reg &= ~7;
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reg &= ~7;
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@ -51,6 +67,7 @@ void tegra_maincomplex_entry(void)
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case TEGRA20:
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case TEGRA20:
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rambase = 0x0;
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rambase = 0x0;
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ramsize = tegra20_get_ramsize();
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ramsize = tegra20_get_ramsize();
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break;
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break;
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case TEGRA30:
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case TEGRA30:
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case TEGRA124:
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case TEGRA124:
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