ARM: am335x: phyFLEX-AM335x: Split DT and add MLO DT
To support different module variants, this patch splits the phyFLEX DT in dts and dtsi. And we are also adding a DT for the MLO, which has all bootable devices disabled. The bootsource is checked in the board file and only the needed device is enabled and registered. Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -87,6 +87,10 @@ static int pfla03_devices_init(void)
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xloadslots, ARRAY_SIZE(xloadslots));
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am33xx_bbu_nand_register_handler("nand", "/dev/nand0.barebox.bb");
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if (IS_ENABLED(CONFIG_SHELL_NONE))
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return am33xx_of_register_bootdevice();
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return 0;
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}
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device_initcall(pfla03_devices_init);
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@ -102,7 +102,8 @@ struct pfla03_sdram_timings pfla03_timings[] = {
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},
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};
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extern char __dtb_am335x_phytec_phyflex_start[];
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extern char __dtb_am335x_phytec_phyflex_som_start[];
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extern char __dtb_am335x_phytec_phyflex_som_mlo_start[];
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/**
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* @brief The basic entry point for board initialization.
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@ -139,7 +140,7 @@ static noinline void pfla03_board_init(int sdram)
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omap_uart_lowlevel_init((void *)AM33XX_UART0_BASE);
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putc_ll('>');
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fdt = __dtb_am335x_phytec_phyflex_start - get_runtime_offset();
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fdt = __dtb_am335x_phytec_phyflex_som_mlo_start - get_runtime_offset();
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am335x_barebox_entry(fdt);
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}
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@ -174,7 +175,7 @@ ENTRY_FUNCTION(start_am33xx_phytec_phyflex_sdram, r0, r1, r2)
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{
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void *fdt;
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fdt = __dtb_am335x_phytec_phyflex_start - get_runtime_offset();
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fdt = __dtb_am335x_phytec_phyflex_som_start - get_runtime_offset();
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am335x_barebox_entry(fdt);
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}
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@ -30,7 +30,7 @@ pbl-dtb-$(CONFIG_MACH_PCA100) += imx27-phytec-phycard-s-rdk-bb.dtb.o
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pbl-dtb-$(CONFIG_MACH_PCAAXL3) += imx6q-phytec-pbaa03.dtb.o
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pbl-dtb-$(CONFIG_MACH_PCM038) += imx27-phytec-phycore-rdk.dtb.o
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pbl-dtb-$(CONFIG_MACH_PCM051) += am335x-phytec-phycore-som.dtb.o am335x-phytec-phycore-som-no-spi.dtb.o am335x-phytec-phycore-som-mlo.dtb.o
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pbl-dtb-$(CONFIG_MACH_PFLA03) += am335x-phytec-phyflex.dtb.o
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pbl-dtb-$(CONFIG_MACH_PFLA03) += am335x-phytec-phyflex-som.dtb.o am335x-phytec-phyflex-som-mlo.dtb.o
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pbl-dtb-$(CONFIG_MACH_PHYTEC_PFLA02) += imx6s-phytec-pbab01.dtb.o imx6dl-phytec-pbab01.dtb.o imx6q-phytec-pbab01.dtb.o imx6q-phytec-phyboard-alcor.dtb.o imx6dl-phytec-phyboard-subra.dtb.o
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pbl-dtb-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_AX3) += armada-xp-openblocks-ax3-4-bb.dtb.o
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pbl-dtb-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_A6) += kirkwood-openblocks_a6-bb.dtb.o
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@ -0,0 +1,28 @@
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/*
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* Copyright (C) 2015 Wadim Egorov <w.egorov@phytec.de> PHYTEC Messtechnik GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "am33xx.dtsi"
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#include "am335x-phytec-phyflex-som.dtsi"
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/ {
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model = "Phytec phyFLEX AM335x";
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compatible = "phytec,phyflex-am335x-som", "ti,am33xx";
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};
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/* Keep all bootsources disabled, we enable and register them
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* later while booting.
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*/
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&mmc1 {
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status = "disabled";
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};
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&gpmc {
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status = "disabled";
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};
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@ -0,0 +1,24 @@
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/*
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* Copyright (C) 2015 Wadim Egorov <w.egorov@phytec.de> PHYTEC Messtechnik GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "am33xx.dtsi"
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#include "am335x-phytec-phyflex-som.dtsi"
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/ {
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model = "Phytec phyFLEX AM335x";
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compatible = "phytec,phyflex-am335x-som", "ti,am33xx";
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};
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&spi0 {
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status = "okay";
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};
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&at24c32 {
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status = "okay";
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};
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@ -1,11 +1,4 @@
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/dts-v1/;
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#include "am33xx.dtsi"
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/ {
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model = "Phytec phyFLEX AM335x";
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compatible = "phytec,phyflex-am335x-som", "ti,am33xx";
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chosen {
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linux,stdout-path = &uart0;
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@ -36,16 +29,10 @@
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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};
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};
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&am33xx_pinmux {
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usb_pins: pinmux_usb {
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pinctrl-single,pins = <
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0x21c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
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0x234 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* usb1_drvvbus.usb1_drvvbus */
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>;
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};
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i2c0_pins: pinmux_i2c0_pins {
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pinctrl-single,pins = <
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0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda */
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@ -77,7 +64,7 @@
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0x0fc (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0 */
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0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk */
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0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd */
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>;
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>;
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};
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emac_rgmii1_pins: pinmux_emac_rgmii1_pins {
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@ -136,30 +123,6 @@
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};
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};
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&cppi41dma {
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status = "okay";
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};
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&usb_ctrl_mod {
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status = "okay";
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};
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&usb {
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pinctrl-names = "default";
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pinctrl-0 = <&usb_pins>;
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status = "okay";
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};
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&usb1 {
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dr_mode = "host";
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status = "okay";
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};
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&usb1_phy {
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status = "okay";
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins>;
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@ -187,7 +150,7 @@
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_pins>;
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status = "okay";
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status = "disabled";
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flash: m25p80 {
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compatible = "m25p80";
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spi-max-frequency = <48000000>;
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