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MIPS: introduce ram0 regions register function 

On MIPS there are two segments in CPU address space that
can be used for untranslated memory access: KSEG0 and KSEG1.
KSEG0 is used for cached access and KSEG1 is used for
uncached one.

The instroduced mips_add_ram0() function registers two
address regions for memory access: one in KSEG0 and
the other one in KSEG1.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Antony Pavlov 2013-01-26 20:52:37 +04:00 committed by Sascha Hauer
parent 1e8c9c5a4a
commit ee3e2a8392
1 changed files with 12 additions and 0 deletions
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12
arch/mips/include/asm/memory.h Normal file
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#ifndef __ASM_MIPS_MEMORY_H
#define __ASM_MIPS_MEMORY_H
#include <memory.h>
#include <asm/addrspace.h>
static inline void mips_add_ram0(resource_size_t size)
{
barebox_add_memory_bank("kseg0_ram0", KSEG0, size);
barebox_add_memory_bank("kseg1_ram0", KSEG1, size);
}
#endif /* __ASM_MIPS_MEMORY_H */