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Merge branch 'for-next/mxs-usb'

Conflicts:
	arch/arm/mach-mxs/Makefile
This commit is contained in:
Sascha Hauer 2012-07-02 11:02:39 +02:00
commit f023835a79
6 changed files with 114 additions and 7 deletions

View File

@ -316,7 +316,7 @@ static void falconwing_init_usb(void)
/* bring USB hub out of reset */
gpio_direction_output(GPIO_USB_HUB_RESET, 1);
imx_usb_phy_enable();
imx23_usb_phy_enable();
add_generic_usb_ehci_device(-1, IMX_USB_BASE, NULL);
}

View File

@ -1,5 +1,5 @@
obj-y += imx.o iomux-imx.o power.o
obj-$(CONFIG_DRIVER_VIDEO_STM) += imx_lcd_clk.o
obj-$(CONFIG_ARCH_IMX23) += speed-imx23.o clocksource-imx23.o usb.o soc-imx23.o
obj-$(CONFIG_ARCH_IMX28) += speed-imx28.o clocksource-imx28.o soc-imx28.o
obj-$(CONFIG_ARCH_IMX23) += speed-imx23.o clocksource-imx23.o usb-imx23.o soc-imx23.o
obj-$(CONFIG_ARCH_IMX28) += speed-imx28.o clocksource-imx28.o usb-imx28.o soc-imx28.o
obj-$(CONFIG_MXS_OCOTP) += ocotp.o

View File

@ -29,6 +29,7 @@
#define IMX_SSP2_BASE 0x80014000
#define IMX_SSP3_BASE 0x80016000
#define IMX_IOMUXC_BASE 0x80018000
#define IMX_DIGCTL_BASE 0x8001c000
#define IMX_OCOTP_BASE 0x8002c000
#define IMX_FB_BASE 0x80030000
#define IMX_CCM_BASE 0x80040000
@ -43,6 +44,9 @@
#define IMX_UART3_BASE 0x80070000
#define IMX_UART4_BASE 0x80072000
#define IMX_DBGUART_BASE 0x80074000
#define IMX_USBPHY0_BASE 0x8007c000
#define IMX_USBPHY1_BASE 0x8007e000
#define IMX_USB_BASE 0x80080000
#define IMX_FEC0_BASE 0x800F0000
#define IMX_FEC1_BASE 0x800F4000

View File

@ -1,6 +1,9 @@
#ifndef __MACH_USB_H
#define __MACH_USB_H
int imx_usb_phy_enable(void);
int imx23_usb_phy_enable(void);
int imx28_usb_phy0_enable(void);
int imx28_usb_phy1_enable(void);
#endif /* __MACH_USB_H */

View File

@ -1,5 +1,5 @@
/*
* i.MX23/28 USBPHY setup
* i.MX23 USBPHY setup
*
* Copyright 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
*
@ -37,7 +37,7 @@
#define SET 0x4
#define CLR 0x8
int imx_usb_phy_enable(void)
int imx23_usb_phy_enable(void)
{
imx_power_prepare_usbphy();
@ -63,4 +63,3 @@ int imx_usb_phy_enable(void)
return 0;
}

View File

@ -0,0 +1,101 @@
/*
* i.MX28 USBPHY setup
*
* Copyright 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <common.h>
#include <io.h>
#include <errno.h>
#include <mach/imx-regs.h>
#define POWER_CTRL (IMX_POWER_BASE + 0x0)
#define POWER_CTRL_CLKGATE 0x40000000
#define POWER_STS (IMX_POWER_BASE + 0xc0)
#define POWER_STS_VBUSVALID 0x00000002
#define POWER_STS_BVALID 0x00000004
#define POWER_STS_AVALID 0x00000008
#define POWER_DEBUG (IMX_POWER_BASE + 0x110)
#define POWER_DEBUG_BVALIDPIOLOCK 0x00000002
#define POWER_DEBUG_AVALIDPIOLOCK 0x00000004
#define POWER_DEBUG_VBUSVALIDPIOLOCK 0x00000008
#define USBPHY_PWD 0x0
#define USBPHY_CTRL 0x30
#define USBPHY_CTRL_SFTRST (1 << 31)
#define USBPHY_CTRL_CLKGATE (1 << 30)
#define USBPHY_CTRL_ENUTMILEVEL3 (1 << 15)
#define USBPHY_CTRL_ENUTMILEVEL2 (1 << 14)
#define CLK_PLL0CTRL0 (IMX_CCM_BASE + 0x0)
#define CLK_PLL1CTRL0 (IMX_CCM_BASE + 0x20)
#define PLLCTRL0_EN_USB_CLKS (1 << 18)
#define DIGCTRL_CTRL (IMX_DIGCTL_BASE + 0x0)
#define DIGCTL_CTRL_USB0_CLKGATE (1 << 2)
#define DIGCTL_CTRL_USB1_CLKGATE (1 << 16)
#define SET 0x4
#define CLR 0x8
static void imx28_usb_phy_reset(void __iomem *phybase)
{
/* Reset USBPHY module */
writel(USBPHY_CTRL_SFTRST, phybase + USBPHY_CTRL + SET);
udelay(10);
writel(USBPHY_CTRL_CLKGATE | USBPHY_CTRL_SFTRST,
phybase + USBPHY_CTRL + CLR);
}
static void imx28_usb_phy_enable(void __iomem *phybase)
{
/* Power up the PHY */
writel(0, phybase + USBPHY_PWD);
writel(USBPHY_CTRL_ENUTMILEVEL3 | USBPHY_CTRL_ENUTMILEVEL2 | 1,
phybase + USBPHY_CTRL + SET);
}
int imx28_usb_phy0_enable(void)
{
imx28_usb_phy_reset((void *)IMX_USBPHY0_BASE);
/* Turn on the USB clocks */
writel(PLLCTRL0_EN_USB_CLKS, CLK_PLL0CTRL0 + SET);
writel(DIGCTL_CTRL_USB0_CLKGATE, DIGCTRL_CTRL + CLR);
imx28_usb_phy_enable((void *)IMX_USBPHY0_BASE);
return 0;
}
int imx28_usb_phy1_enable(void)
{
imx28_usb_phy_reset((void *)IMX_USBPHY1_BASE);
/* Turn on the USB clocks */
writel(PLLCTRL0_EN_USB_CLKS, CLK_PLL1CTRL0 + SET);
writel(DIGCTL_CTRL_USB1_CLKGATE, DIGCTRL_CTRL + CLR);
imx28_usb_phy_enable((void *)IMX_USBPHY1_BASE);
return 0;
}