having DSR support in mci-core we need a way to
forward the DSR value to the driver. Add it to
platform data for imx-esdhc
TODO: implement the same for other host controller
drivers
Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
A lot of files rely on include/driver.h including include/of.h (and
this including include/errno.h. include the files explicitly so we can
eventually get rid of including of.h from driver.h
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
At least i.MX53 has errata ENGcm12360:
Occurs when a pending command which issues busy is completed.
For a command with R1b response, the proper software sequence
is to poll the DLA for R1b commands to determine busy
state completion. The DLA polling is not working properly for
the ESDHC module. This is relevant for all eSDHC ports (eSDHC1-4 ports)
DLA bit in PRSSTAT register cannot be
polled to wait for busy state completion.
Updated block guide to reflect that DLA is not applicable to detect
busy state, instead, should poll bit 24 in PRSSTAT register (DLSL[0] bit)
to check that wait busy state is over.
Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use MMC_CAP_ names instead of MMC_MODE_. This makes it more
clear that these are capabilities of host/card and do not refer
to the current mode. These are in line with the Linux Kernel
except for MMC_CAP_MMC_HIGHSPEED_52MHZ which could be fixed
later.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This updates the i.MX esdhc divider settings to FSLs U-Boot.
Current timings work fine for SD cards, but not for eMMC.
Although the calculation is fine according to the datasheet and reading from
eMMC works, writing is broken. Atleast on i.MX53/tqma53.
With this patch the result is the same, but uses different divider values to
achieve it.
While at it, replace the udelay with a busy-loop.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This gives the SDHCI specific registers a common name and moves
them to a separate file for use by other SDHCI like drivers.
The SDHCI spec has some 16bit and 8bit registers. The i.MX accesses
these as 32bit registers. These register defines now are named after
the SDHCI registers they combine into one, for example:
SDHCI_HOST_CONTROL__POWER_CONTROL__BLOCK_GAP_CONTROL
is the 32bit version of the SDHCI registers HOST_CONTROL, POWER_CONTROL
and BLOCK_GAP_CONTROL.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Remove some leftover from former powerpc support which has no
relevance for i.MX based esdhc controllers.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
During card probe the mci core may send commands to the card
which the card doesn't understand. This is intended, so do not
print an error message here.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The old clock support is now unused. Remove it. The former i.MX clko
command is superseeded by generic clock manipulation commands.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The timeout for wating for the bus to be idle is too short when the
card does internal garbage collection. This was triggered with filling
an SD card under Linux with /dev/urandom, then doing a saveenv under
barebox afterwards.
Linux has timeouts here up to 300ms. Use a second to be safe.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We are already setup voltages from capabilities register.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Whether the controller works in 8bit mode is not only dependent
on the controller but also on the board having wired up 8 data
lines, so put a capabilities field in platform data.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Too often I have waited to get a reaction from this driver
when something goes wrong. Use timeout loops instead of
inifinite polling loops.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As we'll need more arguments to set_ios over time put them
in a struct mci_ios like the kernel does.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To allow for some generic io accessors introduce io.h and use
this instead of asm/io.h throughout the tree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In the Kernel this bug is described like this:
> The CMDTYPE of the CMD register (offset 0xE) should be set to
> "11" when the STOP CMD12 is issued on imx53 to abort one
> open ended multi-blk IO. Otherwise the TC INT wouldn't
> be generated.
> In exact block transfer, the controller doesn't complete the
> operations automatically as required at the end of the
> transfer and remains on hold if the abort command is not sent.
> As a result, the TC flag is not asserted and SW received timeout
> exeception. Bit1 of Vendor Spec registor is used to fix it.
We do not use exact block transfers in barebox, so we only need
the first part of this fix.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds a driver for the esdhc controller found on Freescale
i.MX25/35/51 SoCs.
This code is based on the U-Boot driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Markus Niebel
Alexander Shiyan
Jean-Christophe PLAGNIOL-VILLARD