The AX88772B uses only 11 bits of the header for the actual size. The other bits
are used for something else. This causes dmesg full of messages:
asix_rx_fixup() Bad Header Length
This patch trims the check to only 11 bits. I believe on older chips, the
remaining 5 top bits are unused.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Adapt phylib from linux
switch all the driver to it
reimplement mii bus
This will allow to have
- phy drivers
- to only connect the phy at then opening of the device
- if the phy is not ready or not up fail on open
Same behaviour as in linux and will allow to share code and simplify porting.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
this rework is done in order to add a phylib and allow to have phy driver support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>