We PAGE_ALIGN the size in dma_alloc_coherent so do it also when free the memory.
Use PAGE_SIZE instead of magic numbers.
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- Add rules to generate dtb files in arch/arm/dts/
- add an initcall which unflattens and probes the internal devicetree
- Add skeleton devicetree
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The comment above barebox_arm_entry promises to preserve the boarddata
variable passed to it which can then later get back with
barebox_arm_boarddata(). This function was missing so far, add it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For making the same binary executable on different SoCs which have
different DRAM addresses we have to be independent of the compile
time link address.
This patch adds relocatable binary support for the ARM architecture.
With this two new functions are available. relocate_to_current_adr
will fixup the binary to continue executing from the current position.
relocate_to_adr will copy the binary to a given address, fixup the
binary and continue executing from there.
For the PBL and the real image relocatable support can be enabled
independently. This is done to (hopefully) better cope with setups
where the PBL runs from SRAM or ROM and the real binary does not.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With relocatable binaries the vector addresses cannot be supplied by
the linker. This adds support for fixing them up during runtime.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since recently with MMU_EARLY support it may happen that setup_c
runs with data caches enabled, so we have to make sure the caches
are flushed before we jump to the new binary.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When we have multi cpu support compiled in we need the cpu architecture
early so that we can pick the correct cacheflush function. Make it available
as static inline function and add a comment above it that this function
normally should not be used.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
reset is confusing with the cpu reset and impossible to grep
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This optionally enabled the MMU in the PBL or during early startup for
the non PBL case. The regular MMU init code will pickup the already enabled
MMU later. This might complicate debugging early code, so this has been
made optional.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move early mmu code to a separate file so that it can be
used from the pbl and the regular image. Disabling the mmu
can be dropped since the regular mmu code is now able to
pickup an enabled mmu.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Additionally to the generic entry point the i.MX specific ones
calculate the SDRAM size automatically so the boards do not have
to care.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Memory is a precious resource, so it makes sense to make it available as
early as possible. By definition the lowlevel init code already knows where
to find memory because it's the lowlevel init code which sets up the memory.
Until all boards are converted this new entry is just a fallback to the old
entry point.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Old cache/uncache pte flags were declared as defines.
Since these flags are determine at runtime they are static
variables.
This patch switch the naming style of these variables to
lower case which is typically used for variables.
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
v7_mmu_cache_flush stores registers on the stack and restores
them afterwards. Additionally v7_mmu_cache_flush is called
from v7_mmu_cache_off *after* disabling the MMU. With this
the following can happen:
- v7_mmu_cache_off disables the MMU. From now on no new values
go to the data cache.
- v7_mmu_cache_off calls v7_mmu_cache_flush which in turn puts
registers on the stack. Due to the MMU being disabled they
do not go into the data cache.
- In v7_mmu_cache_flush the memory the stack is pointing to is
overwritten with the values currently being in the cache.
- v7_mmu_cache_flush restores the registers from the stack with
values from the cache and not the memory where the values have
previously been written to.
Fix this by storing the registers on the stack *before* we disable
the MMU and restore them after we have called v7_mmu_cache_flush.
This way v7_mmu_cache_flush still restores corrupt register values
for the case when the MMU has been disabled, but we will restore
correct values afterwards.
This has been first observed when switching to gcc-4.7.2 when compiling
in Thumb2 mode, but could explain earlier problems also. The result
here was that the register holding the kernel address in start_linux()
was corrupted so that the kernel could not be started.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
PAGE_ALIGN macro is needed to align addresses to page boundaries.
Move this macro to another PAGE_* defines.
Commands which uses remap_range function needs this macro.
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Change function remap_range in arm architecture to make it
global accessable. For example command 'memtest' can change
pte flags to enable or disable cache.
Add dummy function for others architectures that doesn't
have mmu or pte support.
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch provides a global cleanup barebox Kconfig files. This includes
replacing spaces to tabs, formatting in accordance format, removing
extraneous lines and spaces. No functional changes.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The different ARM architectures need different cache functions. This
patch makes them selectable during runtime.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Without MMU enabled we do not need to call __mmu_cache_* as the
caches are not enabled. Calling flush_icache() before jumping
to new code is enough.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The exception handlers need some space to write to. Traditionally
this has been some stack space. This is not necessary at all, so
just use some variable and get rid of the compile time fixed stack
address.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Once we run on multiple SoCs we must know which arm architecture we
are on. Add cpu_architecture() from the kernel to detect it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
start() for the PBL case is a duplicate of board_init_lowlevel_return().
Instead of duplicating it just call it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Jan Weitzel
Sascha Hauer
Jean-Christophe PLAGNIOL-VILLARD
Alexander Shiyan
Alexander Aring
Antony Pavlov
Carlo Caione
Vicente Bergas