As hinted in the linux kernel driver, pxa platforms such as mainstone,
stargate and idp have a broken design, where half-word writes not
aligned to a word address are not working.
This patch is a taking back the half-word write accessor for this
specific case from the linux kernel.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
All the smcs family chips 91c94, 91c96, 91c100, 91c111 share almost the
same behavior and register sets. The noticeable exceptions are coped
with in this patch, ie :
- 91c94 and 91c96 only have an internal 10 Mbps phy
The registers used for phy discovery on later chips will corrupt the
91c96 state.
- 91c94 and 91c96 have a control and config register quite different
from their 91c1xx conterparts
A platform data user defined couple of registers is introduced. If
these values are 0, 91c1xx legacy behavior is assumed.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Smc network IPs can be wired up in different funny ways. For example the
lubbock pxa25x development platform wires all address lines shifted by
2, ie. bus A2 is smc91c96 A0, bus A3 is smc91c96 A1 etc ...
In order to cope with the different possible combination, add a shift
parameter for addresses.
By default, the old behaviour using the 32 bit accesses is kept.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
as today qemu does not support phy, it will return always 0x0 to any read
on the mii bus. So the phy_id is 0 and the link is donw.
To have the norwork running on versatilpb & other qenu board for the link up
at 100Mbps.
Only enable if qemu_fixup is set.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Robert Jarzmik
Jean-Christophe PLAGNIOL-VILLARD