The check for is_imx6q was introduced initially in
f1f6d76370 ("ARM: i.MX6: correct work flow of PFDs from uboot-sources")
to differentiate between i.MX6DL+i.MX6SL and i.MX6Q. The i.MX6D must be
handled like the latter, so drop the check. i.MX6DL+i.MX6SL can be
ignored here since since
a665962824 ("imx6: lowlevel_init: Fix workaround for new i.MX6s chips")
the PFD handling is only done for i.MX6DQ.
Update the comment to be not only logically correct but also helpful.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Enable parent rate propagation for clk_gate2 to allow the
clock consumers to adjust their rates.
One effect of this is that the i.MX6 NAND controller now can adjust
its rate. It already called a clk_set_rate(rate, 96000000), but this
had no effect, so the clock stayed at reset default 24MHz resulting
in a rather slow timing. This became a problem when commit
"1daa3bc mtd: nand_mxs: Setup timing" introduced EDO timing mode for
faster NAND chips. EDO mode can only work properly for cycle times
< 30ns (at least that's specified in the ONFI spec). 1daa3bc resulted
in sporadic NAND read errors on some boards.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sam Ravnborg <sam@ravnborg.org>
Move all MX5 clock functionality which does not apply to i.MX50 to
a new mx51_mx53 related function.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX31 SPI interface was refered by freescale as spi_ver_0_4 in one
of their older vendor extended linux releases. spi_ver_0_4 differs only
in minor aspects to spi_ver_0_7 (i.MX35) which is already supported by
barebox.
Regarding barebox, the differences boil down to the location and length
of the CHIP SELECT and BIT COUNT/BURST LENGTH elements of CONREG. The
spi_ver_0_4 variant is limited to single word bursts with a maximum of
32 bits_per_word.
Add support for the i.MX31 SPI interface to the barebox spi_ver_0_7
implementation.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Now that the MAX variant of the board is also supported by the
same code, rename the board directory to the more generic nitrogen6.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Register regmap against orignal device passed to probe, this way further
in the code/call-chain cdev's device_node will be correctly populated
and it will be discoverable via cdev_by_device_node()
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Amazon Model No. D00901 Kindle3 is an E-Book reader based on the
i.MX35 SOC. The device boots in internal boot mode from a build-in eMMC,
alternatively the device may be set into USB-downloader mode when the
Vol+ key is pressed on startup.
Add support for this device and make barebox a drop-in replacement for
the factory shipped u-boot image.
Constraints for the use as drop-in replacement:
- imximg header (offset 0x400) has a maximum size of 2kB minus 16 byte
since the last 16 bytes are used to store a vendor specific hardware
desctription identifier
- the bootloader space (application plus env) is limited to 256kB minus
16 bytes when installed with offset of 4kB (the u-boot offset was 3kB).
A vendor specific device identifier is stored in the gap between
application and kernel. The vendor specific identifiers should not
be overwritten.
Notable features:
- Support for eMMC, USB, UART, I2C, SPI and Keys (except keyboard)
- Full support for vendor specific ATAGs
- usbserial barebox console access by pressing Select button at startup,
alternatively full console support on connector J14.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Three iomux were accessinble with two distinct names, typo?
Remove the unused duplicates.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
No need to define some of the iomux twice, remove the duplicates.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add some missing Clock Gate Register element shifters which were implemented
as magic numbers in the arm/boards directory. Use the new shifters for
inproved code readability.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With commit 962d8b89d2 ("imx35-regs: add defines for USB and SD") the
shifter argument for the iMX35 ESDHC1 CGR instance has been erroneously
assigned to CGR1 instead of CGR0. Fix this for the eukrea-cpuimx35 board.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Macros for three PLL setups got cloned in different board specific subdirs.
Re-unify those macros into a common place and avoid checkpatch 80-char
warnings when creating a new board subdir.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move the definition of iMX CPU types to an individual file to allow
on-purpose inclusion. Eliminate magic number CPU type encoding in the
scripts/imx subdir using the new include file.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The imx53 SOC features 128kB of internal SRAM which is commonly used in
early stages of barebox to store the stack. Avoid magic numbers while
addressing this RAM.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The HABv3 images for engineering mode do not work on a production device
and the images for production mode do not work on an engineering device.
When in engineering mode the ROM checks the images, but does not stop
booting when the signatures are wrong. This means a production image
can still be booted on an engineering device. This device can be
temporarily put into production mode by writing to the HAB_TYPE shadow
fuse register. After a reset the device will come up in production mode
and the image can be tested for validity. This means that if we have to
decide between production mode images and engineering images, the
production images are a better decision. Change this accordingly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds a function to enable/disable permanent write for the IIM
module so that C users no longer have to fiddle with device parameters.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Accessing the IIM registers is cumbersome. The fuses are documented with
different register strides and there is no header file available, so the
different fields have to be read in the datasheets and translated into
the barebox format over and over again. This patch adds a header file
which has defines for the various fuses (for i.MX25 only so far, but
others can be added later) along with C functions to read/write the
fields.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Our asprintf and vasprintf have different prototypes than the glibc
functions. This causes trouble when we want to share barebox code
with userspace code. Change the prototypes for (v)asprintf to match
the glibc prototypes. Since the current (v)asprintf are convenient
to use change the existing functions to b(v)asprintf.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The binary image generated by barebox contains an instruction at the
very beginning to jump over the header. However, when the image is
written to a SD card and the first 512 bytes are skipped in order to
preserve the partition table then this jump instruction is lost. Instead
of relying on the jump instruction at the image beginning calculate
the image entry from the i.MX header instead of relying on the beginning
of the image being the entry point.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
All i.MX images are nowadays built with the imx-image tool, so we do not
need the header files and Kconfig options anymore. Remove them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On i.MX6 a single chipselect can have 4GiB. In this case the calculation
for CS0_end overflows the 7 bit field. Clamp it to 127, the maximum
supported value.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On i.MX6 a single chipselect can have 4GiB, which overflows a 32bit
type, so imx6_mmdc_sdram_size() must return a u64 to support this case.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
CCM has reset status bits with more detailed information than the
watchdog. Set reset source with higher priority.
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
According to commit f6b6f3c7b2bb7d6277801882afdced6f2b10fc17 from
git://git.freescale.com/imx/uboot-imx.git:
Also set Prefetch offset to 15, since it improves
memcpy performance by 35%. Don't enable Incr double
Linefill enable since it adversely affects memcpy
performance by about 32MB/s and reads by 90MB/s. Tested
with 4K to 16MB sized src and dst aligned buffer.
This commit ports those chagnes from U-Boot.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
I.MX6Q Plus parts have r3p2 revision of PL310 so double linefill
errata no longer applies for all of the i.MX6Q SoCs. Change the code to
use PL310's revision inforation to determine if workaround needs to be
applied.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use constants instead of magic numbers for PL301 registers bits in
imx6_mmu_init()
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In v4.2-rc3 the "fsl,imx1-gpt" compatible was replaced with
"fsl,imx21-gpt" so i.MX27 currently ends up without clocksource. Fix
this.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Uwe Kleine-König
Sascha Hauer
Alexander Kurz
Lucas Stach
Andrey Smirnov
Lucas Stach
Alexander Shiyan
Alexander Stein