9
0
Fork 0
Commit Graph

5 Commits

Author SHA1 Message Date
Jean-Christophe PLAGNIOL-VILLARD c49819d903 arm: rename reset and common_reset to barebox_arm_reset_vector and arm_cpu_lowlevel_init
reset is confusing with the cpu reset and impossible to grep

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-02-08 09:35:40 +01:00
Jean-Christophe PLAGNIOL-VILLARD 3b4fdb58c0 at91sam9: drop AT91_BASE_SYS for sdram controller
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-02-05 10:26:49 +01:00
Jean-Christophe PLAGNIOL-VILLARD ec5cfca170 at91sam926x_lowlevel_init: use struct to pass soc config
this will allow to pass more paraemeter to at91sam926x_lowlevel_init
and drop AT91_BASE_SYS

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-02-05 10:26:49 +01:00
Sascha Hauer 168b2630e2 ARM AT91: switch at91sam9 to barebox_arm_entry part1
This switches the at91sam926x, 9g10 and 9g20 over to barebox_arm_entry.
For these SoCs we currently support reading back the memory size from
the SDRAM controller, so all of these can have a common reset() function.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2013-02-04 15:52:39 +01:00
Jean-Christophe PLAGNIOL-VILLARD 369797daee at91sam9260/9g20/9261/9g10/9263: split soc lowlevel_init from generic
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-01-28 09:45:39 +01:00