The device resources are much smaller, the resource mechanism
revealed this because of overlapping devices.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This switches the bootm code to the new uimage code. Also
bootm can now handle other types of images than uImages.
Currently the only architecture making use of this is
arm which allows to boot zImages, raw images and barebox
images.
I intended to make a more bisectable series from this but
I failed becuase there are many dependencies and no matter
how I tried the patches grew bigger and and bigger. So I
decided to put this all in a single patch.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The device resources are much smaller, the resource mechanism
revealed this because of overlapping devices.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
All handlers used to just relocate the image without any checks, so
we are doomed if we write outside of SDRAM or will overwrite ourselves.
Move the relocation up to the generic part where we have a chance
of catching these issues.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We never had interrupt support in barebox and we have no plans to
add interrupt support. Even if we do I doubt the current fragments
of irq support are helpful, so remove them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When building sandbox with ccache, one would hit warnings such as:
warning: 'struct mmsghdr' declared inside parameter list
on random files; a way to reproduce this issue is to build a simple
file doing just:
#include <sys/socket.h>
int main(void) {
return 0;
}
gcc -Wall -P -c -o foo foo.c
But actually the -P flag is only useful when generating non-C files,
such as linker scripts in the case of barebox. Removing the -P flag
from all the gcc invocations, except when generating .lds files makes
the warning go away. It turns out that this is what
linux/scripts/Makefile.build also does nowadays.
Signed-off-by: Loïc Minier <loic.minier@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
/dev/self0 and /dev/env0 are in the last MB of nor flash. The
offset depends on the size of the flash, so detect this at
runtime.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We introduced several new functions to ease our life
on ppc, use themn on the pcm030:
- setup iomux and bus clocks in board code
- add sdram memory according to detected size
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The old startup process consisted of several CFG_LOWBOOT,
CFG_RAMBOOT ifdeffery which I do not understand. So remove
all this and replace it with:
- put the entry point for second stage loaders to offset 0x0
so that we can do a go /dev/ram0 to start a second barebox
- When we come from the reset vector assume MBAR is at 0x80000000
- When we come from the second stage entry assume that
SPR 311 is in sync with the current MBAR address.
- Switch MBAR to 0xf0000000 and we are done.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This has never been used in barebox and likely is incomplete
and bitrotted over time, so remove it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To allow for some generic io accessors introduce io.h and use
this instead of asm/io.h throughout the tree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Loïc Minier
Jean-Christophe PLAGNIOL-VILLARD
Andre Naujoks