The IPU has a fractional pixelclock divider. When used, this produces
clock jitter which especially LVDS transceivers can't handle. Allow
to disable it via platform_data.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With the IPU the way the display is connected is completely independent
of the framebuffer pixel format. So instead of specifying a pixel width
in platform_data we have to specify how the display is connected.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Before we jump to SDRAM where we just copied our code we have to
invalidate the instruction cache.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We want to check whether boarddata contains a valid dtb if it's inside
valid memory. This includes the base of SDRAM, so use '>=' instead of '>'.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Broken since:
| commit 72e561b5e8
| Author: Sascha Hauer <s.hauer@pengutronix.de>
| Date: Fri Jul 19 12:07:05 2013 +0200
|
| ARM: omap4: Use writel where appropriate
|
| Instead of making a pure 32bit write to a read/modify/write
| operation with sr32 use writel directly. This saves a few bytes
| of binary space.
|
| Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add the Kconfig and Makefile directives to build barebox
for the GEIP DA923RC board.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The use of the DDR driver as well as early I2C support is
enabled for board initialising their memory through SPD EEPROM
data.
A SOC specific function returning the DDR bus frequency
is added for the DDR driver to translate DDR timings to
register values.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Because the port count is different between the MPC8544 and
existing CPU support, the Ethernet port count is defined on
a per CPU basis.
Accordingly, the TBI PHY initialisation code is updated.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Definitions are added to support the mpc8544 sOC.
The function returning the I2C bus frequency is updated
to take into account the mpc8544 specific clock ratio.
A mininal GPIO API is added to enable and set the GPIO
out pins.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If drivers want to fixup their specific instance they need some context
to know which instance they have to fixup.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use the mailbox driver to set up a framebuffer based on the firmware
configuration.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add the missing "right" field to struct bcm2835_mbox_tag_overscan.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
i.MX5x OTG port is hardwired to the internal UTMI PHY, so having
this configurable makes no sense and helps using this port with DT.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
not all board have a SD card.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since the mainline kernel now has its own dr_mode and phy_type DT-options
for setting modes of USB ports, do these kernel parameters compatible by
removing "barebox" prefix.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The name of the raw device is mtdraw<num> which is inconsistent to other
mtd devices which are named mtd<num>.<partname>. Rename it to mtd<num>.raw.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this fix :
arch/arm/mach-mxs/bcb.c:268: error: too few arguments to function 'chip->ecc.read_page_raw'
arch/arm/mach-mxs/bcb.c:309: error: too few arguments to function 'chip->write_page'
caution : this is NOT runtime tested.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
GXemul is another MIPS emulator with Malta board support.
As opposed to qemu GXemul supports only fixed GT64120
YAMON-compatible PCI mapping.
As now barebox uses YAMON-style mapping we can
use GXemul for barebox run.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There are some reasons for using YAMON-style memory map:
* we can run Linux kernel from barebox;
* we can use GXemul for running barebox.
YAMON-style GT64120 memory map make move UART to the new position.
The files gt64120.h and mach-gt64120.h are imported from Linux.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On MIPS Technologies boards 0x1fc00010 address
is reserved for BoardID. The hardware or emulator
intercepts accesses to this address and we can't use
this address for storing code.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On 8 February 2013 MIPS Technologies was acquired
by Imagination Technologies. Now the http://www.mips.com/ site
is redirected to http://www.imgtec.com/, the Malta development
board page is unreachable.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use the mailbox driver to query the size. This properly takes the
firmware's VideoCore/ARM memory split into account.
Linux can now be booted with more than 128 MiB.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use the mailbox driver to query the clock frequency and create
a clkdev for the bcm2835_mci driver.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows exchanging data with the on-SoC GPU.
Based on U-Boot code by Stephen Warren.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
RPi's mailbox driver is used early and it needs clock functions to
handle timeouts.
Register the driver straight after its clkdev.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Drivers currently cannot implement explicit cache handling and rely on
running the same code before and after mmu_initcall() without crashing.
Depending on the chosen config options, the cache functions are not yet
setup and using them early on ends in a null pointer dereference.
The RPi's mailbox driver is such a case; it requires cache handling once
the MMU is fully set up and yet the RPi setup needs to use the driver to
get the memory size before mem_initcall() and hence mmu_initcall().
Fix this by checking the cache_fns pointer before dereferencing it.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When using CONFIG_MMU_EARLY combined with CONFIG_PBL_IMAGE, the barebox
setup reuses the MMU setup from the PBL, but doesn't setup the cache
functions.
Set these up to guarantee proper early cache handing before mmu_initcall().
Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Similar to the OMAP boards mount the SD card to /boot and expect
the environment as /boot/barebox.env
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>