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5 Commits

Author SHA1 Message Date
Jon Loeliger d9b94f28a4 * Patch by Jon Loeliger, 2005-05-05
Implemented support for MPC8548CDS board.
  Added DDR II support based on SPD values for MPC85xx boards.
  This roll-up patch also includes bugfies for the previously
  published patches:
    DDRII CPO, pre eTSEC, 8548 LBIU, Andy's TSEC, eTSEC 3&4 I/O
2005-07-25 14:05:07 -05:00
Jon Loeliger 9c4c5ae3e1 * Patch by Jon Loeliger, Kumar Gala 2005-02-08
- Convert the CPM2 based functionality to use new CONFIG_CPM2
    option rather than a myriad of CONFIG_MPC8560-like variants.
    Applies to MPC85xx and MPC8260 boards, includes stxgp3 and sbc8560.
    Eliminates the CONFIG_MPC8560 option entirely.  Distributes the
    new CONFIG_CPM2 option to each 8260 board.
2005-07-23 10:37:35 -05:00
wdenk e2ffd59b4d * Code cleanup, mostly for GCC-3.3.x
* Cleanup confusing use of CONFIG_ETH*ADDR - ust his only to
  pre-define a MAC address; use CONFIG_HAS_ETH* to enable support for
  additional ethernet addresses.

* Cleanup drivers/i82365.c - avoid duplication of code

* Fix bogus "cannot span across banks" flash error message

* Add support for CompactFlash for the CPC45 Board.
2004-12-31 09:32:47 +00:00
wdenk 8b74bf31fe Cleanup 2004-10-11 23:10:30 +00:00
wdenk c15f3120ec * Patch by Michael Bendzick, 30 Aug 2004:
- Improve platform.S code for omap1510inn that detects whether code
    is running from SDRAM or not. Patch allows SDRAM to be configured
    if code is running out of SRAM at 0x20000000.

* Patch by Frederick Klatt, 30 Aug 2004:
  Add support for the Wind River SBC8540/SBC8560 boards
2004-10-10 22:44:24 +00:00