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Author SHA1 Message Date
Sascha Hauer a76f3d9535 video: imx-ipu-fb: Allow to specify framebuffer memory size via platform_data
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-12-20 11:32:07 +01:00
Sascha Hauer 4e64bcac45 video: ipufb: Allow to disable fractional pixelclock divider
The IPU has a fractional pixelclock divider. When used, this produces
clock jitter which especially LVDS transceivers can't handle. Allow
to disable it via platform_data.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-12-20 09:35:38 +01:00
Sascha Hauer 68a6fedcd4 video: ipufb: make disp_data_fmt configurable
With the IPU the way the display is connected is completely independent
of the framebuffer pixel format. So instead of specifying a pixel width
in platform_data we have to specify how the display is connected.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-12-18 16:38:05 +01:00
Sascha Hauer fbf502a9c2 ARM: i.MX external NAND boot: Add missing instruction cache invalidate
Before we jump to SDRAM where we just copied our code we have to
invalidate the instruction cache.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-12-03 10:20:00 +01:00
Sascha Hauer ce0ccefb15 ARM: start: fix fdt inside valid memory check
We want to check whether boarddata contains a valid dtb if it's inside
valid memory. This includes the base of SDRAM, so use '>=' instead of '>'.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-11-26 17:21:33 +01:00
Vicente Bergas 94e0337ef0 OMAP4: fix omap4_bootsource regression
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-11-25 08:30:09 +01:00
Vicente Bergas 58923505eb OMAP4: fix writel data/address swap regression
Broken since:

| commit 72e561b5e8
| Author: Sascha Hauer <s.hauer@pengutronix.de>
| Date:   Fri Jul 19 12:07:05 2013 +0200
|
|     ARM: omap4: Use writel where appropriate
|
|     Instead of making a pure 32bit write to a read/modify/write
|     operation with sr32 use writel directly. This saves a few bytes
|     of binary space.
|
|     Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-11-25 08:28:53 +01:00
Sascha Hauer ded25480d8 Merge branch 'for-next/rpi' 2013-11-07 08:31:47 +01:00
Sascha Hauer b3055b0f6b Merge branch 'for-next/ppc' 2013-11-07 08:31:47 +01:00
Sascha Hauer 398cdf212d Merge branch 'for-next/mtd' 2013-11-07 08:31:47 +01:00
Sascha Hauer 4bcff209bf Merge branch 'for-next/mips' 2013-11-07 08:31:47 +01:00
Sascha Hauer 4c8221be2c Merge branch 'for-next/mci' 2013-11-07 08:31:47 +01:00
Sascha Hauer 2d022b5097 Merge branch 'for-next/imx' 2013-11-07 08:31:47 +01:00
Renaud Barbier 9e1528ce7c ppc: mpc85xx: build directives
Add the Kconfig and Makefile directives to build barebox
for the GEIP DA923RC board.

Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-11-06 11:04:38 +01:00
Renaud Barbier 8f44af62c5 ppc: DA923RC: add board support
Add the GEIP DA923RC board support. This includes core
files as well as defconfig and make files.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-11-06 11:04:38 +01:00
Renaud Barbier 04180c0464 ppc: mpc85xx: enable DDR driver
The use of the DDR driver as well as early I2C support is
enabled for board initialising their memory through SPD EEPROM
data.

A SOC specific function returning the DDR bus frequency
is added for the DDR driver to translate DDR timings to
register values.

Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-11-06 11:04:37 +01:00
Renaud Barbier eb3ce91e59 ppc: mpc85xx: define Ethernet port count
Because the port count is different between the MPC8544 and
existing CPU support, the Ethernet port count is defined on
a per CPU basis.
Accordingly, the TBI PHY initialisation code is updated.

Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-11-06 11:04:37 +01:00
Renaud Barbier 2e6750444e ppc: mpc85xx: mpc8544 support
Definitions are added to support the mpc8544 sOC.

The function returning the I2C bus frequency is updated
to take into account the mpc8544 specific clock ratio.
A mininal GPIO API is added to enable and set the GPIO
out pins.

Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-11-06 11:04:37 +01:00
Sascha Hauer d7c1612d65 of: Add a context pointer to fixup functions
If drivers want to fixup their specific instance they need some context
to know which instance they have to fixup.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-11-06 10:24:46 +01:00
Andre Heider 91b3761ec8 video: add a BCM2835 framebuffer driver
Use the mailbox driver to set up a framebuffer based on the firmware
configuration.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-11-06 09:59:05 +01:00
Andre Heider 5e9596f3ad ARM: bcm2835: add missing mbox overscan response field
Add the missing "right" field to struct bcm2835_mbox_tag_overscan.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-11-06 09:59:04 +01:00
Alexander Shiyan 572f03cfb0 USB: i.MX5x: Remove usage of MXC_EHCI_INTERNAL_PHY for OTG port
i.MX5x OTG port is hardwired to the internal UTMI PHY, so having
this configurable makes no sense and helps using this port with DT.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-11-04 15:06:14 +01:00
Jean-Christophe PLAGNIOL-VILLARD 7a305b2d8a bcm2835: move mci register at board level
not all board have a SD card.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-11-04 09:23:06 +01:00
Alexander Shiyan 77b93d7dfe USB: i.MX: Make DT dr_mode & phy_type parameters kernel compatible
Since the mainline kernel now has its own dr_mode and phy_type DT-options
for setting modes of USB ports, do these kernel parameters compatible by
removing "barebox" prefix.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-10-30 09:52:42 +01:00
Sascha Hauer 865bab0347 mtd: raw: rename raw device
The name of the raw device is mtdraw<num> which is inconsistent to other
mtd devices which are named mtd<num>.<partname>. Rename it to mtd<num>.raw.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-10-29 09:10:17 +01:00
Sascha Hauer d58d569d0b ARM: i.MX6: Add spi aliases to devicetree
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-10-29 09:10:01 +01:00
Alexander Shiyan 2b4a1993c7 ARM: i.MX5x: Make IIM driver kernel-compatible
Since kernel uses "imx27-iim" compatible string in i.MX5x DTS templates,
do IIM driver compatible.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-10-29 08:55:01 +01:00
Eric Bénard 2826ba50ed bcb: fix compilation
this fix :
arch/arm/mach-mxs/bcb.c:268: error: too few arguments to function 'chip->ecc.read_page_raw'
arch/arm/mach-mxs/bcb.c:309: error: too few arguments to function 'chip->write_page'

caution : this is NOT runtime tested.

Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-10-28 14:15:14 +01:00
Antony Pavlov 597b2a2697 MIPS: qemu-malta: doc: add gxemul documentation
GXemul is another MIPS emulator with Malta board support.
As opposed to qemu GXemul supports only fixed GT64120
YAMON-compatible PCI mapping.

As now barebox uses YAMON-style mapping  we can
use GXemul for barebox run.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-10-28 09:01:48 +01:00
Antony Pavlov 7b29868f3e MIPS: qemu-malta: use YAMON-style GT64120 memory map
There are some reasons for using YAMON-style memory map:
* we can run Linux kernel from barebox;
* we can use GXemul for running barebox.

YAMON-style GT64120 memory map make move UART to the new position.

The files gt64120.h and mach-gt64120.h are imported from Linux.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-10-28 09:01:48 +01:00
Antony Pavlov 0ac73f1326 MIPS: qemu-malta: update qemu-malta.dox
Only PBL-enabled barebox-flash-image can correctly
get round BoadrID address (0x1fc00010), so let's
recommend barebox-flash-image.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-10-28 09:01:48 +01:00
Antony Pavlov 401225a04b MIPS: qemu-malta: don't use BoardID address for executable code
On MIPS Technologies boards 0x1fc00010 address
is reserved for BoardID. The hardware or emulator
intercepts accesses to this address and we can't use
this address for storing code.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-10-28 09:01:48 +01:00
Antony Pavlov 6f81bcd822 MIPS: qemu-malta: doc: drop broken mips.com link
On 8 February 2013 MIPS Technologies was acquired
by Imagination Technologies. Now the http://www.mips.com/ site
is redirected to http://www.imgtec.com/, the Malta development
board page is unreachable.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-10-28 09:01:48 +01:00
Jean-Christophe PLAGNIOL-VILLARD a0030a8f91 vexpress: mmc support
qemu-system-arm -m 1024 -smp 1 -M vexpress-a15 -monitor pty -kernel zbarebox -drive if=sd,cache=unsafe,file=sd -nographic -tftp . -net nic -net user

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-10-22 16:49:48 +02:00
Andre Heider 607968f541 ARM: rpi: use the proper ARM memory size
Use the mailbox driver to query the size. This properly takes the
firmware's VideoCore/ARM memory split into account.

Linux can now be booted with more than 128 MiB.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-10-22 15:28:59 +02:00
Andre Heider a476255682 ARM: rpi: register a clkdev for the eMMC clock
Use the mailbox driver to query the clock frequency and create
a clkdev for the bcm2835_mci driver.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-10-22 15:28:59 +02:00
Andre Heider 76cb4002af ARM: bcm2835: add a mailbox driver for VideoCore
This allows exchanging data with the on-SoC GPU.

Based on U-Boot code by Stephen Warren.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-10-22 15:28:59 +02:00
Andre Heider d841f42664 ARM: bcm2835: register the clocksource device earlier
RPi's mailbox driver is used early and it needs clock functions to
handle timeouts.

Register the driver straight after its clkdev.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-10-22 15:28:58 +02:00
Andre Heider 4754cc79f6 ARM: bcm2835: cleanup clock registering
Sync exposed names while at it.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-10-22 15:28:58 +02:00
Andre Heider 0fdd91d92b ARM: cache: do not crash when the MMU isn't yet setup
Drivers currently cannot implement explicit cache handling and rely on
running the same code before and after mmu_initcall() without crashing.

Depending on the chosen config options, the cache functions are not yet
setup and using them early on ends in a null pointer dereference.

The RPi's mailbox driver is such a case; it requires cache handling once
the MMU is fully set up and yet the RPi setup needs to use the driver to
get the memory size before mem_initcall() and hence mmu_initcall().

Fix this by checking the cache_fns pointer before dereferencing it.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-10-22 15:28:58 +02:00
Andre Heider 5611ccb042 ARM: cache: restore cache functions from the PBL
When using CONFIG_MMU_EARLY combined with CONFIG_PBL_IMAGE, the barebox
setup reuses the MMU setup from the PBL, but doesn't setup the cache
functions.

Set these up to guarantee proper early cache handing before mmu_initcall().

Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-10-22 15:28:58 +02:00
Alexander Shiyan 377250baea ARM: i.MX51: Update DTS template
Update i.MX51 DT template from kernel.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-10-22 08:59:48 +02:00
Sascha Hauer 2976617635 ARM: rpi: add SD card environment support
Similar to the OMAP boards mount the SD card to /boot and expect
the environment as /boot/barebox.env

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-10-16 09:45:31 +02:00
Sascha Hauer 16dd5e5603 ARM: rpi: Update defconfig
Enable MMU, stack dumps and a lot of other features

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-10-16 09:39:30 +02:00
Andre Heider 64bf420013 ARM: rpi: fix tty device name in bootargs-base
Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-10-16 09:38:53 +02:00
Jan Luebbe 579cbebf41 at91: fix typo in Kconfig description
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-10-15 08:37:24 +02:00
Sascha Hauer 51c92d290b x86: Fix compiler warnings
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-10-14 14:04:46 +02:00
Sascha Hauer 6e30646fa2 Merge branch 'for-next/tegra'
Conflicts:
	arch/arm/dts/Makefile
	images/Makefile
2013-10-07 08:02:36 +02:00
Sascha Hauer 904298deb0 Merge branch 'for-next/socfpga'
Conflicts:
	scripts/Makefile
2013-10-07 08:02:24 +02:00
Sascha Hauer ebf9022f2e Merge branch 'for-next/rs485'
Conflicts:
	common/console_common.c
2013-10-07 08:02:14 +02:00