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Author SHA1 Message Date
Franck Jullien 9ac710c31d openrisc: update SPR registers definition
The OpenRISC architecture specification v1.0 defines
new SPR registers. This patch adds registers definition
for group 0 and update bit definitions for the CPU
configuration register.

Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2014-05-22 08:07:21 +02:00
Sascha Hauer 940237285e openrisc: Use generic io accessors
openrisc does nothing special in the io accessors, so use the generic
ones as the kernel.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2014-04-09 19:31:41 +02:00
Alexander Aring 47326f80a9 remap_range: make function 'remap_range' global
Change function remap_range in arm architecture to make it
global accessable. For example command 'memtest' can change
pte flags to enable or disable cache.

Add dummy function for others architectures that doesn't
have mmu or pte support.

Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-01-18 08:28:20 +01:00
Sascha Hauer 77322aa896 Treewide: remove address of the Free Software Foundation
The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-09-17 10:57:41 +02:00
Sascha Hauer 72f26b709f openrisc: Add unaligned support
Copied directly from Linux header file

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-09-04 09:08:39 +02:00
Marc Kleine-Budde ed2180d658 blackfin, mips, openrisc, ppc, sandbox, x86: add generic dma_alloc, dma_free inlines
Some drivers call dma_inv_range() on buffers, on arm these buffers must
be cache line aligned. This patch introduces a generic dma_alloc,
dma_free. Archs can implement in their own functions in "asm/dma.h" and add a:

	#define dma_alloc dma_alloc
	#define dma_free dma_free

On all other archs the generic versions, which translate into xmalloc
and free are used.

Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-06-30 12:46:25 +02:00
Sascha Hauer b62cf8f36d openrisc: fix build due to redefined phys_size_t
We already have a phys_size_t since:

commit 2f05b69256
Author: Renaud Barbier <renaud.barbier@ge.com>
Date:   Fri May 11 11:58:13 2012 +0100

    linux/types.h: define phys_size_t

    Add this definition in preparation for the introduction of the
    mpc85xx support.

    Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
    Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Fix build due to redefinition of this type.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-06-21 11:57:26 +02:00
Franck Jullien 6fe9ee8eb4 Add OpenRISC arch
OpenRISC is the original flagship project of the OpenCores community.
This project aims to develop a series of general purpose open source
RISC CPU architectures.

A team from OpenCores provided the first implementation, the OpenRISC
1200, written in the Verilog hardware description language.

Even though I should have created an mach-or1200 directory, it is not
necessary for now. The OpenRISC 1200 CPU is the only one available and
it will be for some time.

Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-01-02 12:50:56 +01:00